1 /* 2 * Nuvoton NPCM7xx General Purpose Input / Output (GPIO) 3 * 4 * Copyright 2020 Google LLC 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * version 2 as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 #ifndef NPCM7XX_GPIO_H 16 #define NPCM7XX_GPIO_H 17 18 #include "exec/memory.h" 19 #include "hw/sysbus.h" 20 21 /* Number of pins managed by each controller. */ 22 #define NPCM7XX_GPIO_NR_PINS (32) 23 24 /* 25 * Number of registers in our device state structure. Don't change this without 26 * incrementing the version_id in the vmstate. 27 */ 28 #define NPCM7XX_GPIO_NR_REGS (0x80 / sizeof(uint32_t)) 29 30 typedef struct NPCM7xxGPIOState { 31 SysBusDevice parent; 32 33 /* Properties to be defined by the SoC */ 34 uint32_t reset_pu; 35 uint32_t reset_pd; 36 uint32_t reset_osrc; 37 uint32_t reset_odsc; 38 39 MemoryRegion mmio; 40 41 qemu_irq irq; 42 qemu_irq output[NPCM7XX_GPIO_NR_PINS]; 43 44 uint32_t pin_level; 45 uint32_t ext_level; 46 uint32_t ext_driven; 47 48 uint32_t regs[NPCM7XX_GPIO_NR_REGS]; 49 } NPCM7xxGPIOState; 50 51 #define TYPE_NPCM7XX_GPIO "npcm7xx-gpio" 52 #define NPCM7XX_GPIO(obj) \ 53 OBJECT_CHECK(NPCM7xxGPIOState, (obj), TYPE_NPCM7XX_GPIO) 54 55 #endif /* NPCM7XX_GPIO_H */ 56