1*a3ee49f0SGerd Hoffmann #ifndef HW_DISPLAY_BOCHS_VBE_H 2*a3ee49f0SGerd Hoffmann #define HW_DISPLAY_BOCHS_VBE_H 3*a3ee49f0SGerd Hoffmann 4*a3ee49f0SGerd Hoffmann /* 5*a3ee49f0SGerd Hoffmann * bochs vesa bios extension interface 6*a3ee49f0SGerd Hoffmann */ 7*a3ee49f0SGerd Hoffmann 8*a3ee49f0SGerd Hoffmann #define VBE_DISPI_MAX_XRES 16000 9*a3ee49f0SGerd Hoffmann #define VBE_DISPI_MAX_YRES 12000 10*a3ee49f0SGerd Hoffmann #define VBE_DISPI_MAX_BPP 32 11*a3ee49f0SGerd Hoffmann 12*a3ee49f0SGerd Hoffmann #define VBE_DISPI_INDEX_ID 0x0 13*a3ee49f0SGerd Hoffmann #define VBE_DISPI_INDEX_XRES 0x1 14*a3ee49f0SGerd Hoffmann #define VBE_DISPI_INDEX_YRES 0x2 15*a3ee49f0SGerd Hoffmann #define VBE_DISPI_INDEX_BPP 0x3 16*a3ee49f0SGerd Hoffmann #define VBE_DISPI_INDEX_ENABLE 0x4 17*a3ee49f0SGerd Hoffmann #define VBE_DISPI_INDEX_BANK 0x5 18*a3ee49f0SGerd Hoffmann #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6 19*a3ee49f0SGerd Hoffmann #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7 20*a3ee49f0SGerd Hoffmann #define VBE_DISPI_INDEX_X_OFFSET 0x8 21*a3ee49f0SGerd Hoffmann #define VBE_DISPI_INDEX_Y_OFFSET 0x9 22*a3ee49f0SGerd Hoffmann #define VBE_DISPI_INDEX_NB 0xa /* size of vbe_regs[] */ 23*a3ee49f0SGerd Hoffmann #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa /* read-only, not in vbe_regs */ 24*a3ee49f0SGerd Hoffmann 25*a3ee49f0SGerd Hoffmann /* VBE_DISPI_INDEX_ID */ 26*a3ee49f0SGerd Hoffmann #define VBE_DISPI_ID0 0xB0C0 27*a3ee49f0SGerd Hoffmann #define VBE_DISPI_ID1 0xB0C1 28*a3ee49f0SGerd Hoffmann #define VBE_DISPI_ID2 0xB0C2 29*a3ee49f0SGerd Hoffmann #define VBE_DISPI_ID3 0xB0C3 30*a3ee49f0SGerd Hoffmann #define VBE_DISPI_ID4 0xB0C4 31*a3ee49f0SGerd Hoffmann #define VBE_DISPI_ID5 0xB0C5 32*a3ee49f0SGerd Hoffmann 33*a3ee49f0SGerd Hoffmann /* VBE_DISPI_INDEX_ENABLE */ 34*a3ee49f0SGerd Hoffmann #define VBE_DISPI_DISABLED 0x00 35*a3ee49f0SGerd Hoffmann #define VBE_DISPI_ENABLED 0x01 36*a3ee49f0SGerd Hoffmann #define VBE_DISPI_GETCAPS 0x02 37*a3ee49f0SGerd Hoffmann #define VBE_DISPI_8BIT_DAC 0x20 38*a3ee49f0SGerd Hoffmann #define VBE_DISPI_LFB_ENABLED 0x40 39*a3ee49f0SGerd Hoffmann #define VBE_DISPI_NOCLEARMEM 0x80 40*a3ee49f0SGerd Hoffmann 41*a3ee49f0SGerd Hoffmann /* only used by isa-vga, pci vga devices use a memory bar */ 42*a3ee49f0SGerd Hoffmann #define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000 43*a3ee49f0SGerd Hoffmann 44*a3ee49f0SGerd Hoffmann 45*a3ee49f0SGerd Hoffmann /* 46*a3ee49f0SGerd Hoffmann * qemu extension: mmio bar (region 2) 47*a3ee49f0SGerd Hoffmann */ 48*a3ee49f0SGerd Hoffmann 49*a3ee49f0SGerd Hoffmann #define PCI_VGA_MMIO_SIZE 0x1000 50*a3ee49f0SGerd Hoffmann 51*a3ee49f0SGerd Hoffmann /* vga register region */ 52*a3ee49f0SGerd Hoffmann #define PCI_VGA_IOPORT_OFFSET 0x400 53*a3ee49f0SGerd Hoffmann #define PCI_VGA_IOPORT_SIZE (0x3e0 - 0x3c0) 54*a3ee49f0SGerd Hoffmann 55*a3ee49f0SGerd Hoffmann /* bochs vbe register region */ 56*a3ee49f0SGerd Hoffmann #define PCI_VGA_BOCHS_OFFSET 0x500 57*a3ee49f0SGerd Hoffmann #define PCI_VGA_BOCHS_SIZE (0x0b * 2) 58*a3ee49f0SGerd Hoffmann 59*a3ee49f0SGerd Hoffmann /* qemu extension register region */ 60*a3ee49f0SGerd Hoffmann #define PCI_VGA_QEXT_OFFSET 0x600 61*a3ee49f0SGerd Hoffmann #define PCI_VGA_QEXT_SIZE (2 * 4) 62*a3ee49f0SGerd Hoffmann 63*a3ee49f0SGerd Hoffmann /* qemu extension registers */ 64*a3ee49f0SGerd Hoffmann #define PCI_VGA_QEXT_REG_SIZE (0 * 4) 65*a3ee49f0SGerd Hoffmann #define PCI_VGA_QEXT_REG_BYTEORDER (1 * 4) 66*a3ee49f0SGerd Hoffmann #define PCI_VGA_QEXT_LITTLE_ENDIAN 0x1e1e1e1e 67*a3ee49f0SGerd Hoffmann #define PCI_VGA_QEXT_BIG_ENDIAN 0xbebebebe 68*a3ee49f0SGerd Hoffmann 69*a3ee49f0SGerd Hoffmann #endif /* HW_DISPLAY_BOCHS_VBE_H */ 70