xref: /openbmc/qemu/include/hw/core/cpu.h (revision b15bdc96)
1 /*
2  * QEMU CPU model
3  *
4  * Copyright (c) 2012 SUSE LINUX Products GmbH
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version 2
9  * of the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, see
18  * <http://www.gnu.org/licenses/gpl-2.0.html>
19  */
20 #ifndef QEMU_CPU_H
21 #define QEMU_CPU_H
22 
23 #include "hw/qdev-core.h"
24 #include "disas/dis-asm.h"
25 #include "exec/cpu-common.h"
26 #include "exec/hwaddr.h"
27 #include "exec/memattrs.h"
28 #include "qapi/qapi-types-run-state.h"
29 #include "qemu/bitmap.h"
30 #include "qemu/rcu_queue.h"
31 #include "qemu/queue.h"
32 #include "qemu/thread.h"
33 #include "qemu/plugin-event.h"
34 #include "qom/object.h"
35 
36 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
37                                      void *opaque);
38 
39 /**
40  * SECTION:cpu
41  * @section_id: QEMU-cpu
42  * @title: CPU Class
43  * @short_description: Base class for all CPUs
44  */
45 
46 #define TYPE_CPU "cpu"
47 
48 /* Since this macro is used a lot in hot code paths and in conjunction with
49  * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
50  * an unchecked cast.
51  */
52 #define CPU(obj) ((CPUState *)(obj))
53 
54 /*
55  * The class checkers bring in CPU_GET_CLASS() which is potentially
56  * expensive given the eventual call to
57  * object_class_dynamic_cast_assert(). Because of this the CPUState
58  * has a cached value for the class in cs->cc which is set up in
59  * cpu_exec_realizefn() for use in hot code paths.
60  */
61 typedef struct CPUClass CPUClass;
62 DECLARE_CLASS_CHECKERS(CPUClass, CPU,
63                        TYPE_CPU)
64 
65 /**
66  * OBJECT_DECLARE_CPU_TYPE:
67  * @CpuInstanceType: instance struct name
68  * @CpuClassType: class struct name
69  * @CPU_MODULE_OBJ_NAME: the CPU name in uppercase with underscore separators
70  *
71  * This macro is typically used in "cpu-qom.h" header file, and will:
72  *
73  *   - create the typedefs for the CPU object and class structs
74  *   - register the type for use with g_autoptr
75  *   - provide three standard type cast functions
76  *
77  * The object struct and class struct need to be declared manually.
78  */
79 #define OBJECT_DECLARE_CPU_TYPE(CpuInstanceType, CpuClassType, CPU_MODULE_OBJ_NAME) \
80     typedef struct ArchCPU CpuInstanceType; \
81     OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME);
82 
83 typedef enum MMUAccessType {
84     MMU_DATA_LOAD  = 0,
85     MMU_DATA_STORE = 1,
86     MMU_INST_FETCH = 2
87 } MMUAccessType;
88 
89 typedef struct CPUWatchpoint CPUWatchpoint;
90 
91 /* see tcg-cpu-ops.h */
92 struct TCGCPUOps;
93 
94 /* see accel-cpu.h */
95 struct AccelCPUClass;
96 
97 /* see sysemu-cpu-ops.h */
98 struct SysemuCPUOps;
99 
100 /**
101  * CPUClass:
102  * @class_by_name: Callback to map -cpu command line model name to an
103  * instantiatable CPU type.
104  * @parse_features: Callback to parse command line arguments.
105  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
106  * @has_work: Callback for checking if there is work to do.
107  * @memory_rw_debug: Callback for GDB memory access.
108  * @dump_state: Callback for dumping state.
109  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
110  * @set_pc: Callback for setting the Program Counter register. This
111  *       should have the semantics used by the target architecture when
112  *       setting the PC from a source such as an ELF file entry point;
113  *       for example on Arm it will also set the Thumb mode bit based
114  *       on the least significant bit of the new PC value.
115  *       If the target behaviour here is anything other than "set
116  *       the PC register to the value passed in" then the target must
117  *       also implement the synchronize_from_tb hook.
118  * @get_pc: Callback for getting the Program Counter register.
119  *       As above, with the semantics of the target architecture.
120  * @gdb_read_register: Callback for letting GDB read a register.
121  * @gdb_write_register: Callback for letting GDB write a register.
122  * @gdb_adjust_breakpoint: Callback for adjusting the address of a
123  *       breakpoint.  Used by AVR to handle a gdb mis-feature with
124  *       its Harvard architecture split code and data.
125  * @gdb_num_core_regs: Number of core registers accessible to GDB.
126  * @gdb_core_xml_file: File name for core registers GDB XML description.
127  * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
128  *           before the insn which triggers a watchpoint rather than after it.
129  * @gdb_arch_name: Optional callback that returns the architecture name known
130  * to GDB. The caller must free the returned string with g_free.
131  * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
132  *   gdb stub. Returns a pointer to the XML contents for the specified XML file
133  *   or NULL if the CPU doesn't have a dynamically generated content for it.
134  * @disas_set_info: Setup architecture specific components of disassembly info
135  * @adjust_watchpoint_address: Perform a target-specific adjustment to an
136  * address before attempting to match it against watchpoints.
137  * @deprecation_note: If this CPUClass is deprecated, this field provides
138  *                    related information.
139  *
140  * Represents a CPU family or model.
141  */
142 struct CPUClass {
143     /*< private >*/
144     DeviceClass parent_class;
145     /*< public >*/
146 
147     ObjectClass *(*class_by_name)(const char *cpu_model);
148     void (*parse_features)(const char *typename, char *str, Error **errp);
149 
150     bool (*has_work)(CPUState *cpu);
151     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
152                            uint8_t *buf, int len, bool is_write);
153     void (*dump_state)(CPUState *cpu, FILE *, int flags);
154     int64_t (*get_arch_id)(CPUState *cpu);
155     void (*set_pc)(CPUState *cpu, vaddr value);
156     vaddr (*get_pc)(CPUState *cpu);
157     int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg);
158     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
159     vaddr (*gdb_adjust_breakpoint)(CPUState *cpu, vaddr addr);
160 
161     const char *gdb_core_xml_file;
162     gchar * (*gdb_arch_name)(CPUState *cpu);
163     const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname);
164 
165     void (*disas_set_info)(CPUState *cpu, disassemble_info *info);
166 
167     const char *deprecation_note;
168     struct AccelCPUClass *accel_cpu;
169 
170     /* when system emulation is not available, this pointer is NULL */
171     const struct SysemuCPUOps *sysemu_ops;
172 
173     /* when TCG is not available, this pointer is NULL */
174     const struct TCGCPUOps *tcg_ops;
175 
176     /*
177      * if not NULL, this is called in order for the CPUClass to initialize
178      * class data that depends on the accelerator, see accel/accel-common.c.
179      */
180     void (*init_accel_cpu)(struct AccelCPUClass *accel_cpu, CPUClass *cc);
181 
182     /*
183      * Keep non-pointer data at the end to minimize holes.
184      */
185     int reset_dump_flags;
186     int gdb_num_core_regs;
187     bool gdb_stop_before_watchpoint;
188 };
189 
190 /*
191  * Low 16 bits: number of cycles left, used only in icount mode.
192  * High 16 bits: Set to -1 to force TCG to stop executing linked TBs
193  * for this CPU and return to its top level loop (even in non-icount mode).
194  * This allows a single read-compare-cbranch-write sequence to test
195  * for both decrementer underflow and exceptions.
196  */
197 typedef union IcountDecr {
198     uint32_t u32;
199     struct {
200 #if HOST_BIG_ENDIAN
201         uint16_t high;
202         uint16_t low;
203 #else
204         uint16_t low;
205         uint16_t high;
206 #endif
207     } u16;
208 } IcountDecr;
209 
210 typedef struct CPUBreakpoint {
211     vaddr pc;
212     int flags; /* BP_* */
213     QTAILQ_ENTRY(CPUBreakpoint) entry;
214 } CPUBreakpoint;
215 
216 struct CPUWatchpoint {
217     vaddr vaddr;
218     vaddr len;
219     vaddr hitaddr;
220     MemTxAttrs hitattrs;
221     int flags; /* BP_* */
222     QTAILQ_ENTRY(CPUWatchpoint) entry;
223 };
224 
225 #ifdef CONFIG_PLUGIN
226 /*
227  * For plugins we sometime need to save the resolved iotlb data before
228  * the memory regions get moved around  by io_writex.
229  */
230 typedef struct SavedIOTLB {
231     MemoryRegionSection *section;
232     hwaddr mr_offset;
233 } SavedIOTLB;
234 #endif
235 
236 struct KVMState;
237 struct kvm_run;
238 
239 struct hax_vcpu_state;
240 struct hvf_vcpu_state;
241 
242 /* work queue */
243 
244 /* The union type allows passing of 64 bit target pointers on 32 bit
245  * hosts in a single parameter
246  */
247 typedef union {
248     int           host_int;
249     unsigned long host_ulong;
250     void         *host_ptr;
251     vaddr         target_ptr;
252 } run_on_cpu_data;
253 
254 #define RUN_ON_CPU_HOST_PTR(p)    ((run_on_cpu_data){.host_ptr = (p)})
255 #define RUN_ON_CPU_HOST_INT(i)    ((run_on_cpu_data){.host_int = (i)})
256 #define RUN_ON_CPU_HOST_ULONG(ul) ((run_on_cpu_data){.host_ulong = (ul)})
257 #define RUN_ON_CPU_TARGET_PTR(v)  ((run_on_cpu_data){.target_ptr = (v)})
258 #define RUN_ON_CPU_NULL           RUN_ON_CPU_HOST_PTR(NULL)
259 
260 typedef void (*run_on_cpu_func)(CPUState *cpu, run_on_cpu_data data);
261 
262 struct qemu_work_item;
263 
264 #define CPU_UNSET_NUMA_NODE_ID -1
265 #define CPU_TRACE_DSTATE_MAX_EVENTS 32
266 
267 /**
268  * CPUState:
269  * @cpu_index: CPU index (informative).
270  * @cluster_index: Identifies which cluster this CPU is in.
271  *   For boards which don't define clusters or for "loose" CPUs not assigned
272  *   to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
273  *   be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
274  *   QOM parent.
275  *   Under TCG this value is propagated to @tcg_cflags.
276  *   See TranslationBlock::TCG CF_CLUSTER_MASK.
277  * @tcg_cflags: Pre-computed cflags for this cpu.
278  * @nr_cores: Number of cores within this CPU package.
279  * @nr_threads: Number of threads within this CPU.
280  * @running: #true if CPU is currently running (lockless).
281  * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
282  * valid under cpu_list_lock.
283  * @created: Indicates whether the CPU thread has been successfully created.
284  * @interrupt_request: Indicates a pending interrupt request.
285  * @halted: Nonzero if the CPU is in suspended state.
286  * @stop: Indicates a pending stop request.
287  * @stopped: Indicates the CPU has been artificially stopped.
288  * @unplug: Indicates a pending CPU unplug request.
289  * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
290  * @singlestep_enabled: Flags for single-stepping.
291  * @icount_extra: Instructions until next timer event.
292  * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
293  * requires that IO only be performed on the last instruction of a TB
294  * so that interrupts take effect immediately.
295  * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
296  *            AddressSpaces this CPU has)
297  * @num_ases: number of CPUAddressSpaces in @cpu_ases
298  * @as: Pointer to the first AddressSpace, for the convenience of targets which
299  *      only have a single AddressSpace
300  * @env_ptr: Pointer to subclass-specific CPUArchState field.
301  * @icount_decr_ptr: Pointer to IcountDecr field within subclass.
302  * @gdb_regs: Additional GDB registers.
303  * @gdb_num_regs: Number of total registers accessible to GDB.
304  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
305  * @next_cpu: Next CPU sharing TB cache.
306  * @opaque: User data.
307  * @mem_io_pc: Host Program Counter at which the memory was accessed.
308  * @kvm_fd: vCPU file descriptor for KVM.
309  * @work_mutex: Lock to prevent multiple access to @work_list.
310  * @work_list: List of pending asynchronous work.
311  * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
312  *                        to @trace_dstate).
313  * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
314  * @plugin_mask: Plugin event bitmap. Modified only via async work.
315  * @ignore_memory_transaction_failures: Cached copy of the MachineState
316  *    flag of the same name: allows the board to suppress calling of the
317  *    CPU do_transaction_failed hook function.
318  * @kvm_dirty_gfns: Points to the KVM dirty ring for this CPU when KVM dirty
319  *    ring is enabled.
320  * @kvm_fetch_index: Keeps the index that we last fetched from the per-vCPU
321  *    dirty ring structure.
322  *
323  * State of one CPU core or thread.
324  */
325 struct CPUState {
326     /*< private >*/
327     DeviceState parent_obj;
328     /* cache to avoid expensive CPU_GET_CLASS */
329     CPUClass *cc;
330     /*< public >*/
331 
332     int nr_cores;
333     int nr_threads;
334 
335     struct QemuThread *thread;
336 #ifdef _WIN32
337     HANDLE hThread;
338     QemuSemaphore sem;
339 #endif
340     int thread_id;
341     bool running, has_waiter;
342     struct QemuCond *halt_cond;
343     bool thread_kicked;
344     bool created;
345     bool stop;
346     bool stopped;
347 
348     /* Should CPU start in powered-off state? */
349     bool start_powered_off;
350 
351     bool unplug;
352     bool crash_occurred;
353     bool exit_request;
354     int exclusive_context_count;
355     uint32_t cflags_next_tb;
356     /* updates protected by BQL */
357     uint32_t interrupt_request;
358     int singlestep_enabled;
359     int64_t icount_budget;
360     int64_t icount_extra;
361     uint64_t random_seed;
362     sigjmp_buf jmp_env;
363 
364     QemuMutex work_mutex;
365     QSIMPLEQ_HEAD(, qemu_work_item) work_list;
366 
367     CPUAddressSpace *cpu_ases;
368     int num_ases;
369     AddressSpace *as;
370     MemoryRegion *memory;
371 
372     CPUArchState *env_ptr;
373     IcountDecr *icount_decr_ptr;
374 
375     CPUJumpCache *tb_jmp_cache;
376 
377     struct GDBRegisterState *gdb_regs;
378     int gdb_num_regs;
379     int gdb_num_g_regs;
380     QTAILQ_ENTRY(CPUState) node;
381 
382     /* ice debug support */
383     QTAILQ_HEAD(, CPUBreakpoint) breakpoints;
384 
385     QTAILQ_HEAD(, CPUWatchpoint) watchpoints;
386     CPUWatchpoint *watchpoint_hit;
387 
388     void *opaque;
389 
390     /* In order to avoid passing too many arguments to the MMIO helpers,
391      * we store some rarely used information in the CPU context.
392      */
393     uintptr_t mem_io_pc;
394 
395     /* Only used in KVM */
396     int kvm_fd;
397     struct KVMState *kvm_state;
398     struct kvm_run *kvm_run;
399     struct kvm_dirty_gfn *kvm_dirty_gfns;
400     uint32_t kvm_fetch_index;
401     uint64_t dirty_pages;
402 
403     /* Use by accel-block: CPU is executing an ioctl() */
404     QemuLockCnt in_ioctl_lock;
405 
406     /* Used for events with 'vcpu' and *without* the 'disabled' properties */
407     DECLARE_BITMAP(trace_dstate_delayed, CPU_TRACE_DSTATE_MAX_EVENTS);
408     DECLARE_BITMAP(trace_dstate, CPU_TRACE_DSTATE_MAX_EVENTS);
409 
410     DECLARE_BITMAP(plugin_mask, QEMU_PLUGIN_EV_MAX);
411 
412 #ifdef CONFIG_PLUGIN
413     GArray *plugin_mem_cbs;
414     /* saved iotlb data from io_writex */
415     SavedIOTLB saved_iotlb;
416 #endif
417 
418     /* TODO Move common fields from CPUArchState here. */
419     int cpu_index;
420     int cluster_index;
421     uint32_t tcg_cflags;
422     uint32_t halted;
423     uint32_t can_do_io;
424     int32_t exception_index;
425 
426     /* shared by kvm, hax and hvf */
427     bool vcpu_dirty;
428 
429     /* Used to keep track of an outstanding cpu throttle thread for migration
430      * autoconverge
431      */
432     bool throttle_thread_scheduled;
433 
434     /*
435      * Sleep throttle_us_per_full microseconds once dirty ring is full
436      * if dirty page rate limit is enabled.
437      */
438     int64_t throttle_us_per_full;
439 
440     bool ignore_memory_transaction_failures;
441 
442     /* Used for user-only emulation of prctl(PR_SET_UNALIGN). */
443     bool prctl_unalign_sigbus;
444 
445     struct hax_vcpu_state *hax_vcpu;
446 
447     struct hvf_vcpu_state *hvf;
448 
449     /* track IOMMUs whose translations we've cached in the TCG TLB */
450     GArray *iommu_notifiers;
451 };
452 
453 typedef QTAILQ_HEAD(CPUTailQ, CPUState) CPUTailQ;
454 extern CPUTailQ cpus;
455 
456 #define first_cpu        QTAILQ_FIRST_RCU(&cpus)
457 #define CPU_NEXT(cpu)    QTAILQ_NEXT_RCU(cpu, node)
458 #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node)
459 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
460     QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
461 
462 extern __thread CPUState *current_cpu;
463 
464 /**
465  * qemu_tcg_mttcg_enabled:
466  * Check whether we are running MultiThread TCG or not.
467  *
468  * Returns: %true if we are in MTTCG mode %false otherwise.
469  */
470 extern bool mttcg_enabled;
471 #define qemu_tcg_mttcg_enabled() (mttcg_enabled)
472 
473 /**
474  * cpu_paging_enabled:
475  * @cpu: The CPU whose state is to be inspected.
476  *
477  * Returns: %true if paging is enabled, %false otherwise.
478  */
479 bool cpu_paging_enabled(const CPUState *cpu);
480 
481 /**
482  * cpu_get_memory_mapping:
483  * @cpu: The CPU whose memory mappings are to be obtained.
484  * @list: Where to write the memory mappings to.
485  * @errp: Pointer for reporting an #Error.
486  */
487 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
488                             Error **errp);
489 
490 #if !defined(CONFIG_USER_ONLY)
491 
492 /**
493  * cpu_write_elf64_note:
494  * @f: pointer to a function that writes memory to a file
495  * @cpu: The CPU whose memory is to be dumped
496  * @cpuid: ID number of the CPU
497  * @opaque: pointer to the CPUState struct
498  */
499 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
500                          int cpuid, void *opaque);
501 
502 /**
503  * cpu_write_elf64_qemunote:
504  * @f: pointer to a function that writes memory to a file
505  * @cpu: The CPU whose memory is to be dumped
506  * @cpuid: ID number of the CPU
507  * @opaque: pointer to the CPUState struct
508  */
509 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
510                              void *opaque);
511 
512 /**
513  * cpu_write_elf32_note:
514  * @f: pointer to a function that writes memory to a file
515  * @cpu: The CPU whose memory is to be dumped
516  * @cpuid: ID number of the CPU
517  * @opaque: pointer to the CPUState struct
518  */
519 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
520                          int cpuid, void *opaque);
521 
522 /**
523  * cpu_write_elf32_qemunote:
524  * @f: pointer to a function that writes memory to a file
525  * @cpu: The CPU whose memory is to be dumped
526  * @cpuid: ID number of the CPU
527  * @opaque: pointer to the CPUState struct
528  */
529 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
530                              void *opaque);
531 
532 /**
533  * cpu_get_crash_info:
534  * @cpu: The CPU to get crash information for
535  *
536  * Gets the previously saved crash information.
537  * Caller is responsible for freeing the data.
538  */
539 GuestPanicInformation *cpu_get_crash_info(CPUState *cpu);
540 
541 #endif /* !CONFIG_USER_ONLY */
542 
543 /**
544  * CPUDumpFlags:
545  * @CPU_DUMP_CODE:
546  * @CPU_DUMP_FPU: dump FPU register state, not just integer
547  * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
548  */
549 enum CPUDumpFlags {
550     CPU_DUMP_CODE = 0x00010000,
551     CPU_DUMP_FPU  = 0x00020000,
552     CPU_DUMP_CCOP = 0x00040000,
553 };
554 
555 /**
556  * cpu_dump_state:
557  * @cpu: The CPU whose state is to be dumped.
558  * @f: If non-null, dump to this stream, else to current print sink.
559  *
560  * Dumps CPU state.
561  */
562 void cpu_dump_state(CPUState *cpu, FILE *f, int flags);
563 
564 #ifndef CONFIG_USER_ONLY
565 /**
566  * cpu_get_phys_page_attrs_debug:
567  * @cpu: The CPU to obtain the physical page address for.
568  * @addr: The virtual address.
569  * @attrs: Updated on return with the memory transaction attributes to use
570  *         for this access.
571  *
572  * Obtains the physical page corresponding to a virtual one, together
573  * with the corresponding memory transaction attributes to use for the access.
574  * Use it only for debugging because no protection checks are done.
575  *
576  * Returns: Corresponding physical page address or -1 if no page found.
577  */
578 hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
579                                      MemTxAttrs *attrs);
580 
581 /**
582  * cpu_get_phys_page_debug:
583  * @cpu: The CPU to obtain the physical page address for.
584  * @addr: The virtual address.
585  *
586  * Obtains the physical page corresponding to a virtual one.
587  * Use it only for debugging because no protection checks are done.
588  *
589  * Returns: Corresponding physical page address or -1 if no page found.
590  */
591 hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
592 
593 /** cpu_asidx_from_attrs:
594  * @cpu: CPU
595  * @attrs: memory transaction attributes
596  *
597  * Returns the address space index specifying the CPU AddressSpace
598  * to use for a memory access with the given transaction attributes.
599  */
600 int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs);
601 
602 /**
603  * cpu_virtio_is_big_endian:
604  * @cpu: CPU
605 
606  * Returns %true if a CPU which supports runtime configurable endianness
607  * is currently big-endian.
608  */
609 bool cpu_virtio_is_big_endian(CPUState *cpu);
610 
611 #endif /* CONFIG_USER_ONLY */
612 
613 /**
614  * cpu_list_add:
615  * @cpu: The CPU to be added to the list of CPUs.
616  */
617 void cpu_list_add(CPUState *cpu);
618 
619 /**
620  * cpu_list_remove:
621  * @cpu: The CPU to be removed from the list of CPUs.
622  */
623 void cpu_list_remove(CPUState *cpu);
624 
625 /**
626  * cpu_reset:
627  * @cpu: The CPU whose state is to be reset.
628  */
629 void cpu_reset(CPUState *cpu);
630 
631 /**
632  * cpu_class_by_name:
633  * @typename: The CPU base type.
634  * @cpu_model: The model string without any parameters.
635  *
636  * Looks up a CPU #ObjectClass matching name @cpu_model.
637  *
638  * Returns: A #CPUClass or %NULL if not matching class is found.
639  */
640 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
641 
642 /**
643  * cpu_create:
644  * @typename: The CPU type.
645  *
646  * Instantiates a CPU and realizes the CPU.
647  *
648  * Returns: A #CPUState or %NULL if an error occurred.
649  */
650 CPUState *cpu_create(const char *typename);
651 
652 /**
653  * parse_cpu_option:
654  * @cpu_option: The -cpu option including optional parameters.
655  *
656  * processes optional parameters and registers them as global properties
657  *
658  * Returns: type of CPU to create or prints error and terminates process
659  *          if an error occurred.
660  */
661 const char *parse_cpu_option(const char *cpu_option);
662 
663 /**
664  * cpu_has_work:
665  * @cpu: The vCPU to check.
666  *
667  * Checks whether the CPU has work to do.
668  *
669  * Returns: %true if the CPU has work, %false otherwise.
670  */
671 static inline bool cpu_has_work(CPUState *cpu)
672 {
673     CPUClass *cc = CPU_GET_CLASS(cpu);
674 
675     g_assert(cc->has_work);
676     return cc->has_work(cpu);
677 }
678 
679 /**
680  * qemu_cpu_is_self:
681  * @cpu: The vCPU to check against.
682  *
683  * Checks whether the caller is executing on the vCPU thread.
684  *
685  * Returns: %true if called from @cpu's thread, %false otherwise.
686  */
687 bool qemu_cpu_is_self(CPUState *cpu);
688 
689 /**
690  * qemu_cpu_kick:
691  * @cpu: The vCPU to kick.
692  *
693  * Kicks @cpu's thread.
694  */
695 void qemu_cpu_kick(CPUState *cpu);
696 
697 /**
698  * cpu_is_stopped:
699  * @cpu: The CPU to check.
700  *
701  * Checks whether the CPU is stopped.
702  *
703  * Returns: %true if run state is not running or if artificially stopped;
704  * %false otherwise.
705  */
706 bool cpu_is_stopped(CPUState *cpu);
707 
708 /**
709  * do_run_on_cpu:
710  * @cpu: The vCPU to run on.
711  * @func: The function to be executed.
712  * @data: Data to pass to the function.
713  * @mutex: Mutex to release while waiting for @func to run.
714  *
715  * Used internally in the implementation of run_on_cpu.
716  */
717 void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data,
718                    QemuMutex *mutex);
719 
720 /**
721  * run_on_cpu:
722  * @cpu: The vCPU to run on.
723  * @func: The function to be executed.
724  * @data: Data to pass to the function.
725  *
726  * Schedules the function @func for execution on the vCPU @cpu.
727  */
728 void run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
729 
730 /**
731  * async_run_on_cpu:
732  * @cpu: The vCPU to run on.
733  * @func: The function to be executed.
734  * @data: Data to pass to the function.
735  *
736  * Schedules the function @func for execution on the vCPU @cpu asynchronously.
737  */
738 void async_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
739 
740 /**
741  * async_safe_run_on_cpu:
742  * @cpu: The vCPU to run on.
743  * @func: The function to be executed.
744  * @data: Data to pass to the function.
745  *
746  * Schedules the function @func for execution on the vCPU @cpu asynchronously,
747  * while all other vCPUs are sleeping.
748  *
749  * Unlike run_on_cpu and async_run_on_cpu, the function is run outside the
750  * BQL.
751  */
752 void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
753 
754 /**
755  * cpu_in_exclusive_context()
756  * @cpu: The vCPU to check
757  *
758  * Returns true if @cpu is an exclusive context, for example running
759  * something which has previously been queued via async_safe_run_on_cpu().
760  */
761 static inline bool cpu_in_exclusive_context(const CPUState *cpu)
762 {
763     return cpu->exclusive_context_count;
764 }
765 
766 /**
767  * qemu_get_cpu:
768  * @index: The CPUState@cpu_index value of the CPU to obtain.
769  *
770  * Gets a CPU matching @index.
771  *
772  * Returns: The CPU or %NULL if there is no matching CPU.
773  */
774 CPUState *qemu_get_cpu(int index);
775 
776 /**
777  * cpu_exists:
778  * @id: Guest-exposed CPU ID to lookup.
779  *
780  * Search for CPU with specified ID.
781  *
782  * Returns: %true - CPU is found, %false - CPU isn't found.
783  */
784 bool cpu_exists(int64_t id);
785 
786 /**
787  * cpu_by_arch_id:
788  * @id: Guest-exposed CPU ID of the CPU to obtain.
789  *
790  * Get a CPU with matching @id.
791  *
792  * Returns: The CPU or %NULL if there is no matching CPU.
793  */
794 CPUState *cpu_by_arch_id(int64_t id);
795 
796 /**
797  * cpu_interrupt:
798  * @cpu: The CPU to set an interrupt on.
799  * @mask: The interrupts to set.
800  *
801  * Invokes the interrupt handler.
802  */
803 
804 void cpu_interrupt(CPUState *cpu, int mask);
805 
806 /**
807  * cpu_set_pc:
808  * @cpu: The CPU to set the program counter for.
809  * @addr: Program counter value.
810  *
811  * Sets the program counter for a CPU.
812  */
813 static inline void cpu_set_pc(CPUState *cpu, vaddr addr)
814 {
815     CPUClass *cc = CPU_GET_CLASS(cpu);
816 
817     cc->set_pc(cpu, addr);
818 }
819 
820 /**
821  * cpu_reset_interrupt:
822  * @cpu: The CPU to clear the interrupt on.
823  * @mask: The interrupt mask to clear.
824  *
825  * Resets interrupts on the vCPU @cpu.
826  */
827 void cpu_reset_interrupt(CPUState *cpu, int mask);
828 
829 /**
830  * cpu_exit:
831  * @cpu: The CPU to exit.
832  *
833  * Requests the CPU @cpu to exit execution.
834  */
835 void cpu_exit(CPUState *cpu);
836 
837 /**
838  * cpu_resume:
839  * @cpu: The CPU to resume.
840  *
841  * Resumes CPU, i.e. puts CPU into runnable state.
842  */
843 void cpu_resume(CPUState *cpu);
844 
845 /**
846  * cpu_remove_sync:
847  * @cpu: The CPU to remove.
848  *
849  * Requests the CPU to be removed and waits till it is removed.
850  */
851 void cpu_remove_sync(CPUState *cpu);
852 
853 /**
854  * process_queued_cpu_work() - process all items on CPU work queue
855  * @cpu: The CPU which work queue to process.
856  */
857 void process_queued_cpu_work(CPUState *cpu);
858 
859 /**
860  * cpu_exec_start:
861  * @cpu: The CPU for the current thread.
862  *
863  * Record that a CPU has started execution and can be interrupted with
864  * cpu_exit.
865  */
866 void cpu_exec_start(CPUState *cpu);
867 
868 /**
869  * cpu_exec_end:
870  * @cpu: The CPU for the current thread.
871  *
872  * Record that a CPU has stopped execution and exclusive sections
873  * can be executed without interrupting it.
874  */
875 void cpu_exec_end(CPUState *cpu);
876 
877 /**
878  * start_exclusive:
879  *
880  * Wait for a concurrent exclusive section to end, and then start
881  * a section of work that is run while other CPUs are not running
882  * between cpu_exec_start and cpu_exec_end.  CPUs that are running
883  * cpu_exec are exited immediately.  CPUs that call cpu_exec_start
884  * during the exclusive section go to sleep until this CPU calls
885  * end_exclusive.
886  */
887 void start_exclusive(void);
888 
889 /**
890  * end_exclusive:
891  *
892  * Concludes an exclusive execution section started by start_exclusive.
893  */
894 void end_exclusive(void);
895 
896 /**
897  * qemu_init_vcpu:
898  * @cpu: The vCPU to initialize.
899  *
900  * Initializes a vCPU.
901  */
902 void qemu_init_vcpu(CPUState *cpu);
903 
904 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
905 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
906 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
907 
908 /**
909  * cpu_single_step:
910  * @cpu: CPU to the flags for.
911  * @enabled: Flags to enable.
912  *
913  * Enables or disables single-stepping for @cpu.
914  */
915 void cpu_single_step(CPUState *cpu, int enabled);
916 
917 /* Breakpoint/watchpoint flags */
918 #define BP_MEM_READ           0x01
919 #define BP_MEM_WRITE          0x02
920 #define BP_MEM_ACCESS         (BP_MEM_READ | BP_MEM_WRITE)
921 #define BP_STOP_BEFORE_ACCESS 0x04
922 /* 0x08 currently unused */
923 #define BP_GDB                0x10
924 #define BP_CPU                0x20
925 #define BP_ANY                (BP_GDB | BP_CPU)
926 #define BP_HIT_SHIFT          6
927 #define BP_WATCHPOINT_HIT_READ  (BP_MEM_READ << BP_HIT_SHIFT)
928 #define BP_WATCHPOINT_HIT_WRITE (BP_MEM_WRITE << BP_HIT_SHIFT)
929 #define BP_WATCHPOINT_HIT       (BP_MEM_ACCESS << BP_HIT_SHIFT)
930 
931 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
932                           CPUBreakpoint **breakpoint);
933 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
934 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
935 void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
936 
937 /* Return true if PC matches an installed breakpoint.  */
938 static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask)
939 {
940     CPUBreakpoint *bp;
941 
942     if (unlikely(!QTAILQ_EMPTY(&cpu->breakpoints))) {
943         QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
944             if (bp->pc == pc && (bp->flags & mask)) {
945                 return true;
946             }
947         }
948     }
949     return false;
950 }
951 
952 #if defined(CONFIG_USER_ONLY)
953 static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
954                                         int flags, CPUWatchpoint **watchpoint)
955 {
956     return -ENOSYS;
957 }
958 
959 static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
960                                         vaddr len, int flags)
961 {
962     return -ENOSYS;
963 }
964 
965 static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu,
966                                                 CPUWatchpoint *wp)
967 {
968 }
969 
970 static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
971 {
972 }
973 #else
974 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
975                           int flags, CPUWatchpoint **watchpoint);
976 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
977                           vaddr len, int flags);
978 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
979 void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
980 #endif
981 
982 /**
983  * cpu_get_address_space:
984  * @cpu: CPU to get address space from
985  * @asidx: index identifying which address space to get
986  *
987  * Return the requested address space of this CPU. @asidx
988  * specifies which address space to read.
989  */
990 AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx);
991 
992 G_NORETURN void cpu_abort(CPUState *cpu, const char *fmt, ...)
993     G_GNUC_PRINTF(2, 3);
994 
995 /* $(top_srcdir)/cpu.c */
996 void cpu_class_init_props(DeviceClass *dc);
997 void cpu_exec_initfn(CPUState *cpu);
998 void cpu_exec_realizefn(CPUState *cpu, Error **errp);
999 void cpu_exec_unrealizefn(CPUState *cpu);
1000 
1001 /**
1002  * target_words_bigendian:
1003  * Returns true if the (default) endianness of the target is big endian,
1004  * false otherwise. Note that in target-specific code, you can use
1005  * TARGET_BIG_ENDIAN directly instead. On the other hand, common
1006  * code should normally never need to know about the endianness of the
1007  * target, so please do *not* use this function unless you know very well
1008  * what you are doing!
1009  */
1010 bool target_words_bigendian(void);
1011 
1012 void page_size_init(void);
1013 
1014 #ifdef NEED_CPU_H
1015 
1016 #ifdef CONFIG_SOFTMMU
1017 
1018 extern const VMStateDescription vmstate_cpu_common;
1019 
1020 #define VMSTATE_CPU() {                                                     \
1021     .name = "parent_obj",                                                   \
1022     .size = sizeof(CPUState),                                               \
1023     .vmsd = &vmstate_cpu_common,                                            \
1024     .flags = VMS_STRUCT,                                                    \
1025     .offset = 0,                                                            \
1026 }
1027 #endif /* CONFIG_SOFTMMU */
1028 
1029 #endif /* NEED_CPU_H */
1030 
1031 #define UNASSIGNED_CPU_INDEX -1
1032 #define UNASSIGNED_CLUSTER_INDEX -1
1033 
1034 #endif
1035