xref: /openbmc/qemu/include/hw/core/cpu.h (revision 39324b49)
1 /*
2  * QEMU CPU model
3  *
4  * Copyright (c) 2012 SUSE LINUX Products GmbH
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version 2
9  * of the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, see
18  * <http://www.gnu.org/licenses/gpl-2.0.html>
19  */
20 #ifndef QEMU_CPU_H
21 #define QEMU_CPU_H
22 
23 #include "hw/qdev-core.h"
24 #include "disas/dis-asm.h"
25 #include "exec/cpu-common.h"
26 #include "exec/hwaddr.h"
27 #include "exec/memattrs.h"
28 #include "qapi/qapi-types-run-state.h"
29 #include "qemu/bitmap.h"
30 #include "qemu/rcu_queue.h"
31 #include "qemu/queue.h"
32 #include "qemu/thread.h"
33 #include "qemu/plugin-event.h"
34 #include "qom/object.h"
35 
36 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
37                                      void *opaque);
38 
39 /**
40  * SECTION:cpu
41  * @section_id: QEMU-cpu
42  * @title: CPU Class
43  * @short_description: Base class for all CPUs
44  */
45 
46 #define TYPE_CPU "cpu"
47 
48 /* Since this macro is used a lot in hot code paths and in conjunction with
49  * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
50  * an unchecked cast.
51  */
52 #define CPU(obj) ((CPUState *)(obj))
53 
54 /*
55  * The class checkers bring in CPU_GET_CLASS() which is potentially
56  * expensive given the eventual call to
57  * object_class_dynamic_cast_assert(). Because of this the CPUState
58  * has a cached value for the class in cs->cc which is set up in
59  * cpu_exec_realizefn() for use in hot code paths.
60  */
61 typedef struct CPUClass CPUClass;
62 DECLARE_CLASS_CHECKERS(CPUClass, CPU,
63                        TYPE_CPU)
64 
65 /**
66  * OBJECT_DECLARE_CPU_TYPE:
67  * @CpuInstanceType: instance struct name
68  * @CpuClassType: class struct name
69  * @CPU_MODULE_OBJ_NAME: the CPU name in uppercase with underscore separators
70  *
71  * This macro is typically used in "cpu-qom.h" header file, and will:
72  *
73  *   - create the typedefs for the CPU object and class structs
74  *   - register the type for use with g_autoptr
75  *   - provide three standard type cast functions
76  *
77  * The object struct and class struct need to be declared manually.
78  */
79 #define OBJECT_DECLARE_CPU_TYPE(CpuInstanceType, CpuClassType, CPU_MODULE_OBJ_NAME) \
80     typedef struct ArchCPU CpuInstanceType; \
81     OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME);
82 
83 typedef enum MMUAccessType {
84     MMU_DATA_LOAD  = 0,
85     MMU_DATA_STORE = 1,
86     MMU_INST_FETCH = 2
87 #define MMU_ACCESS_COUNT 3
88 } MMUAccessType;
89 
90 typedef struct CPUWatchpoint CPUWatchpoint;
91 
92 /* see tcg-cpu-ops.h */
93 struct TCGCPUOps;
94 
95 /* see accel-cpu.h */
96 struct AccelCPUClass;
97 
98 /* see sysemu-cpu-ops.h */
99 struct SysemuCPUOps;
100 
101 /**
102  * CPUClass:
103  * @class_by_name: Callback to map -cpu command line model name to an
104  * instantiatable CPU type.
105  * @parse_features: Callback to parse command line arguments.
106  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
107  * @has_work: Callback for checking if there is work to do.
108  * @memory_rw_debug: Callback for GDB memory access.
109  * @dump_state: Callback for dumping state.
110  * @query_cpu_fast:
111  *       Fill in target specific information for the "query-cpus-fast"
112  *       QAPI call.
113  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
114  * @set_pc: Callback for setting the Program Counter register. This
115  *       should have the semantics used by the target architecture when
116  *       setting the PC from a source such as an ELF file entry point;
117  *       for example on Arm it will also set the Thumb mode bit based
118  *       on the least significant bit of the new PC value.
119  *       If the target behaviour here is anything other than "set
120  *       the PC register to the value passed in" then the target must
121  *       also implement the synchronize_from_tb hook.
122  * @get_pc: Callback for getting the Program Counter register.
123  *       As above, with the semantics of the target architecture.
124  * @gdb_read_register: Callback for letting GDB read a register.
125  * @gdb_write_register: Callback for letting GDB write a register.
126  * @gdb_adjust_breakpoint: Callback for adjusting the address of a
127  *       breakpoint.  Used by AVR to handle a gdb mis-feature with
128  *       its Harvard architecture split code and data.
129  * @gdb_num_core_regs: Number of core registers accessible to GDB.
130  * @gdb_core_xml_file: File name for core registers GDB XML description.
131  * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
132  *           before the insn which triggers a watchpoint rather than after it.
133  * @gdb_arch_name: Optional callback that returns the architecture name known
134  * to GDB. The caller must free the returned string with g_free.
135  * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
136  *   gdb stub. Returns a pointer to the XML contents for the specified XML file
137  *   or NULL if the CPU doesn't have a dynamically generated content for it.
138  * @disas_set_info: Setup architecture specific components of disassembly info
139  * @adjust_watchpoint_address: Perform a target-specific adjustment to an
140  * address before attempting to match it against watchpoints.
141  * @deprecation_note: If this CPUClass is deprecated, this field provides
142  *                    related information.
143  *
144  * Represents a CPU family or model.
145  */
146 struct CPUClass {
147     /*< private >*/
148     DeviceClass parent_class;
149     /*< public >*/
150 
151     ObjectClass *(*class_by_name)(const char *cpu_model);
152     void (*parse_features)(const char *typename, char *str, Error **errp);
153 
154     bool (*has_work)(CPUState *cpu);
155     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
156                            uint8_t *buf, int len, bool is_write);
157     void (*dump_state)(CPUState *cpu, FILE *, int flags);
158     void (*query_cpu_fast)(CPUState *cpu, CpuInfoFast *value);
159     int64_t (*get_arch_id)(CPUState *cpu);
160     void (*set_pc)(CPUState *cpu, vaddr value);
161     vaddr (*get_pc)(CPUState *cpu);
162     int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg);
163     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
164     vaddr (*gdb_adjust_breakpoint)(CPUState *cpu, vaddr addr);
165 
166     const char *gdb_core_xml_file;
167     gchar * (*gdb_arch_name)(CPUState *cpu);
168     const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname);
169 
170     void (*disas_set_info)(CPUState *cpu, disassemble_info *info);
171 
172     const char *deprecation_note;
173     struct AccelCPUClass *accel_cpu;
174 
175     /* when system emulation is not available, this pointer is NULL */
176     const struct SysemuCPUOps *sysemu_ops;
177 
178     /* when TCG is not available, this pointer is NULL */
179     const struct TCGCPUOps *tcg_ops;
180 
181     /*
182      * if not NULL, this is called in order for the CPUClass to initialize
183      * class data that depends on the accelerator, see accel/accel-common.c.
184      */
185     void (*init_accel_cpu)(struct AccelCPUClass *accel_cpu, CPUClass *cc);
186 
187     /*
188      * Keep non-pointer data at the end to minimize holes.
189      */
190     int reset_dump_flags;
191     int gdb_num_core_regs;
192     bool gdb_stop_before_watchpoint;
193 };
194 
195 /*
196  * Low 16 bits: number of cycles left, used only in icount mode.
197  * High 16 bits: Set to -1 to force TCG to stop executing linked TBs
198  * for this CPU and return to its top level loop (even in non-icount mode).
199  * This allows a single read-compare-cbranch-write sequence to test
200  * for both decrementer underflow and exceptions.
201  */
202 typedef union IcountDecr {
203     uint32_t u32;
204     struct {
205 #if HOST_BIG_ENDIAN
206         uint16_t high;
207         uint16_t low;
208 #else
209         uint16_t low;
210         uint16_t high;
211 #endif
212     } u16;
213 } IcountDecr;
214 
215 typedef struct CPUBreakpoint {
216     vaddr pc;
217     int flags; /* BP_* */
218     QTAILQ_ENTRY(CPUBreakpoint) entry;
219 } CPUBreakpoint;
220 
221 struct CPUWatchpoint {
222     vaddr vaddr;
223     vaddr len;
224     vaddr hitaddr;
225     MemTxAttrs hitattrs;
226     int flags; /* BP_* */
227     QTAILQ_ENTRY(CPUWatchpoint) entry;
228 };
229 
230 #ifdef CONFIG_PLUGIN
231 /*
232  * For plugins we sometime need to save the resolved iotlb data before
233  * the memory regions get moved around  by io_writex.
234  */
235 typedef struct SavedIOTLB {
236     MemoryRegionSection *section;
237     hwaddr mr_offset;
238 } SavedIOTLB;
239 #endif
240 
241 struct KVMState;
242 struct kvm_run;
243 
244 struct hax_vcpu_state;
245 struct hvf_vcpu_state;
246 
247 /* work queue */
248 
249 /* The union type allows passing of 64 bit target pointers on 32 bit
250  * hosts in a single parameter
251  */
252 typedef union {
253     int           host_int;
254     unsigned long host_ulong;
255     void         *host_ptr;
256     vaddr         target_ptr;
257 } run_on_cpu_data;
258 
259 #define RUN_ON_CPU_HOST_PTR(p)    ((run_on_cpu_data){.host_ptr = (p)})
260 #define RUN_ON_CPU_HOST_INT(i)    ((run_on_cpu_data){.host_int = (i)})
261 #define RUN_ON_CPU_HOST_ULONG(ul) ((run_on_cpu_data){.host_ulong = (ul)})
262 #define RUN_ON_CPU_TARGET_PTR(v)  ((run_on_cpu_data){.target_ptr = (v)})
263 #define RUN_ON_CPU_NULL           RUN_ON_CPU_HOST_PTR(NULL)
264 
265 typedef void (*run_on_cpu_func)(CPUState *cpu, run_on_cpu_data data);
266 
267 struct qemu_work_item;
268 
269 #define CPU_UNSET_NUMA_NODE_ID -1
270 
271 /**
272  * CPUState:
273  * @cpu_index: CPU index (informative).
274  * @cluster_index: Identifies which cluster this CPU is in.
275  *   For boards which don't define clusters or for "loose" CPUs not assigned
276  *   to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
277  *   be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
278  *   QOM parent.
279  *   Under TCG this value is propagated to @tcg_cflags.
280  *   See TranslationBlock::TCG CF_CLUSTER_MASK.
281  * @tcg_cflags: Pre-computed cflags for this cpu.
282  * @nr_cores: Number of cores within this CPU package.
283  * @nr_threads: Number of threads within this CPU.
284  * @running: #true if CPU is currently running (lockless).
285  * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
286  * valid under cpu_list_lock.
287  * @created: Indicates whether the CPU thread has been successfully created.
288  * @interrupt_request: Indicates a pending interrupt request.
289  * @halted: Nonzero if the CPU is in suspended state.
290  * @stop: Indicates a pending stop request.
291  * @stopped: Indicates the CPU has been artificially stopped.
292  * @unplug: Indicates a pending CPU unplug request.
293  * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
294  * @singlestep_enabled: Flags for single-stepping.
295  * @icount_extra: Instructions until next timer event.
296  * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
297  * requires that IO only be performed on the last instruction of a TB
298  * so that interrupts take effect immediately.
299  * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
300  *            AddressSpaces this CPU has)
301  * @num_ases: number of CPUAddressSpaces in @cpu_ases
302  * @as: Pointer to the first AddressSpace, for the convenience of targets which
303  *      only have a single AddressSpace
304  * @env_ptr: Pointer to subclass-specific CPUArchState field.
305  * @icount_decr_ptr: Pointer to IcountDecr field within subclass.
306  * @gdb_regs: Additional GDB registers.
307  * @gdb_num_regs: Number of total registers accessible to GDB.
308  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
309  * @next_cpu: Next CPU sharing TB cache.
310  * @opaque: User data.
311  * @mem_io_pc: Host Program Counter at which the memory was accessed.
312  * @kvm_fd: vCPU file descriptor for KVM.
313  * @work_mutex: Lock to prevent multiple access to @work_list.
314  * @work_list: List of pending asynchronous work.
315  * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
316  *                        to @trace_dstate).
317  * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
318  * @plugin_mask: Plugin event bitmap. Modified only via async work.
319  * @ignore_memory_transaction_failures: Cached copy of the MachineState
320  *    flag of the same name: allows the board to suppress calling of the
321  *    CPU do_transaction_failed hook function.
322  * @kvm_dirty_gfns: Points to the KVM dirty ring for this CPU when KVM dirty
323  *    ring is enabled.
324  * @kvm_fetch_index: Keeps the index that we last fetched from the per-vCPU
325  *    dirty ring structure.
326  *
327  * State of one CPU core or thread.
328  */
329 struct CPUState {
330     /*< private >*/
331     DeviceState parent_obj;
332     /* cache to avoid expensive CPU_GET_CLASS */
333     CPUClass *cc;
334     /*< public >*/
335 
336     int nr_cores;
337     int nr_threads;
338 
339     struct QemuThread *thread;
340 #ifdef _WIN32
341     HANDLE hThread;
342     QemuSemaphore sem;
343 #endif
344     int thread_id;
345     bool running, has_waiter;
346     struct QemuCond *halt_cond;
347     bool thread_kicked;
348     bool created;
349     bool stop;
350     bool stopped;
351 
352     /* Should CPU start in powered-off state? */
353     bool start_powered_off;
354 
355     bool unplug;
356     bool crash_occurred;
357     bool exit_request;
358     int exclusive_context_count;
359     uint32_t cflags_next_tb;
360     /* updates protected by BQL */
361     uint32_t interrupt_request;
362     int singlestep_enabled;
363     int64_t icount_budget;
364     int64_t icount_extra;
365     uint64_t random_seed;
366     sigjmp_buf jmp_env;
367 
368     QemuMutex work_mutex;
369     QSIMPLEQ_HEAD(, qemu_work_item) work_list;
370 
371     CPUAddressSpace *cpu_ases;
372     int num_ases;
373     AddressSpace *as;
374     MemoryRegion *memory;
375 
376     CPUArchState *env_ptr;
377     IcountDecr *icount_decr_ptr;
378 
379     CPUJumpCache *tb_jmp_cache;
380 
381     struct GDBRegisterState *gdb_regs;
382     int gdb_num_regs;
383     int gdb_num_g_regs;
384     QTAILQ_ENTRY(CPUState) node;
385 
386     /* ice debug support */
387     QTAILQ_HEAD(, CPUBreakpoint) breakpoints;
388 
389     QTAILQ_HEAD(, CPUWatchpoint) watchpoints;
390     CPUWatchpoint *watchpoint_hit;
391 
392     void *opaque;
393 
394     /* In order to avoid passing too many arguments to the MMIO helpers,
395      * we store some rarely used information in the CPU context.
396      */
397     uintptr_t mem_io_pc;
398 
399     /* Only used in KVM */
400     int kvm_fd;
401     struct KVMState *kvm_state;
402     struct kvm_run *kvm_run;
403     struct kvm_dirty_gfn *kvm_dirty_gfns;
404     uint32_t kvm_fetch_index;
405     uint64_t dirty_pages;
406     int kvm_vcpu_stats_fd;
407 
408     /* Use by accel-block: CPU is executing an ioctl() */
409     QemuLockCnt in_ioctl_lock;
410 
411     DECLARE_BITMAP(plugin_mask, QEMU_PLUGIN_EV_MAX);
412 
413 #ifdef CONFIG_PLUGIN
414     GArray *plugin_mem_cbs;
415     /* saved iotlb data from io_writex */
416     SavedIOTLB saved_iotlb;
417 #endif
418 
419     /* TODO Move common fields from CPUArchState here. */
420     int cpu_index;
421     int cluster_index;
422     uint32_t tcg_cflags;
423     uint32_t halted;
424     uint32_t can_do_io;
425     int32_t exception_index;
426 
427     /* shared by kvm, hax and hvf */
428     bool vcpu_dirty;
429 
430     /* Used to keep track of an outstanding cpu throttle thread for migration
431      * autoconverge
432      */
433     bool throttle_thread_scheduled;
434 
435     /*
436      * Sleep throttle_us_per_full microseconds once dirty ring is full
437      * if dirty page rate limit is enabled.
438      */
439     int64_t throttle_us_per_full;
440 
441     bool ignore_memory_transaction_failures;
442 
443     /* Used for user-only emulation of prctl(PR_SET_UNALIGN). */
444     bool prctl_unalign_sigbus;
445 
446     struct hax_vcpu_state *hax_vcpu;
447 
448     struct hvf_vcpu_state *hvf;
449 
450     /* track IOMMUs whose translations we've cached in the TCG TLB */
451     GArray *iommu_notifiers;
452 };
453 
454 typedef QTAILQ_HEAD(CPUTailQ, CPUState) CPUTailQ;
455 extern CPUTailQ cpus;
456 
457 #define first_cpu        QTAILQ_FIRST_RCU(&cpus)
458 #define CPU_NEXT(cpu)    QTAILQ_NEXT_RCU(cpu, node)
459 #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node)
460 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
461     QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
462 
463 extern __thread CPUState *current_cpu;
464 
465 /**
466  * qemu_tcg_mttcg_enabled:
467  * Check whether we are running MultiThread TCG or not.
468  *
469  * Returns: %true if we are in MTTCG mode %false otherwise.
470  */
471 extern bool mttcg_enabled;
472 #define qemu_tcg_mttcg_enabled() (mttcg_enabled)
473 
474 /**
475  * cpu_paging_enabled:
476  * @cpu: The CPU whose state is to be inspected.
477  *
478  * Returns: %true if paging is enabled, %false otherwise.
479  */
480 bool cpu_paging_enabled(const CPUState *cpu);
481 
482 /**
483  * cpu_get_memory_mapping:
484  * @cpu: The CPU whose memory mappings are to be obtained.
485  * @list: Where to write the memory mappings to.
486  * @errp: Pointer for reporting an #Error.
487  */
488 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
489                             Error **errp);
490 
491 #if !defined(CONFIG_USER_ONLY)
492 
493 /**
494  * cpu_write_elf64_note:
495  * @f: pointer to a function that writes memory to a file
496  * @cpu: The CPU whose memory is to be dumped
497  * @cpuid: ID number of the CPU
498  * @opaque: pointer to the CPUState struct
499  */
500 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
501                          int cpuid, void *opaque);
502 
503 /**
504  * cpu_write_elf64_qemunote:
505  * @f: pointer to a function that writes memory to a file
506  * @cpu: The CPU whose memory is to be dumped
507  * @cpuid: ID number of the CPU
508  * @opaque: pointer to the CPUState struct
509  */
510 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
511                              void *opaque);
512 
513 /**
514  * cpu_write_elf32_note:
515  * @f: pointer to a function that writes memory to a file
516  * @cpu: The CPU whose memory is to be dumped
517  * @cpuid: ID number of the CPU
518  * @opaque: pointer to the CPUState struct
519  */
520 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
521                          int cpuid, void *opaque);
522 
523 /**
524  * cpu_write_elf32_qemunote:
525  * @f: pointer to a function that writes memory to a file
526  * @cpu: The CPU whose memory is to be dumped
527  * @cpuid: ID number of the CPU
528  * @opaque: pointer to the CPUState struct
529  */
530 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
531                              void *opaque);
532 
533 /**
534  * cpu_get_crash_info:
535  * @cpu: The CPU to get crash information for
536  *
537  * Gets the previously saved crash information.
538  * Caller is responsible for freeing the data.
539  */
540 GuestPanicInformation *cpu_get_crash_info(CPUState *cpu);
541 
542 #endif /* !CONFIG_USER_ONLY */
543 
544 /**
545  * CPUDumpFlags:
546  * @CPU_DUMP_CODE:
547  * @CPU_DUMP_FPU: dump FPU register state, not just integer
548  * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
549  * @CPU_DUMP_VPU: dump VPU registers
550  */
551 enum CPUDumpFlags {
552     CPU_DUMP_CODE = 0x00010000,
553     CPU_DUMP_FPU  = 0x00020000,
554     CPU_DUMP_CCOP = 0x00040000,
555     CPU_DUMP_VPU  = 0x00080000,
556 };
557 
558 /**
559  * cpu_dump_state:
560  * @cpu: The CPU whose state is to be dumped.
561  * @f: If non-null, dump to this stream, else to current print sink.
562  *
563  * Dumps CPU state.
564  */
565 void cpu_dump_state(CPUState *cpu, FILE *f, int flags);
566 
567 #ifndef CONFIG_USER_ONLY
568 /**
569  * cpu_get_phys_page_attrs_debug:
570  * @cpu: The CPU to obtain the physical page address for.
571  * @addr: The virtual address.
572  * @attrs: Updated on return with the memory transaction attributes to use
573  *         for this access.
574  *
575  * Obtains the physical page corresponding to a virtual one, together
576  * with the corresponding memory transaction attributes to use for the access.
577  * Use it only for debugging because no protection checks are done.
578  *
579  * Returns: Corresponding physical page address or -1 if no page found.
580  */
581 hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
582                                      MemTxAttrs *attrs);
583 
584 /**
585  * cpu_get_phys_page_debug:
586  * @cpu: The CPU to obtain the physical page address for.
587  * @addr: The virtual address.
588  *
589  * Obtains the physical page corresponding to a virtual one.
590  * Use it only for debugging because no protection checks are done.
591  *
592  * Returns: Corresponding physical page address or -1 if no page found.
593  */
594 hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
595 
596 /** cpu_asidx_from_attrs:
597  * @cpu: CPU
598  * @attrs: memory transaction attributes
599  *
600  * Returns the address space index specifying the CPU AddressSpace
601  * to use for a memory access with the given transaction attributes.
602  */
603 int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs);
604 
605 /**
606  * cpu_virtio_is_big_endian:
607  * @cpu: CPU
608 
609  * Returns %true if a CPU which supports runtime configurable endianness
610  * is currently big-endian.
611  */
612 bool cpu_virtio_is_big_endian(CPUState *cpu);
613 
614 #endif /* CONFIG_USER_ONLY */
615 
616 /**
617  * cpu_list_add:
618  * @cpu: The CPU to be added to the list of CPUs.
619  */
620 void cpu_list_add(CPUState *cpu);
621 
622 /**
623  * cpu_list_remove:
624  * @cpu: The CPU to be removed from the list of CPUs.
625  */
626 void cpu_list_remove(CPUState *cpu);
627 
628 /**
629  * cpu_reset:
630  * @cpu: The CPU whose state is to be reset.
631  */
632 void cpu_reset(CPUState *cpu);
633 
634 /**
635  * cpu_class_by_name:
636  * @typename: The CPU base type.
637  * @cpu_model: The model string without any parameters.
638  *
639  * Looks up a CPU #ObjectClass matching name @cpu_model.
640  *
641  * Returns: A #CPUClass or %NULL if not matching class is found.
642  */
643 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
644 
645 /**
646  * cpu_create:
647  * @typename: The CPU type.
648  *
649  * Instantiates a CPU and realizes the CPU.
650  *
651  * Returns: A #CPUState or %NULL if an error occurred.
652  */
653 CPUState *cpu_create(const char *typename);
654 
655 /**
656  * parse_cpu_option:
657  * @cpu_option: The -cpu option including optional parameters.
658  *
659  * processes optional parameters and registers them as global properties
660  *
661  * Returns: type of CPU to create or prints error and terminates process
662  *          if an error occurred.
663  */
664 const char *parse_cpu_option(const char *cpu_option);
665 
666 /**
667  * cpu_has_work:
668  * @cpu: The vCPU to check.
669  *
670  * Checks whether the CPU has work to do.
671  *
672  * Returns: %true if the CPU has work, %false otherwise.
673  */
674 static inline bool cpu_has_work(CPUState *cpu)
675 {
676     CPUClass *cc = CPU_GET_CLASS(cpu);
677 
678     g_assert(cc->has_work);
679     return cc->has_work(cpu);
680 }
681 
682 /**
683  * qemu_cpu_is_self:
684  * @cpu: The vCPU to check against.
685  *
686  * Checks whether the caller is executing on the vCPU thread.
687  *
688  * Returns: %true if called from @cpu's thread, %false otherwise.
689  */
690 bool qemu_cpu_is_self(CPUState *cpu);
691 
692 /**
693  * qemu_cpu_kick:
694  * @cpu: The vCPU to kick.
695  *
696  * Kicks @cpu's thread.
697  */
698 void qemu_cpu_kick(CPUState *cpu);
699 
700 /**
701  * cpu_is_stopped:
702  * @cpu: The CPU to check.
703  *
704  * Checks whether the CPU is stopped.
705  *
706  * Returns: %true if run state is not running or if artificially stopped;
707  * %false otherwise.
708  */
709 bool cpu_is_stopped(CPUState *cpu);
710 
711 /**
712  * do_run_on_cpu:
713  * @cpu: The vCPU to run on.
714  * @func: The function to be executed.
715  * @data: Data to pass to the function.
716  * @mutex: Mutex to release while waiting for @func to run.
717  *
718  * Used internally in the implementation of run_on_cpu.
719  */
720 void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data,
721                    QemuMutex *mutex);
722 
723 /**
724  * run_on_cpu:
725  * @cpu: The vCPU to run on.
726  * @func: The function to be executed.
727  * @data: Data to pass to the function.
728  *
729  * Schedules the function @func for execution on the vCPU @cpu.
730  */
731 void run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
732 
733 /**
734  * async_run_on_cpu:
735  * @cpu: The vCPU to run on.
736  * @func: The function to be executed.
737  * @data: Data to pass to the function.
738  *
739  * Schedules the function @func for execution on the vCPU @cpu asynchronously.
740  */
741 void async_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
742 
743 /**
744  * async_safe_run_on_cpu:
745  * @cpu: The vCPU to run on.
746  * @func: The function to be executed.
747  * @data: Data to pass to the function.
748  *
749  * Schedules the function @func for execution on the vCPU @cpu asynchronously,
750  * while all other vCPUs are sleeping.
751  *
752  * Unlike run_on_cpu and async_run_on_cpu, the function is run outside the
753  * BQL.
754  */
755 void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
756 
757 /**
758  * cpu_in_exclusive_context()
759  * @cpu: The vCPU to check
760  *
761  * Returns true if @cpu is an exclusive context, for example running
762  * something which has previously been queued via async_safe_run_on_cpu().
763  */
764 static inline bool cpu_in_exclusive_context(const CPUState *cpu)
765 {
766     return cpu->exclusive_context_count;
767 }
768 
769 /**
770  * qemu_get_cpu:
771  * @index: The CPUState@cpu_index value of the CPU to obtain.
772  *
773  * Gets a CPU matching @index.
774  *
775  * Returns: The CPU or %NULL if there is no matching CPU.
776  */
777 CPUState *qemu_get_cpu(int index);
778 
779 /**
780  * cpu_exists:
781  * @id: Guest-exposed CPU ID to lookup.
782  *
783  * Search for CPU with specified ID.
784  *
785  * Returns: %true - CPU is found, %false - CPU isn't found.
786  */
787 bool cpu_exists(int64_t id);
788 
789 /**
790  * cpu_by_arch_id:
791  * @id: Guest-exposed CPU ID of the CPU to obtain.
792  *
793  * Get a CPU with matching @id.
794  *
795  * Returns: The CPU or %NULL if there is no matching CPU.
796  */
797 CPUState *cpu_by_arch_id(int64_t id);
798 
799 /**
800  * cpu_interrupt:
801  * @cpu: The CPU to set an interrupt on.
802  * @mask: The interrupts to set.
803  *
804  * Invokes the interrupt handler.
805  */
806 
807 void cpu_interrupt(CPUState *cpu, int mask);
808 
809 /**
810  * cpu_set_pc:
811  * @cpu: The CPU to set the program counter for.
812  * @addr: Program counter value.
813  *
814  * Sets the program counter for a CPU.
815  */
816 static inline void cpu_set_pc(CPUState *cpu, vaddr addr)
817 {
818     CPUClass *cc = CPU_GET_CLASS(cpu);
819 
820     cc->set_pc(cpu, addr);
821 }
822 
823 /**
824  * cpu_reset_interrupt:
825  * @cpu: The CPU to clear the interrupt on.
826  * @mask: The interrupt mask to clear.
827  *
828  * Resets interrupts on the vCPU @cpu.
829  */
830 void cpu_reset_interrupt(CPUState *cpu, int mask);
831 
832 /**
833  * cpu_exit:
834  * @cpu: The CPU to exit.
835  *
836  * Requests the CPU @cpu to exit execution.
837  */
838 void cpu_exit(CPUState *cpu);
839 
840 /**
841  * cpu_resume:
842  * @cpu: The CPU to resume.
843  *
844  * Resumes CPU, i.e. puts CPU into runnable state.
845  */
846 void cpu_resume(CPUState *cpu);
847 
848 /**
849  * cpu_remove_sync:
850  * @cpu: The CPU to remove.
851  *
852  * Requests the CPU to be removed and waits till it is removed.
853  */
854 void cpu_remove_sync(CPUState *cpu);
855 
856 /**
857  * process_queued_cpu_work() - process all items on CPU work queue
858  * @cpu: The CPU which work queue to process.
859  */
860 void process_queued_cpu_work(CPUState *cpu);
861 
862 /**
863  * cpu_exec_start:
864  * @cpu: The CPU for the current thread.
865  *
866  * Record that a CPU has started execution and can be interrupted with
867  * cpu_exit.
868  */
869 void cpu_exec_start(CPUState *cpu);
870 
871 /**
872  * cpu_exec_end:
873  * @cpu: The CPU for the current thread.
874  *
875  * Record that a CPU has stopped execution and exclusive sections
876  * can be executed without interrupting it.
877  */
878 void cpu_exec_end(CPUState *cpu);
879 
880 /**
881  * start_exclusive:
882  *
883  * Wait for a concurrent exclusive section to end, and then start
884  * a section of work that is run while other CPUs are not running
885  * between cpu_exec_start and cpu_exec_end.  CPUs that are running
886  * cpu_exec are exited immediately.  CPUs that call cpu_exec_start
887  * during the exclusive section go to sleep until this CPU calls
888  * end_exclusive.
889  */
890 void start_exclusive(void);
891 
892 /**
893  * end_exclusive:
894  *
895  * Concludes an exclusive execution section started by start_exclusive.
896  */
897 void end_exclusive(void);
898 
899 /**
900  * qemu_init_vcpu:
901  * @cpu: The vCPU to initialize.
902  *
903  * Initializes a vCPU.
904  */
905 void qemu_init_vcpu(CPUState *cpu);
906 
907 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
908 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
909 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
910 
911 /**
912  * cpu_single_step:
913  * @cpu: CPU to the flags for.
914  * @enabled: Flags to enable.
915  *
916  * Enables or disables single-stepping for @cpu.
917  */
918 void cpu_single_step(CPUState *cpu, int enabled);
919 
920 /* Breakpoint/watchpoint flags */
921 #define BP_MEM_READ           0x01
922 #define BP_MEM_WRITE          0x02
923 #define BP_MEM_ACCESS         (BP_MEM_READ | BP_MEM_WRITE)
924 #define BP_STOP_BEFORE_ACCESS 0x04
925 /* 0x08 currently unused */
926 #define BP_GDB                0x10
927 #define BP_CPU                0x20
928 #define BP_ANY                (BP_GDB | BP_CPU)
929 #define BP_HIT_SHIFT          6
930 #define BP_WATCHPOINT_HIT_READ  (BP_MEM_READ << BP_HIT_SHIFT)
931 #define BP_WATCHPOINT_HIT_WRITE (BP_MEM_WRITE << BP_HIT_SHIFT)
932 #define BP_WATCHPOINT_HIT       (BP_MEM_ACCESS << BP_HIT_SHIFT)
933 
934 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
935                           CPUBreakpoint **breakpoint);
936 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
937 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
938 void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
939 
940 /* Return true if PC matches an installed breakpoint.  */
941 static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask)
942 {
943     CPUBreakpoint *bp;
944 
945     if (unlikely(!QTAILQ_EMPTY(&cpu->breakpoints))) {
946         QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
947             if (bp->pc == pc && (bp->flags & mask)) {
948                 return true;
949             }
950         }
951     }
952     return false;
953 }
954 
955 #if defined(CONFIG_USER_ONLY)
956 static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
957                                         int flags, CPUWatchpoint **watchpoint)
958 {
959     return -ENOSYS;
960 }
961 
962 static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
963                                         vaddr len, int flags)
964 {
965     return -ENOSYS;
966 }
967 
968 static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu,
969                                                 CPUWatchpoint *wp)
970 {
971 }
972 
973 static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
974 {
975 }
976 #else
977 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
978                           int flags, CPUWatchpoint **watchpoint);
979 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
980                           vaddr len, int flags);
981 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
982 void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
983 #endif
984 
985 /**
986  * cpu_get_address_space:
987  * @cpu: CPU to get address space from
988  * @asidx: index identifying which address space to get
989  *
990  * Return the requested address space of this CPU. @asidx
991  * specifies which address space to read.
992  */
993 AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx);
994 
995 G_NORETURN void cpu_abort(CPUState *cpu, const char *fmt, ...)
996     G_GNUC_PRINTF(2, 3);
997 
998 /* $(top_srcdir)/cpu.c */
999 void cpu_class_init_props(DeviceClass *dc);
1000 void cpu_exec_initfn(CPUState *cpu);
1001 void cpu_exec_realizefn(CPUState *cpu, Error **errp);
1002 void cpu_exec_unrealizefn(CPUState *cpu);
1003 
1004 /**
1005  * target_words_bigendian:
1006  * Returns true if the (default) endianness of the target is big endian,
1007  * false otherwise. Note that in target-specific code, you can use
1008  * TARGET_BIG_ENDIAN directly instead. On the other hand, common
1009  * code should normally never need to know about the endianness of the
1010  * target, so please do *not* use this function unless you know very well
1011  * what you are doing!
1012  */
1013 bool target_words_bigendian(void);
1014 
1015 const char *target_name(void);
1016 
1017 void page_size_init(void);
1018 
1019 #ifdef NEED_CPU_H
1020 
1021 #ifndef CONFIG_USER_ONLY
1022 
1023 extern const VMStateDescription vmstate_cpu_common;
1024 
1025 #define VMSTATE_CPU() {                                                     \
1026     .name = "parent_obj",                                                   \
1027     .size = sizeof(CPUState),                                               \
1028     .vmsd = &vmstate_cpu_common,                                            \
1029     .flags = VMS_STRUCT,                                                    \
1030     .offset = 0,                                                            \
1031 }
1032 #endif /* !CONFIG_USER_ONLY */
1033 
1034 #endif /* NEED_CPU_H */
1035 
1036 #define UNASSIGNED_CPU_INDEX -1
1037 #define UNASSIGNED_CLUSTER_INDEX -1
1038 
1039 #endif
1040