xref: /openbmc/qemu/include/hw/core/cpu.h (revision 36ebc7db)
1 /*
2  * QEMU CPU model
3  *
4  * Copyright (c) 2012 SUSE LINUX Products GmbH
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version 2
9  * of the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, see
18  * <http://www.gnu.org/licenses/gpl-2.0.html>
19  */
20 #ifndef QEMU_CPU_H
21 #define QEMU_CPU_H
22 
23 #include "hw/qdev-core.h"
24 #include "disas/dis-asm.h"
25 #include "exec/cpu-common.h"
26 #include "exec/hwaddr.h"
27 #include "exec/memattrs.h"
28 #include "qapi/qapi-types-run-state.h"
29 #include "qemu/bitmap.h"
30 #include "qemu/rcu_queue.h"
31 #include "qemu/queue.h"
32 #include "qemu/thread.h"
33 #include "qemu/plugin.h"
34 #include "qom/object.h"
35 
36 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
37                                      void *opaque);
38 
39 /**
40  * SECTION:cpu
41  * @section_id: QEMU-cpu
42  * @title: CPU Class
43  * @short_description: Base class for all CPUs
44  */
45 
46 #define TYPE_CPU "cpu"
47 
48 /* Since this macro is used a lot in hot code paths and in conjunction with
49  * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
50  * an unchecked cast.
51  */
52 #define CPU(obj) ((CPUState *)(obj))
53 
54 /*
55  * The class checkers bring in CPU_GET_CLASS() which is potentially
56  * expensive given the eventual call to
57  * object_class_dynamic_cast_assert(). Because of this the CPUState
58  * has a cached value for the class in cs->cc which is set up in
59  * cpu_exec_realizefn() for use in hot code paths.
60  */
61 typedef struct CPUClass CPUClass;
62 DECLARE_CLASS_CHECKERS(CPUClass, CPU,
63                        TYPE_CPU)
64 
65 /**
66  * OBJECT_DECLARE_CPU_TYPE:
67  * @CpuInstanceType: instance struct name
68  * @CpuClassType: class struct name
69  * @CPU_MODULE_OBJ_NAME: the CPU name in uppercase with underscore separators
70  *
71  * This macro is typically used in "cpu-qom.h" header file, and will:
72  *
73  *   - create the typedefs for the CPU object and class structs
74  *   - register the type for use with g_autoptr
75  *   - provide three standard type cast functions
76  *
77  * The object struct and class struct need to be declared manually.
78  */
79 #define OBJECT_DECLARE_CPU_TYPE(CpuInstanceType, CpuClassType, CPU_MODULE_OBJ_NAME) \
80     typedef struct ArchCPU CpuInstanceType; \
81     OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME);
82 
83 typedef enum MMUAccessType {
84     MMU_DATA_LOAD  = 0,
85     MMU_DATA_STORE = 1,
86     MMU_INST_FETCH = 2
87 } MMUAccessType;
88 
89 typedef struct CPUWatchpoint CPUWatchpoint;
90 
91 /* see tcg-cpu-ops.h */
92 struct TCGCPUOps;
93 
94 /* see accel-cpu.h */
95 struct AccelCPUClass;
96 
97 /* see sysemu-cpu-ops.h */
98 struct SysemuCPUOps;
99 
100 /**
101  * CPUClass:
102  * @class_by_name: Callback to map -cpu command line model name to an
103  * instantiatable CPU type.
104  * @parse_features: Callback to parse command line arguments.
105  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
106  * @has_work: Callback for checking if there is work to do.
107  * @memory_rw_debug: Callback for GDB memory access.
108  * @dump_state: Callback for dumping state.
109  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
110  * @set_pc: Callback for setting the Program Counter register. This
111  *       should have the semantics used by the target architecture when
112  *       setting the PC from a source such as an ELF file entry point;
113  *       for example on Arm it will also set the Thumb mode bit based
114  *       on the least significant bit of the new PC value.
115  *       If the target behaviour here is anything other than "set
116  *       the PC register to the value passed in" then the target must
117  *       also implement the synchronize_from_tb hook.
118  * @get_pc: Callback for getting the Program Counter register.
119  *       As above, with the semantics of the target architecture.
120  * @gdb_read_register: Callback for letting GDB read a register.
121  * @gdb_write_register: Callback for letting GDB write a register.
122  * @gdb_adjust_breakpoint: Callback for adjusting the address of a
123  *       breakpoint.  Used by AVR to handle a gdb mis-feature with
124  *       its Harvard architecture split code and data.
125  * @gdb_num_core_regs: Number of core registers accessible to GDB.
126  * @gdb_core_xml_file: File name for core registers GDB XML description.
127  * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
128  *           before the insn which triggers a watchpoint rather than after it.
129  * @gdb_arch_name: Optional callback that returns the architecture name known
130  * to GDB. The caller must free the returned string with g_free.
131  * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
132  *   gdb stub. Returns a pointer to the XML contents for the specified XML file
133  *   or NULL if the CPU doesn't have a dynamically generated content for it.
134  * @disas_set_info: Setup architecture specific components of disassembly info
135  * @adjust_watchpoint_address: Perform a target-specific adjustment to an
136  * address before attempting to match it against watchpoints.
137  * @deprecation_note: If this CPUClass is deprecated, this field provides
138  *                    related information.
139  *
140  * Represents a CPU family or model.
141  */
142 struct CPUClass {
143     /*< private >*/
144     DeviceClass parent_class;
145     /*< public >*/
146 
147     ObjectClass *(*class_by_name)(const char *cpu_model);
148     void (*parse_features)(const char *typename, char *str, Error **errp);
149 
150     bool (*has_work)(CPUState *cpu);
151     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
152                            uint8_t *buf, int len, bool is_write);
153     void (*dump_state)(CPUState *cpu, FILE *, int flags);
154     int64_t (*get_arch_id)(CPUState *cpu);
155     void (*set_pc)(CPUState *cpu, vaddr value);
156     vaddr (*get_pc)(CPUState *cpu);
157     int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg);
158     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
159     vaddr (*gdb_adjust_breakpoint)(CPUState *cpu, vaddr addr);
160 
161     const char *gdb_core_xml_file;
162     gchar * (*gdb_arch_name)(CPUState *cpu);
163     const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname);
164 
165     void (*disas_set_info)(CPUState *cpu, disassemble_info *info);
166 
167     const char *deprecation_note;
168     struct AccelCPUClass *accel_cpu;
169 
170     /* when system emulation is not available, this pointer is NULL */
171     const struct SysemuCPUOps *sysemu_ops;
172 
173     /* when TCG is not available, this pointer is NULL */
174     const struct TCGCPUOps *tcg_ops;
175 
176     /*
177      * if not NULL, this is called in order for the CPUClass to initialize
178      * class data that depends on the accelerator, see accel/accel-common.c.
179      */
180     void (*init_accel_cpu)(struct AccelCPUClass *accel_cpu, CPUClass *cc);
181 
182     /*
183      * Keep non-pointer data at the end to minimize holes.
184      */
185     int reset_dump_flags;
186     int gdb_num_core_regs;
187     bool gdb_stop_before_watchpoint;
188 };
189 
190 /*
191  * Low 16 bits: number of cycles left, used only in icount mode.
192  * High 16 bits: Set to -1 to force TCG to stop executing linked TBs
193  * for this CPU and return to its top level loop (even in non-icount mode).
194  * This allows a single read-compare-cbranch-write sequence to test
195  * for both decrementer underflow and exceptions.
196  */
197 typedef union IcountDecr {
198     uint32_t u32;
199     struct {
200 #if HOST_BIG_ENDIAN
201         uint16_t high;
202         uint16_t low;
203 #else
204         uint16_t low;
205         uint16_t high;
206 #endif
207     } u16;
208 } IcountDecr;
209 
210 typedef struct CPUBreakpoint {
211     vaddr pc;
212     int flags; /* BP_* */
213     QTAILQ_ENTRY(CPUBreakpoint) entry;
214 } CPUBreakpoint;
215 
216 struct CPUWatchpoint {
217     vaddr vaddr;
218     vaddr len;
219     vaddr hitaddr;
220     MemTxAttrs hitattrs;
221     int flags; /* BP_* */
222     QTAILQ_ENTRY(CPUWatchpoint) entry;
223 };
224 
225 #ifdef CONFIG_PLUGIN
226 /*
227  * For plugins we sometime need to save the resolved iotlb data before
228  * the memory regions get moved around  by io_writex.
229  */
230 typedef struct SavedIOTLB {
231     MemoryRegionSection *section;
232     hwaddr mr_offset;
233 } SavedIOTLB;
234 #endif
235 
236 struct KVMState;
237 struct kvm_run;
238 
239 struct hax_vcpu_state;
240 struct hvf_vcpu_state;
241 
242 /* work queue */
243 
244 /* The union type allows passing of 64 bit target pointers on 32 bit
245  * hosts in a single parameter
246  */
247 typedef union {
248     int           host_int;
249     unsigned long host_ulong;
250     void         *host_ptr;
251     vaddr         target_ptr;
252 } run_on_cpu_data;
253 
254 #define RUN_ON_CPU_HOST_PTR(p)    ((run_on_cpu_data){.host_ptr = (p)})
255 #define RUN_ON_CPU_HOST_INT(i)    ((run_on_cpu_data){.host_int = (i)})
256 #define RUN_ON_CPU_HOST_ULONG(ul) ((run_on_cpu_data){.host_ulong = (ul)})
257 #define RUN_ON_CPU_TARGET_PTR(v)  ((run_on_cpu_data){.target_ptr = (v)})
258 #define RUN_ON_CPU_NULL           RUN_ON_CPU_HOST_PTR(NULL)
259 
260 typedef void (*run_on_cpu_func)(CPUState *cpu, run_on_cpu_data data);
261 
262 struct qemu_work_item;
263 
264 #define CPU_UNSET_NUMA_NODE_ID -1
265 #define CPU_TRACE_DSTATE_MAX_EVENTS 32
266 
267 /**
268  * CPUState:
269  * @cpu_index: CPU index (informative).
270  * @cluster_index: Identifies which cluster this CPU is in.
271  *   For boards which don't define clusters or for "loose" CPUs not assigned
272  *   to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
273  *   be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
274  *   QOM parent.
275  * @tcg_cflags: Pre-computed cflags for this cpu.
276  * @nr_cores: Number of cores within this CPU package.
277  * @nr_threads: Number of threads within this CPU.
278  * @running: #true if CPU is currently running (lockless).
279  * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
280  * valid under cpu_list_lock.
281  * @created: Indicates whether the CPU thread has been successfully created.
282  * @interrupt_request: Indicates a pending interrupt request.
283  * @halted: Nonzero if the CPU is in suspended state.
284  * @stop: Indicates a pending stop request.
285  * @stopped: Indicates the CPU has been artificially stopped.
286  * @unplug: Indicates a pending CPU unplug request.
287  * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
288  * @singlestep_enabled: Flags for single-stepping.
289  * @icount_extra: Instructions until next timer event.
290  * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
291  * requires that IO only be performed on the last instruction of a TB
292  * so that interrupts take effect immediately.
293  * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
294  *            AddressSpaces this CPU has)
295  * @num_ases: number of CPUAddressSpaces in @cpu_ases
296  * @as: Pointer to the first AddressSpace, for the convenience of targets which
297  *      only have a single AddressSpace
298  * @env_ptr: Pointer to subclass-specific CPUArchState field.
299  * @icount_decr_ptr: Pointer to IcountDecr field within subclass.
300  * @gdb_regs: Additional GDB registers.
301  * @gdb_num_regs: Number of total registers accessible to GDB.
302  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
303  * @next_cpu: Next CPU sharing TB cache.
304  * @opaque: User data.
305  * @mem_io_pc: Host Program Counter at which the memory was accessed.
306  * @kvm_fd: vCPU file descriptor for KVM.
307  * @work_mutex: Lock to prevent multiple access to @work_list.
308  * @work_list: List of pending asynchronous work.
309  * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
310  *                        to @trace_dstate).
311  * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
312  * @plugin_mask: Plugin event bitmap. Modified only via async work.
313  * @ignore_memory_transaction_failures: Cached copy of the MachineState
314  *    flag of the same name: allows the board to suppress calling of the
315  *    CPU do_transaction_failed hook function.
316  * @kvm_dirty_gfns: Points to the KVM dirty ring for this CPU when KVM dirty
317  *    ring is enabled.
318  * @kvm_fetch_index: Keeps the index that we last fetched from the per-vCPU
319  *    dirty ring structure.
320  *
321  * State of one CPU core or thread.
322  */
323 struct CPUState {
324     /*< private >*/
325     DeviceState parent_obj;
326     /* cache to avoid expensive CPU_GET_CLASS */
327     CPUClass *cc;
328     /*< public >*/
329 
330     int nr_cores;
331     int nr_threads;
332 
333     struct QemuThread *thread;
334 #ifdef _WIN32
335     HANDLE hThread;
336     QemuSemaphore sem;
337 #endif
338     int thread_id;
339     bool running, has_waiter;
340     struct QemuCond *halt_cond;
341     bool thread_kicked;
342     bool created;
343     bool stop;
344     bool stopped;
345 
346     /* Should CPU start in powered-off state? */
347     bool start_powered_off;
348 
349     bool unplug;
350     bool crash_occurred;
351     bool exit_request;
352     bool in_exclusive_context;
353     uint32_t cflags_next_tb;
354     /* updates protected by BQL */
355     uint32_t interrupt_request;
356     int singlestep_enabled;
357     int64_t icount_budget;
358     int64_t icount_extra;
359     uint64_t random_seed;
360     sigjmp_buf jmp_env;
361 
362     QemuMutex work_mutex;
363     QSIMPLEQ_HEAD(, qemu_work_item) work_list;
364 
365     CPUAddressSpace *cpu_ases;
366     int num_ases;
367     AddressSpace *as;
368     MemoryRegion *memory;
369 
370     CPUArchState *env_ptr;
371     IcountDecr *icount_decr_ptr;
372 
373     CPUJumpCache *tb_jmp_cache;
374 
375     struct GDBRegisterState *gdb_regs;
376     int gdb_num_regs;
377     int gdb_num_g_regs;
378     QTAILQ_ENTRY(CPUState) node;
379 
380     /* ice debug support */
381     QTAILQ_HEAD(, CPUBreakpoint) breakpoints;
382 
383     QTAILQ_HEAD(, CPUWatchpoint) watchpoints;
384     CPUWatchpoint *watchpoint_hit;
385 
386     void *opaque;
387 
388     /* In order to avoid passing too many arguments to the MMIO helpers,
389      * we store some rarely used information in the CPU context.
390      */
391     uintptr_t mem_io_pc;
392 
393     /* Only used in KVM */
394     int kvm_fd;
395     struct KVMState *kvm_state;
396     struct kvm_run *kvm_run;
397     struct kvm_dirty_gfn *kvm_dirty_gfns;
398     uint32_t kvm_fetch_index;
399     uint64_t dirty_pages;
400 
401     /* Use by accel-block: CPU is executing an ioctl() */
402     QemuLockCnt in_ioctl_lock;
403 
404     /* Used for events with 'vcpu' and *without* the 'disabled' properties */
405     DECLARE_BITMAP(trace_dstate_delayed, CPU_TRACE_DSTATE_MAX_EVENTS);
406     DECLARE_BITMAP(trace_dstate, CPU_TRACE_DSTATE_MAX_EVENTS);
407 
408     DECLARE_BITMAP(plugin_mask, QEMU_PLUGIN_EV_MAX);
409 
410 #ifdef CONFIG_PLUGIN
411     GArray *plugin_mem_cbs;
412     /* saved iotlb data from io_writex */
413     SavedIOTLB saved_iotlb;
414 #endif
415 
416     /* TODO Move common fields from CPUArchState here. */
417     int cpu_index;
418     int cluster_index;
419     uint32_t tcg_cflags;
420     uint32_t halted;
421     uint32_t can_do_io;
422     int32_t exception_index;
423 
424     /* shared by kvm, hax and hvf */
425     bool vcpu_dirty;
426 
427     /* Used to keep track of an outstanding cpu throttle thread for migration
428      * autoconverge
429      */
430     bool throttle_thread_scheduled;
431 
432     /*
433      * Sleep throttle_us_per_full microseconds once dirty ring is full
434      * if dirty page rate limit is enabled.
435      */
436     int64_t throttle_us_per_full;
437 
438     bool ignore_memory_transaction_failures;
439 
440     /* Used for user-only emulation of prctl(PR_SET_UNALIGN). */
441     bool prctl_unalign_sigbus;
442 
443     struct hax_vcpu_state *hax_vcpu;
444 
445     struct hvf_vcpu_state *hvf;
446 
447     /* track IOMMUs whose translations we've cached in the TCG TLB */
448     GArray *iommu_notifiers;
449 };
450 
451 typedef QTAILQ_HEAD(CPUTailQ, CPUState) CPUTailQ;
452 extern CPUTailQ cpus;
453 
454 #define first_cpu        QTAILQ_FIRST_RCU(&cpus)
455 #define CPU_NEXT(cpu)    QTAILQ_NEXT_RCU(cpu, node)
456 #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node)
457 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
458     QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
459 
460 extern __thread CPUState *current_cpu;
461 
462 /**
463  * qemu_tcg_mttcg_enabled:
464  * Check whether we are running MultiThread TCG or not.
465  *
466  * Returns: %true if we are in MTTCG mode %false otherwise.
467  */
468 extern bool mttcg_enabled;
469 #define qemu_tcg_mttcg_enabled() (mttcg_enabled)
470 
471 /**
472  * cpu_paging_enabled:
473  * @cpu: The CPU whose state is to be inspected.
474  *
475  * Returns: %true if paging is enabled, %false otherwise.
476  */
477 bool cpu_paging_enabled(const CPUState *cpu);
478 
479 /**
480  * cpu_get_memory_mapping:
481  * @cpu: The CPU whose memory mappings are to be obtained.
482  * @list: Where to write the memory mappings to.
483  * @errp: Pointer for reporting an #Error.
484  */
485 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
486                             Error **errp);
487 
488 #if !defined(CONFIG_USER_ONLY)
489 
490 /**
491  * cpu_write_elf64_note:
492  * @f: pointer to a function that writes memory to a file
493  * @cpu: The CPU whose memory is to be dumped
494  * @cpuid: ID number of the CPU
495  * @opaque: pointer to the CPUState struct
496  */
497 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
498                          int cpuid, void *opaque);
499 
500 /**
501  * cpu_write_elf64_qemunote:
502  * @f: pointer to a function that writes memory to a file
503  * @cpu: The CPU whose memory is to be dumped
504  * @cpuid: ID number of the CPU
505  * @opaque: pointer to the CPUState struct
506  */
507 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
508                              void *opaque);
509 
510 /**
511  * cpu_write_elf32_note:
512  * @f: pointer to a function that writes memory to a file
513  * @cpu: The CPU whose memory is to be dumped
514  * @cpuid: ID number of the CPU
515  * @opaque: pointer to the CPUState struct
516  */
517 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
518                          int cpuid, void *opaque);
519 
520 /**
521  * cpu_write_elf32_qemunote:
522  * @f: pointer to a function that writes memory to a file
523  * @cpu: The CPU whose memory is to be dumped
524  * @cpuid: ID number of the CPU
525  * @opaque: pointer to the CPUState struct
526  */
527 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
528                              void *opaque);
529 
530 /**
531  * cpu_get_crash_info:
532  * @cpu: The CPU to get crash information for
533  *
534  * Gets the previously saved crash information.
535  * Caller is responsible for freeing the data.
536  */
537 GuestPanicInformation *cpu_get_crash_info(CPUState *cpu);
538 
539 #endif /* !CONFIG_USER_ONLY */
540 
541 /**
542  * CPUDumpFlags:
543  * @CPU_DUMP_CODE:
544  * @CPU_DUMP_FPU: dump FPU register state, not just integer
545  * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
546  */
547 enum CPUDumpFlags {
548     CPU_DUMP_CODE = 0x00010000,
549     CPU_DUMP_FPU  = 0x00020000,
550     CPU_DUMP_CCOP = 0x00040000,
551 };
552 
553 /**
554  * cpu_dump_state:
555  * @cpu: The CPU whose state is to be dumped.
556  * @f: If non-null, dump to this stream, else to current print sink.
557  *
558  * Dumps CPU state.
559  */
560 void cpu_dump_state(CPUState *cpu, FILE *f, int flags);
561 
562 #ifndef CONFIG_USER_ONLY
563 /**
564  * cpu_get_phys_page_attrs_debug:
565  * @cpu: The CPU to obtain the physical page address for.
566  * @addr: The virtual address.
567  * @attrs: Updated on return with the memory transaction attributes to use
568  *         for this access.
569  *
570  * Obtains the physical page corresponding to a virtual one, together
571  * with the corresponding memory transaction attributes to use for the access.
572  * Use it only for debugging because no protection checks are done.
573  *
574  * Returns: Corresponding physical page address or -1 if no page found.
575  */
576 hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
577                                      MemTxAttrs *attrs);
578 
579 /**
580  * cpu_get_phys_page_debug:
581  * @cpu: The CPU to obtain the physical page address for.
582  * @addr: The virtual address.
583  *
584  * Obtains the physical page corresponding to a virtual one.
585  * Use it only for debugging because no protection checks are done.
586  *
587  * Returns: Corresponding physical page address or -1 if no page found.
588  */
589 hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
590 
591 /** cpu_asidx_from_attrs:
592  * @cpu: CPU
593  * @attrs: memory transaction attributes
594  *
595  * Returns the address space index specifying the CPU AddressSpace
596  * to use for a memory access with the given transaction attributes.
597  */
598 int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs);
599 
600 /**
601  * cpu_virtio_is_big_endian:
602  * @cpu: CPU
603 
604  * Returns %true if a CPU which supports runtime configurable endianness
605  * is currently big-endian.
606  */
607 bool cpu_virtio_is_big_endian(CPUState *cpu);
608 
609 #endif /* CONFIG_USER_ONLY */
610 
611 /**
612  * cpu_list_add:
613  * @cpu: The CPU to be added to the list of CPUs.
614  */
615 void cpu_list_add(CPUState *cpu);
616 
617 /**
618  * cpu_list_remove:
619  * @cpu: The CPU to be removed from the list of CPUs.
620  */
621 void cpu_list_remove(CPUState *cpu);
622 
623 /**
624  * cpu_reset:
625  * @cpu: The CPU whose state is to be reset.
626  */
627 void cpu_reset(CPUState *cpu);
628 
629 /**
630  * cpu_class_by_name:
631  * @typename: The CPU base type.
632  * @cpu_model: The model string without any parameters.
633  *
634  * Looks up a CPU #ObjectClass matching name @cpu_model.
635  *
636  * Returns: A #CPUClass or %NULL if not matching class is found.
637  */
638 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
639 
640 /**
641  * cpu_create:
642  * @typename: The CPU type.
643  *
644  * Instantiates a CPU and realizes the CPU.
645  *
646  * Returns: A #CPUState or %NULL if an error occurred.
647  */
648 CPUState *cpu_create(const char *typename);
649 
650 /**
651  * parse_cpu_option:
652  * @cpu_option: The -cpu option including optional parameters.
653  *
654  * processes optional parameters and registers them as global properties
655  *
656  * Returns: type of CPU to create or prints error and terminates process
657  *          if an error occurred.
658  */
659 const char *parse_cpu_option(const char *cpu_option);
660 
661 /**
662  * cpu_has_work:
663  * @cpu: The vCPU to check.
664  *
665  * Checks whether the CPU has work to do.
666  *
667  * Returns: %true if the CPU has work, %false otherwise.
668  */
669 static inline bool cpu_has_work(CPUState *cpu)
670 {
671     CPUClass *cc = CPU_GET_CLASS(cpu);
672 
673     g_assert(cc->has_work);
674     return cc->has_work(cpu);
675 }
676 
677 /**
678  * qemu_cpu_is_self:
679  * @cpu: The vCPU to check against.
680  *
681  * Checks whether the caller is executing on the vCPU thread.
682  *
683  * Returns: %true if called from @cpu's thread, %false otherwise.
684  */
685 bool qemu_cpu_is_self(CPUState *cpu);
686 
687 /**
688  * qemu_cpu_kick:
689  * @cpu: The vCPU to kick.
690  *
691  * Kicks @cpu's thread.
692  */
693 void qemu_cpu_kick(CPUState *cpu);
694 
695 /**
696  * cpu_is_stopped:
697  * @cpu: The CPU to check.
698  *
699  * Checks whether the CPU is stopped.
700  *
701  * Returns: %true if run state is not running or if artificially stopped;
702  * %false otherwise.
703  */
704 bool cpu_is_stopped(CPUState *cpu);
705 
706 /**
707  * do_run_on_cpu:
708  * @cpu: The vCPU to run on.
709  * @func: The function to be executed.
710  * @data: Data to pass to the function.
711  * @mutex: Mutex to release while waiting for @func to run.
712  *
713  * Used internally in the implementation of run_on_cpu.
714  */
715 void do_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data,
716                    QemuMutex *mutex);
717 
718 /**
719  * run_on_cpu:
720  * @cpu: The vCPU to run on.
721  * @func: The function to be executed.
722  * @data: Data to pass to the function.
723  *
724  * Schedules the function @func for execution on the vCPU @cpu.
725  */
726 void run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
727 
728 /**
729  * async_run_on_cpu:
730  * @cpu: The vCPU to run on.
731  * @func: The function to be executed.
732  * @data: Data to pass to the function.
733  *
734  * Schedules the function @func for execution on the vCPU @cpu asynchronously.
735  */
736 void async_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
737 
738 /**
739  * async_safe_run_on_cpu:
740  * @cpu: The vCPU to run on.
741  * @func: The function to be executed.
742  * @data: Data to pass to the function.
743  *
744  * Schedules the function @func for execution on the vCPU @cpu asynchronously,
745  * while all other vCPUs are sleeping.
746  *
747  * Unlike run_on_cpu and async_run_on_cpu, the function is run outside the
748  * BQL.
749  */
750 void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data);
751 
752 /**
753  * cpu_in_exclusive_context()
754  * @cpu: The vCPU to check
755  *
756  * Returns true if @cpu is an exclusive context, for example running
757  * something which has previously been queued via async_safe_run_on_cpu().
758  */
759 static inline bool cpu_in_exclusive_context(const CPUState *cpu)
760 {
761     return cpu->in_exclusive_context;
762 }
763 
764 /**
765  * qemu_get_cpu:
766  * @index: The CPUState@cpu_index value of the CPU to obtain.
767  *
768  * Gets a CPU matching @index.
769  *
770  * Returns: The CPU or %NULL if there is no matching CPU.
771  */
772 CPUState *qemu_get_cpu(int index);
773 
774 /**
775  * cpu_exists:
776  * @id: Guest-exposed CPU ID to lookup.
777  *
778  * Search for CPU with specified ID.
779  *
780  * Returns: %true - CPU is found, %false - CPU isn't found.
781  */
782 bool cpu_exists(int64_t id);
783 
784 /**
785  * cpu_by_arch_id:
786  * @id: Guest-exposed CPU ID of the CPU to obtain.
787  *
788  * Get a CPU with matching @id.
789  *
790  * Returns: The CPU or %NULL if there is no matching CPU.
791  */
792 CPUState *cpu_by_arch_id(int64_t id);
793 
794 /**
795  * cpu_interrupt:
796  * @cpu: The CPU to set an interrupt on.
797  * @mask: The interrupts to set.
798  *
799  * Invokes the interrupt handler.
800  */
801 
802 void cpu_interrupt(CPUState *cpu, int mask);
803 
804 /**
805  * cpu_set_pc:
806  * @cpu: The CPU to set the program counter for.
807  * @addr: Program counter value.
808  *
809  * Sets the program counter for a CPU.
810  */
811 static inline void cpu_set_pc(CPUState *cpu, vaddr addr)
812 {
813     CPUClass *cc = CPU_GET_CLASS(cpu);
814 
815     cc->set_pc(cpu, addr);
816 }
817 
818 /**
819  * cpu_reset_interrupt:
820  * @cpu: The CPU to clear the interrupt on.
821  * @mask: The interrupt mask to clear.
822  *
823  * Resets interrupts on the vCPU @cpu.
824  */
825 void cpu_reset_interrupt(CPUState *cpu, int mask);
826 
827 /**
828  * cpu_exit:
829  * @cpu: The CPU to exit.
830  *
831  * Requests the CPU @cpu to exit execution.
832  */
833 void cpu_exit(CPUState *cpu);
834 
835 /**
836  * cpu_resume:
837  * @cpu: The CPU to resume.
838  *
839  * Resumes CPU, i.e. puts CPU into runnable state.
840  */
841 void cpu_resume(CPUState *cpu);
842 
843 /**
844  * cpu_remove_sync:
845  * @cpu: The CPU to remove.
846  *
847  * Requests the CPU to be removed and waits till it is removed.
848  */
849 void cpu_remove_sync(CPUState *cpu);
850 
851 /**
852  * process_queued_cpu_work() - process all items on CPU work queue
853  * @cpu: The CPU which work queue to process.
854  */
855 void process_queued_cpu_work(CPUState *cpu);
856 
857 /**
858  * cpu_exec_start:
859  * @cpu: The CPU for the current thread.
860  *
861  * Record that a CPU has started execution and can be interrupted with
862  * cpu_exit.
863  */
864 void cpu_exec_start(CPUState *cpu);
865 
866 /**
867  * cpu_exec_end:
868  * @cpu: The CPU for the current thread.
869  *
870  * Record that a CPU has stopped execution and exclusive sections
871  * can be executed without interrupting it.
872  */
873 void cpu_exec_end(CPUState *cpu);
874 
875 /**
876  * start_exclusive:
877  *
878  * Wait for a concurrent exclusive section to end, and then start
879  * a section of work that is run while other CPUs are not running
880  * between cpu_exec_start and cpu_exec_end.  CPUs that are running
881  * cpu_exec are exited immediately.  CPUs that call cpu_exec_start
882  * during the exclusive section go to sleep until this CPU calls
883  * end_exclusive.
884  */
885 void start_exclusive(void);
886 
887 /**
888  * end_exclusive:
889  *
890  * Concludes an exclusive execution section started by start_exclusive.
891  */
892 void end_exclusive(void);
893 
894 /**
895  * qemu_init_vcpu:
896  * @cpu: The vCPU to initialize.
897  *
898  * Initializes a vCPU.
899  */
900 void qemu_init_vcpu(CPUState *cpu);
901 
902 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
903 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
904 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
905 
906 /**
907  * cpu_single_step:
908  * @cpu: CPU to the flags for.
909  * @enabled: Flags to enable.
910  *
911  * Enables or disables single-stepping for @cpu.
912  */
913 void cpu_single_step(CPUState *cpu, int enabled);
914 
915 /* Breakpoint/watchpoint flags */
916 #define BP_MEM_READ           0x01
917 #define BP_MEM_WRITE          0x02
918 #define BP_MEM_ACCESS         (BP_MEM_READ | BP_MEM_WRITE)
919 #define BP_STOP_BEFORE_ACCESS 0x04
920 /* 0x08 currently unused */
921 #define BP_GDB                0x10
922 #define BP_CPU                0x20
923 #define BP_ANY                (BP_GDB | BP_CPU)
924 #define BP_WATCHPOINT_HIT_READ 0x40
925 #define BP_WATCHPOINT_HIT_WRITE 0x80
926 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
927 
928 int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
929                           CPUBreakpoint **breakpoint);
930 int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags);
931 void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint);
932 void cpu_breakpoint_remove_all(CPUState *cpu, int mask);
933 
934 /* Return true if PC matches an installed breakpoint.  */
935 static inline bool cpu_breakpoint_test(CPUState *cpu, vaddr pc, int mask)
936 {
937     CPUBreakpoint *bp;
938 
939     if (unlikely(!QTAILQ_EMPTY(&cpu->breakpoints))) {
940         QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
941             if (bp->pc == pc && (bp->flags & mask)) {
942                 return true;
943             }
944         }
945     }
946     return false;
947 }
948 
949 #ifdef CONFIG_USER_ONLY
950 static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
951                                         int flags, CPUWatchpoint **watchpoint)
952 {
953     return -ENOSYS;
954 }
955 
956 static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
957                                         vaddr len, int flags)
958 {
959     return -ENOSYS;
960 }
961 
962 static inline void cpu_watchpoint_remove_by_ref(CPUState *cpu,
963                                                 CPUWatchpoint *wp)
964 {
965 }
966 
967 static inline void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
968 {
969 }
970 
971 static inline void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
972                                         MemTxAttrs atr, int fl, uintptr_t ra)
973 {
974 }
975 
976 static inline int cpu_watchpoint_address_matches(CPUState *cpu,
977                                                  vaddr addr, vaddr len)
978 {
979     return 0;
980 }
981 #else
982 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
983                           int flags, CPUWatchpoint **watchpoint);
984 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
985                           vaddr len, int flags);
986 void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
987 void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
988 
989 /**
990  * cpu_check_watchpoint:
991  * @cpu: cpu context
992  * @addr: guest virtual address
993  * @len: access length
994  * @attrs: memory access attributes
995  * @flags: watchpoint access type
996  * @ra: unwind return address
997  *
998  * Check for a watchpoint hit in [addr, addr+len) of the type
999  * specified by @flags.  Exit via exception with a hit.
1000  */
1001 void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
1002                           MemTxAttrs attrs, int flags, uintptr_t ra);
1003 
1004 /**
1005  * cpu_watchpoint_address_matches:
1006  * @cpu: cpu context
1007  * @addr: guest virtual address
1008  * @len: access length
1009  *
1010  * Return the watchpoint flags that apply to [addr, addr+len).
1011  * If no watchpoint is registered for the range, the result is 0.
1012  */
1013 int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len);
1014 #endif
1015 
1016 /**
1017  * cpu_get_address_space:
1018  * @cpu: CPU to get address space from
1019  * @asidx: index identifying which address space to get
1020  *
1021  * Return the requested address space of this CPU. @asidx
1022  * specifies which address space to read.
1023  */
1024 AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx);
1025 
1026 G_NORETURN void cpu_abort(CPUState *cpu, const char *fmt, ...)
1027     G_GNUC_PRINTF(2, 3);
1028 
1029 /* $(top_srcdir)/cpu.c */
1030 void cpu_class_init_props(DeviceClass *dc);
1031 void cpu_exec_initfn(CPUState *cpu);
1032 void cpu_exec_realizefn(CPUState *cpu, Error **errp);
1033 void cpu_exec_unrealizefn(CPUState *cpu);
1034 
1035 /**
1036  * target_words_bigendian:
1037  * Returns true if the (default) endianness of the target is big endian,
1038  * false otherwise. Note that in target-specific code, you can use
1039  * TARGET_BIG_ENDIAN directly instead. On the other hand, common
1040  * code should normally never need to know about the endianness of the
1041  * target, so please do *not* use this function unless you know very well
1042  * what you are doing!
1043  */
1044 bool target_words_bigendian(void);
1045 
1046 void page_size_init(void);
1047 
1048 #ifdef NEED_CPU_H
1049 
1050 #ifdef CONFIG_SOFTMMU
1051 
1052 extern const VMStateDescription vmstate_cpu_common;
1053 
1054 #define VMSTATE_CPU() {                                                     \
1055     .name = "parent_obj",                                                   \
1056     .size = sizeof(CPUState),                                               \
1057     .vmsd = &vmstate_cpu_common,                                            \
1058     .flags = VMS_STRUCT,                                                    \
1059     .offset = 0,                                                            \
1060 }
1061 #endif /* CONFIG_SOFTMMU */
1062 
1063 #endif /* NEED_CPU_H */
1064 
1065 #define UNASSIGNED_CPU_INDEX -1
1066 #define UNASSIGNED_CLUSTER_INDEX -1
1067 
1068 #endif
1069