xref: /openbmc/qemu/include/hw/char/stm32f2xx_usart.h (revision e9f30b1e)
173af5d11SAlistair Francis /*
273af5d11SAlistair Francis  * STM32F2XX USART
373af5d11SAlistair Francis  *
473af5d11SAlistair Francis  * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
573af5d11SAlistair Francis  *
673af5d11SAlistair Francis  * Permission is hereby granted, free of charge, to any person obtaining a copy
773af5d11SAlistair Francis  * of this software and associated documentation files (the "Software"), to deal
873af5d11SAlistair Francis  * in the Software without restriction, including without limitation the rights
973af5d11SAlistair Francis  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
1073af5d11SAlistair Francis  * copies of the Software, and to permit persons to whom the Software is
1173af5d11SAlistair Francis  * furnished to do so, subject to the following conditions:
1273af5d11SAlistair Francis  *
1373af5d11SAlistair Francis  * The above copyright notice and this permission notice shall be included in
1473af5d11SAlistair Francis  * all copies or substantial portions of the Software.
1573af5d11SAlistair Francis  *
1673af5d11SAlistair Francis  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1773af5d11SAlistair Francis  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1873af5d11SAlistair Francis  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
1973af5d11SAlistair Francis  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
2073af5d11SAlistair Francis  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
2173af5d11SAlistair Francis  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
2273af5d11SAlistair Francis  * THE SOFTWARE.
2373af5d11SAlistair Francis  */
2473af5d11SAlistair Francis 
2573af5d11SAlistair Francis #ifndef HW_STM32F2XX_USART_H
2673af5d11SAlistair Francis #define HW_STM32F2XX_USART_H
2773af5d11SAlistair Francis 
2873af5d11SAlistair Francis #include "hw/sysbus.h"
294d43a603SMarc-André Lureau #include "chardev/char-fe.h"
30db1015e9SEduardo Habkost #include "qom/object.h"
3173af5d11SAlistair Francis 
3273af5d11SAlistair Francis #define USART_SR   0x00
3373af5d11SAlistair Francis #define USART_DR   0x04
3473af5d11SAlistair Francis #define USART_BRR  0x08
3573af5d11SAlistair Francis #define USART_CR1  0x0C
3673af5d11SAlistair Francis #define USART_CR2  0x10
3773af5d11SAlistair Francis #define USART_CR3  0x14
3873af5d11SAlistair Francis #define USART_GTPR 0x18
3973af5d11SAlistair Francis 
40f6bfe45aSRichard Braun /*
41f6bfe45aSRichard Braun  * NB: The reset value mentioned in "24.6.1 Status register" seems bogus.
42f6bfe45aSRichard Braun  * Looking at "Table 98 USART register map and reset values", it seems it
43f6bfe45aSRichard Braun  * should be 0xc0, and that's how real hardware behaves.
44f6bfe45aSRichard Braun  */
45f6bfe45aSRichard Braun #define USART_SR_RESET (USART_SR_TXE | USART_SR_TC)
4673af5d11SAlistair Francis 
4773af5d11SAlistair Francis #define USART_SR_TXE  (1 << 7)
4873af5d11SAlistair Francis #define USART_SR_TC   (1 << 6)
4973af5d11SAlistair Francis #define USART_SR_RXNE (1 << 5)
5073af5d11SAlistair Francis 
5173af5d11SAlistair Francis #define USART_CR1_UE     (1 << 13)
52*e9f30b1eSHans-Erik Floryd #define USART_CR1_TXEIE  (1 << 7)
53*e9f30b1eSHans-Erik Floryd #define USART_CR1_TCEIE  (1 << 6)
5473af5d11SAlistair Francis #define USART_CR1_RXNEIE (1 << 5)
5573af5d11SAlistair Francis #define USART_CR1_TE     (1 << 3)
5673af5d11SAlistair Francis #define USART_CR1_RE     (1 << 2)
5773af5d11SAlistair Francis 
5873af5d11SAlistair Francis #define TYPE_STM32F2XX_USART "stm32f2xx-usart"
598063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(STM32F2XXUsartState, STM32F2XX_USART)
6073af5d11SAlistair Francis 
61db1015e9SEduardo Habkost struct STM32F2XXUsartState {
6273af5d11SAlistair Francis     /* <private> */
6373af5d11SAlistair Francis     SysBusDevice parent_obj;
6473af5d11SAlistair Francis 
6573af5d11SAlistair Francis     /* <public> */
6673af5d11SAlistair Francis     MemoryRegion mmio;
6773af5d11SAlistair Francis 
6873af5d11SAlistair Francis     uint32_t usart_sr;
6973af5d11SAlistair Francis     uint32_t usart_dr;
7073af5d11SAlistair Francis     uint32_t usart_brr;
7173af5d11SAlistair Francis     uint32_t usart_cr1;
7273af5d11SAlistair Francis     uint32_t usart_cr2;
7373af5d11SAlistair Francis     uint32_t usart_cr3;
7473af5d11SAlistair Francis     uint32_t usart_gtpr;
7573af5d11SAlistair Francis 
76becdfa00SMarc-André Lureau     CharBackend chr;
7773af5d11SAlistair Francis     qemu_irq irq;
78db1015e9SEduardo Habkost };
7973af5d11SAlistair Francis #endif /* HW_STM32F2XX_USART_H */
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