xref: /openbmc/qemu/include/hw/char/shakti_uart.h (revision ffe98631)
1 /*
2  * SHAKTI UART
3  *
4  * Copyright (c) 2021 Vijai Kumar K <vijai@behindbytes.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #ifndef HW_SHAKTI_UART_H
26 #define HW_SHAKTI_UART_H
27 
28 #include "hw/sysbus.h"
29 #include "chardev/char-fe.h"
30 
31 #define SHAKTI_UART_BAUD        0x00
32 #define SHAKTI_UART_TX          0x04
33 #define SHAKTI_UART_RX          0x08
34 #define SHAKTI_UART_STATUS      0x0C
35 #define SHAKTI_UART_DELAY       0x10
36 #define SHAKTI_UART_CONTROL     0x14
37 #define SHAKTI_UART_INT_EN      0x18
38 #define SHAKTI_UART_IQ_CYCLES   0x1C
39 #define SHAKTI_UART_RX_THRES    0x20
40 
41 #define SHAKTI_UART_STATUS_TX_EMPTY     (1 << 0)
42 #define SHAKTI_UART_STATUS_TX_FULL      (1 << 1)
43 #define SHAKTI_UART_STATUS_RX_NOT_EMPTY (1 << 2)
44 #define SHAKTI_UART_STATUS_RX_FULL      (1 << 3)
45 /* 9600 8N1 is the default setting */
46 /* Reg value = (50000000 Hz)/(16 * 9600)*/
47 #define SHAKTI_UART_BAUD_DEFAULT    0x0145
48 #define SHAKTI_UART_CONTROL_DEFAULT 0x0100
49 
50 #define TYPE_SHAKTI_UART "shakti-uart"
51 #define SHAKTI_UART(obj) \
52     OBJECT_CHECK(ShaktiUartState, (obj), TYPE_SHAKTI_UART)
53 
54 typedef struct {
55     /* <private> */
56     SysBusDevice parent_obj;
57 
58     /* <public> */
59     MemoryRegion mmio;
60 
61     uint32_t uart_baud;
62     uint32_t uart_tx;
63     uint32_t uart_rx;
64     uint32_t uart_status;
65     uint32_t uart_delay;
66     uint32_t uart_control;
67     uint32_t uart_interrupt;
68     uint32_t uart_iq_cycles;
69     uint32_t uart_rx_threshold;
70 
71     CharBackend chr;
72 } ShaktiUartState;
73 
74 #endif /* HW_SHAKTI_UART_H */
75