1 /* 2 * Microchip PolarFire SoC MMUART emulation 3 * 4 * Copyright (c) 2020 Wind River Systems, Inc. 5 * 6 * Author: 7 * Bin Meng <bin.meng@windriver.com> 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a copy 10 * of this software and associated documentation files (the "Software"), to deal 11 * in the Software without restriction, including without limitation the rights 12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 13 * copies of the Software, and to permit persons to whom the Software is 14 * furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 25 * THE SOFTWARE. 26 */ 27 28 #ifndef HW_MCHP_PFSOC_MMUART_H 29 #define HW_MCHP_PFSOC_MMUART_H 30 31 #include "hw/char/serial.h" 32 33 #define MCHP_PFSOC_MMUART_REG_COUNT 13 34 35 typedef struct MchpPfSoCMMUartState { 36 MemoryRegion iomem; 37 hwaddr base; 38 qemu_irq irq; 39 40 SerialMM *serial; 41 42 uint32_t reg[MCHP_PFSOC_MMUART_REG_COUNT]; 43 } MchpPfSoCMMUartState; 44 45 /** 46 * mchp_pfsoc_mmuart_create - Create a Microchip PolarFire SoC MMUART 47 * 48 * This is a helper routine for board to create a MMUART device that is 49 * compatible with Microchip PolarFire SoC. 50 * 51 * @sysmem: system memory region to map 52 * @base: base address of the MMUART registers 53 * @irq: IRQ number of the MMUART device 54 * @chr: character device to associate to 55 * 56 * @return: a pointer to the device specific control structure 57 */ 58 MchpPfSoCMMUartState *mchp_pfsoc_mmuart_create(MemoryRegion *sysmem, 59 hwaddr base, qemu_irq irq, Chardev *chr); 60 61 #endif /* HW_MCHP_PFSOC_MMUART_H */ 62