1*d447e4b7SJackson Donaldson /* 2*d447e4b7SJackson Donaldson * MAX78000 UART 3*d447e4b7SJackson Donaldson * 4*d447e4b7SJackson Donaldson * Copyright (c) 2025 Jackson Donaldson <jcksn@duck.com> 5*d447e4b7SJackson Donaldson * 6*d447e4b7SJackson Donaldson * SPDX-License-Identifier: GPL-2.0-or-later 7*d447e4b7SJackson Donaldson */ 8*d447e4b7SJackson Donaldson 9*d447e4b7SJackson Donaldson #ifndef HW_MAX78000_UART_H 10*d447e4b7SJackson Donaldson #define HW_MAX78000_UART_H 11*d447e4b7SJackson Donaldson 12*d447e4b7SJackson Donaldson #include "hw/sysbus.h" 13*d447e4b7SJackson Donaldson #include "chardev/char-fe.h" 14*d447e4b7SJackson Donaldson #include "qemu/fifo8.h" 15*d447e4b7SJackson Donaldson #include "qom/object.h" 16*d447e4b7SJackson Donaldson 17*d447e4b7SJackson Donaldson #define UART_CTRL 0x0 18*d447e4b7SJackson Donaldson #define UART_STATUS 0x4 19*d447e4b7SJackson Donaldson #define UART_INT_EN 0x8 20*d447e4b7SJackson Donaldson #define UART_INT_FL 0xc 21*d447e4b7SJackson Donaldson #define UART_CLKDIV 0x10 22*d447e4b7SJackson Donaldson #define UART_OSR 0x14 23*d447e4b7SJackson Donaldson #define UART_TXPEEK 0x18 24*d447e4b7SJackson Donaldson #define UART_PNR 0x1c 25*d447e4b7SJackson Donaldson #define UART_FIFO 0x20 26*d447e4b7SJackson Donaldson #define UART_DMA 0x30 27*d447e4b7SJackson Donaldson #define UART_WKEN 0x34 28*d447e4b7SJackson Donaldson #define UART_WKFL 0x38 29*d447e4b7SJackson Donaldson 30*d447e4b7SJackson Donaldson /* CTRL */ 31*d447e4b7SJackson Donaldson #define UART_CTF_DIS (1 << 7) 32*d447e4b7SJackson Donaldson #define UART_FLUSH_TX (1 << 8) 33*d447e4b7SJackson Donaldson #define UART_FLUSH_RX (1 << 9) 34*d447e4b7SJackson Donaldson #define UART_BCLKEN (1 << 15) 35*d447e4b7SJackson Donaldson #define UART_BCLKRDY (1 << 19) 36*d447e4b7SJackson Donaldson 37*d447e4b7SJackson Donaldson /* STATUS */ 38*d447e4b7SJackson Donaldson #define UART_RX_LVL 8 39*d447e4b7SJackson Donaldson #define UART_TX_EM (1 << 6) 40*d447e4b7SJackson Donaldson #define UART_RX_FULL (1 << 5) 41*d447e4b7SJackson Donaldson #define UART_RX_EM (1 << 4) 42*d447e4b7SJackson Donaldson 43*d447e4b7SJackson Donaldson /* PNR (Pin Control Register) */ 44*d447e4b7SJackson Donaldson #define UART_CTS 1 45*d447e4b7SJackson Donaldson #define UART_RTS (1 << 1) 46*d447e4b7SJackson Donaldson 47*d447e4b7SJackson Donaldson /* INT_EN / INT_FL */ 48*d447e4b7SJackson Donaldson #define UART_RX_THD (1 << 4) 49*d447e4b7SJackson Donaldson #define UART_TX_HE (1 << 6) 50*d447e4b7SJackson Donaldson 51*d447e4b7SJackson Donaldson #define UART_RXBUFLEN 0x100 52*d447e4b7SJackson Donaldson #define TYPE_MAX78000_UART "max78000-uart" 53*d447e4b7SJackson Donaldson OBJECT_DECLARE_SIMPLE_TYPE(Max78000UartState, MAX78000_UART) 54*d447e4b7SJackson Donaldson 55*d447e4b7SJackson Donaldson struct Max78000UartState { 56*d447e4b7SJackson Donaldson SysBusDevice parent_obj; 57*d447e4b7SJackson Donaldson 58*d447e4b7SJackson Donaldson MemoryRegion mmio; 59*d447e4b7SJackson Donaldson 60*d447e4b7SJackson Donaldson uint32_t ctrl; 61*d447e4b7SJackson Donaldson uint32_t status; 62*d447e4b7SJackson Donaldson uint32_t int_en; 63*d447e4b7SJackson Donaldson uint32_t int_fl; 64*d447e4b7SJackson Donaldson uint32_t clkdiv; 65*d447e4b7SJackson Donaldson uint32_t osr; 66*d447e4b7SJackson Donaldson uint32_t txpeek; 67*d447e4b7SJackson Donaldson uint32_t pnr; 68*d447e4b7SJackson Donaldson uint32_t fifo; 69*d447e4b7SJackson Donaldson uint32_t dma; 70*d447e4b7SJackson Donaldson uint32_t wken; 71*d447e4b7SJackson Donaldson uint32_t wkfl; 72*d447e4b7SJackson Donaldson 73*d447e4b7SJackson Donaldson Fifo8 rx_fifo; 74*d447e4b7SJackson Donaldson 75*d447e4b7SJackson Donaldson CharBackend chr; 76*d447e4b7SJackson Donaldson qemu_irq irq; 77*d447e4b7SJackson Donaldson }; 78*d447e4b7SJackson Donaldson #endif /* HW_STM32F2XX_USART_H */ 79