1 /* 2 * Device model for Cadence UART 3 * 4 * Copyright (c) 2010 Xilinx Inc. 5 * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com) 6 * Copyright (c) 2012 PetaLogix Pty Ltd. 7 * Written by Haibing Ma 8 * M.Habib 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * as published by the Free Software Foundation; either version 13 * 2 of the License, or (at your option) any later version. 14 * 15 * You should have received a copy of the GNU General Public License along 16 * with this program; if not, see <http://www.gnu.org/licenses/>. 17 */ 18 19 #ifndef CADENCE_UART_H 20 #define CADENCE_UART_H 21 22 #include "hw/qdev-properties.h" 23 #include "hw/sysbus.h" 24 #include "chardev/char-fe.h" 25 #include "qapi/error.h" 26 #include "qemu/timer.h" 27 #include "qom/object.h" 28 29 #define CADENCE_UART_RX_FIFO_SIZE 16 30 #define CADENCE_UART_TX_FIFO_SIZE 16 31 32 #define CADENCE_UART_R_MAX (0x48/4) 33 34 #define TYPE_CADENCE_UART "cadence_uart" 35 OBJECT_DECLARE_SIMPLE_TYPE(CadenceUARTState, CADENCE_UART) 36 37 struct CadenceUARTState { 38 /*< private >*/ 39 SysBusDevice parent_obj; 40 41 /*< public >*/ 42 MemoryRegion iomem; 43 uint32_t r[CADENCE_UART_R_MAX]; 44 uint8_t rx_fifo[CADENCE_UART_RX_FIFO_SIZE]; 45 uint8_t tx_fifo[CADENCE_UART_TX_FIFO_SIZE]; 46 uint32_t rx_wpos; 47 uint32_t rx_count; 48 uint32_t tx_count; 49 uint64_t char_tx_time; 50 CharBackend chr; 51 qemu_irq irq; 52 QEMUTimer *fifo_trigger_handle; 53 Clock *refclk; 54 }; 55 56 #endif 57