xref: /openbmc/qemu/include/hw/arm/virt.h (revision f0984d40)
1 /*
2  *
3  * Copyright (c) 2015 Linaro Limited
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2 or later, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program.  If not, see <http://www.gnu.org/licenses/>.
16  *
17  * Emulate a virtual board which works by passing Linux all the information
18  * it needs about what devices are present via the device tree.
19  * There are some restrictions about what we can do here:
20  *  + we can only present devices whose Linux drivers will work based
21  *    purely on the device tree with no platform data at all
22  *  + we want to present a very stripped-down minimalist platform,
23  *    both because this reduces the security attack surface from the guest
24  *    and also because it reduces our exposure to being broken when
25  *    the kernel updates its device tree bindings and requires further
26  *    information in a device binding that we aren't providing.
27  * This is essentially the same approach kvmtool uses.
28  */
29 
30 #ifndef QEMU_ARM_VIRT_H
31 #define QEMU_ARM_VIRT_H
32 
33 #include "exec/hwaddr.h"
34 #include "qemu/notify.h"
35 #include "hw/boards.h"
36 #include "hw/arm/boot.h"
37 #include "hw/block/flash.h"
38 #include "sysemu/kvm.h"
39 #include "hw/intc/arm_gicv3_common.h"
40 #include "qom/object.h"
41 
42 #define NUM_GICV2M_SPIS       64
43 #define NUM_VIRTIO_TRANSPORTS 32
44 #define NUM_SMMU_IRQS          4
45 
46 #define ARCH_GIC_MAINT_IRQ  9
47 
48 #define ARCH_TIMER_VIRT_IRQ   11
49 #define ARCH_TIMER_S_EL1_IRQ  13
50 #define ARCH_TIMER_NS_EL1_IRQ 14
51 #define ARCH_TIMER_NS_EL2_IRQ 10
52 
53 #define VIRTUAL_PMU_IRQ 7
54 
55 #define PPI(irq) ((irq) + 16)
56 
57 /* See Linux kernel arch/arm64/include/asm/pvclock-abi.h */
58 #define PVTIME_SIZE_PER_CPU 64
59 
60 enum {
61     VIRT_FLASH,
62     VIRT_MEM,
63     VIRT_CPUPERIPHS,
64     VIRT_GIC_DIST,
65     VIRT_GIC_CPU,
66     VIRT_GIC_V2M,
67     VIRT_GIC_HYP,
68     VIRT_GIC_VCPU,
69     VIRT_GIC_ITS,
70     VIRT_GIC_REDIST,
71     VIRT_SMMU,
72     VIRT_UART,
73     VIRT_MMIO,
74     VIRT_RTC,
75     VIRT_FW_CFG,
76     VIRT_PCIE,
77     VIRT_PCIE_MMIO,
78     VIRT_PCIE_PIO,
79     VIRT_PCIE_ECAM,
80     VIRT_PLATFORM_BUS,
81     VIRT_GPIO,
82     VIRT_SECURE_UART,
83     VIRT_SECURE_MEM,
84     VIRT_SECURE_GPIO,
85     VIRT_PCDIMM_ACPI,
86     VIRT_ACPI_GED,
87     VIRT_NVDIMM_ACPI,
88     VIRT_PVTIME,
89     VIRT_LOWMEMMAP_LAST,
90 };
91 
92 /* indices of IO regions located after the RAM */
93 enum {
94     VIRT_HIGH_GIC_REDIST2 =  VIRT_LOWMEMMAP_LAST,
95     VIRT_HIGH_PCIE_ECAM,
96     VIRT_HIGH_PCIE_MMIO,
97 };
98 
99 typedef enum VirtIOMMUType {
100     VIRT_IOMMU_NONE,
101     VIRT_IOMMU_SMMUV3,
102     VIRT_IOMMU_VIRTIO,
103 } VirtIOMMUType;
104 
105 typedef enum VirtMSIControllerType {
106     VIRT_MSI_CTRL_NONE,
107     VIRT_MSI_CTRL_GICV2M,
108     VIRT_MSI_CTRL_ITS,
109 } VirtMSIControllerType;
110 
111 typedef enum VirtGICType {
112     VIRT_GIC_VERSION_MAX = 0,
113     VIRT_GIC_VERSION_HOST = 1,
114     /* The concrete GIC values have to match the GIC version number */
115     VIRT_GIC_VERSION_2 = 2,
116     VIRT_GIC_VERSION_3 = 3,
117     VIRT_GIC_VERSION_4 = 4,
118     VIRT_GIC_VERSION_NOSEL,
119 } VirtGICType;
120 
121 #define VIRT_GIC_VERSION_2_MASK BIT(VIRT_GIC_VERSION_2)
122 #define VIRT_GIC_VERSION_3_MASK BIT(VIRT_GIC_VERSION_3)
123 #define VIRT_GIC_VERSION_4_MASK BIT(VIRT_GIC_VERSION_4)
124 
125 struct VirtMachineClass {
126     MachineClass parent;
127     bool disallow_affinity_adjustment;
128     bool no_its;
129     bool no_tcg_its;
130     bool no_pmu;
131     bool claim_edge_triggered_timers;
132     bool smbios_old_sys_ver;
133     bool no_highmem_compact;
134     bool no_highmem_ecam;
135     bool no_ged;   /* Machines < 4.2 have no support for ACPI GED device */
136     bool kvm_no_adjvtime;
137     bool no_kvm_steal_time;
138     bool acpi_expose_flash;
139     bool no_secure_gpio;
140     /* Machines < 6.2 have no support for describing cpu topology to guest */
141     bool no_cpu_topology;
142     bool no_tcg_lpa2;
143 };
144 
145 struct VirtMachineState {
146     MachineState parent;
147     Notifier machine_done;
148     DeviceState *platform_bus_dev;
149     FWCfgState *fw_cfg;
150     PFlashCFI01 *flash[2];
151     bool secure;
152     bool highmem;
153     bool highmem_compact;
154     bool highmem_ecam;
155     bool highmem_mmio;
156     bool highmem_redists;
157     bool its;
158     bool tcg_its;
159     bool virt;
160     bool ras;
161     bool mte;
162     bool dtb_randomness;
163     OnOffAuto acpi;
164     VirtGICType gic_version;
165     VirtIOMMUType iommu;
166     bool default_bus_bypass_iommu;
167     VirtMSIControllerType msi_controller;
168     uint16_t virtio_iommu_bdf;
169     struct arm_boot_info bootinfo;
170     MemMapEntry *memmap;
171     char *pciehb_nodename;
172     const int *irqmap;
173     int fdt_size;
174     uint32_t clock_phandle;
175     uint32_t gic_phandle;
176     uint32_t msi_phandle;
177     uint32_t iommu_phandle;
178     int psci_conduit;
179     hwaddr highest_gpa;
180     DeviceState *gic;
181     DeviceState *acpi_dev;
182     Notifier powerdown_notifier;
183     PCIBus *bus;
184     char *oem_id;
185     char *oem_table_id;
186 };
187 
188 #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
189 
190 #define TYPE_VIRT_MACHINE   MACHINE_TYPE_NAME("virt")
191 OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClass, VIRT_MACHINE)
192 
193 void virt_acpi_setup(VirtMachineState *vms);
194 bool virt_is_acpi_enabled(VirtMachineState *vms);
195 
196 /* Return number of redistributors that fit in the specified region */
197 static uint32_t virt_redist_capacity(VirtMachineState *vms, int region)
198 {
199     uint32_t redist_size;
200 
201     if (vms->gic_version == VIRT_GIC_VERSION_3) {
202         redist_size = GICV3_REDIST_SIZE;
203     } else {
204         redist_size = GICV4_REDIST_SIZE;
205     }
206     return vms->memmap[region].size / redist_size;
207 }
208 
209 /* Return the number of used redistributor regions  */
210 static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)
211 {
212     uint32_t redist0_capacity = virt_redist_capacity(vms, VIRT_GIC_REDIST);
213 
214     assert(vms->gic_version != VIRT_GIC_VERSION_2);
215 
216     return (MACHINE(vms)->smp.cpus > redist0_capacity &&
217             vms->highmem_redists) ? 2 : 1;
218 }
219 
220 #endif /* QEMU_ARM_VIRT_H */
221