1 /* 2 * 3 * Copyright (c) 2015 Linaro Limited 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2 or later, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 * 17 * Emulate a virtual board which works by passing Linux all the information 18 * it needs about what devices are present via the device tree. 19 * There are some restrictions about what we can do here: 20 * + we can only present devices whose Linux drivers will work based 21 * purely on the device tree with no platform data at all 22 * + we want to present a very stripped-down minimalist platform, 23 * both because this reduces the security attack surface from the guest 24 * and also because it reduces our exposure to being broken when 25 * the kernel updates its device tree bindings and requires further 26 * information in a device binding that we aren't providing. 27 * This is essentially the same approach kvmtool uses. 28 */ 29 30 #ifndef QEMU_ARM_VIRT_H 31 #define QEMU_ARM_VIRT_H 32 33 #include "exec/hwaddr.h" 34 #include "qemu/notify.h" 35 #include "hw/boards.h" 36 #include "hw/arm/boot.h" 37 #include "hw/arm/bsa.h" 38 #include "hw/block/flash.h" 39 #include "sysemu/kvm.h" 40 #include "hw/intc/arm_gicv3_common.h" 41 #include "qom/object.h" 42 43 #define NUM_GICV2M_SPIS 64 44 #define NUM_VIRTIO_TRANSPORTS 32 45 #define NUM_SMMU_IRQS 4 46 47 /* See Linux kernel arch/arm64/include/asm/pvclock-abi.h */ 48 #define PVTIME_SIZE_PER_CPU 64 49 50 enum { 51 VIRT_FLASH, 52 VIRT_MEM, 53 VIRT_CPUPERIPHS, 54 VIRT_GIC_DIST, 55 VIRT_GIC_CPU, 56 VIRT_GIC_V2M, 57 VIRT_GIC_HYP, 58 VIRT_GIC_VCPU, 59 VIRT_GIC_ITS, 60 VIRT_GIC_REDIST, 61 VIRT_SMMU, 62 VIRT_UART, 63 VIRT_MMIO, 64 VIRT_RTC, 65 VIRT_FW_CFG, 66 VIRT_PCIE, 67 VIRT_PCIE_MMIO, 68 VIRT_PCIE_PIO, 69 VIRT_PCIE_ECAM, 70 VIRT_PLATFORM_BUS, 71 VIRT_GPIO, 72 VIRT_SECURE_UART, 73 VIRT_SECURE_MEM, 74 VIRT_SECURE_GPIO, 75 VIRT_PCDIMM_ACPI, 76 VIRT_ACPI_GED, 77 VIRT_NVDIMM_ACPI, 78 VIRT_PVTIME, 79 VIRT_LOWMEMMAP_LAST, 80 }; 81 82 /* indices of IO regions located after the RAM */ 83 enum { 84 VIRT_HIGH_GIC_REDIST2 = VIRT_LOWMEMMAP_LAST, 85 VIRT_HIGH_PCIE_ECAM, 86 VIRT_HIGH_PCIE_MMIO, 87 }; 88 89 typedef enum VirtIOMMUType { 90 VIRT_IOMMU_NONE, 91 VIRT_IOMMU_SMMUV3, 92 VIRT_IOMMU_VIRTIO, 93 } VirtIOMMUType; 94 95 typedef enum VirtMSIControllerType { 96 VIRT_MSI_CTRL_NONE, 97 VIRT_MSI_CTRL_GICV2M, 98 VIRT_MSI_CTRL_ITS, 99 } VirtMSIControllerType; 100 101 typedef enum VirtGICType { 102 VIRT_GIC_VERSION_MAX = 0, 103 VIRT_GIC_VERSION_HOST = 1, 104 /* The concrete GIC values have to match the GIC version number */ 105 VIRT_GIC_VERSION_2 = 2, 106 VIRT_GIC_VERSION_3 = 3, 107 VIRT_GIC_VERSION_4 = 4, 108 VIRT_GIC_VERSION_NOSEL, 109 } VirtGICType; 110 111 #define VIRT_GIC_VERSION_2_MASK BIT(VIRT_GIC_VERSION_2) 112 #define VIRT_GIC_VERSION_3_MASK BIT(VIRT_GIC_VERSION_3) 113 #define VIRT_GIC_VERSION_4_MASK BIT(VIRT_GIC_VERSION_4) 114 115 struct VirtMachineClass { 116 MachineClass parent; 117 bool disallow_affinity_adjustment; 118 bool no_its; 119 bool no_tcg_its; 120 bool no_pmu; 121 bool claim_edge_triggered_timers; 122 bool smbios_old_sys_ver; 123 bool no_highmem_compact; 124 bool no_highmem_ecam; 125 bool no_ged; /* Machines < 4.2 have no support for ACPI GED device */ 126 bool kvm_no_adjvtime; 127 bool no_kvm_steal_time; 128 bool acpi_expose_flash; 129 bool no_secure_gpio; 130 /* Machines < 6.2 have no support for describing cpu topology to guest */ 131 bool no_cpu_topology; 132 bool no_tcg_lpa2; 133 }; 134 135 struct VirtMachineState { 136 MachineState parent; 137 Notifier machine_done; 138 DeviceState *platform_bus_dev; 139 FWCfgState *fw_cfg; 140 PFlashCFI01 *flash[2]; 141 bool secure; 142 bool highmem; 143 bool highmem_compact; 144 bool highmem_ecam; 145 bool highmem_mmio; 146 bool highmem_redists; 147 bool its; 148 bool tcg_its; 149 bool virt; 150 bool ras; 151 bool mte; 152 bool dtb_randomness; 153 OnOffAuto acpi; 154 VirtGICType gic_version; 155 VirtIOMMUType iommu; 156 bool default_bus_bypass_iommu; 157 VirtMSIControllerType msi_controller; 158 uint16_t virtio_iommu_bdf; 159 struct arm_boot_info bootinfo; 160 MemMapEntry *memmap; 161 char *pciehb_nodename; 162 const int *irqmap; 163 int fdt_size; 164 uint32_t clock_phandle; 165 uint32_t gic_phandle; 166 uint32_t msi_phandle; 167 uint32_t iommu_phandle; 168 int psci_conduit; 169 hwaddr highest_gpa; 170 DeviceState *gic; 171 DeviceState *acpi_dev; 172 Notifier powerdown_notifier; 173 PCIBus *bus; 174 char *oem_id; 175 char *oem_table_id; 176 }; 177 178 #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) 179 180 #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt") 181 OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClass, VIRT_MACHINE) 182 183 void virt_acpi_setup(VirtMachineState *vms); 184 bool virt_is_acpi_enabled(VirtMachineState *vms); 185 186 /* Return number of redistributors that fit in the specified region */ 187 static uint32_t virt_redist_capacity(VirtMachineState *vms, int region) 188 { 189 uint32_t redist_size; 190 191 if (vms->gic_version == VIRT_GIC_VERSION_3) { 192 redist_size = GICV3_REDIST_SIZE; 193 } else { 194 redist_size = GICV4_REDIST_SIZE; 195 } 196 return vms->memmap[region].size / redist_size; 197 } 198 199 /* Return the number of used redistributor regions */ 200 static inline int virt_gicv3_redist_region_count(VirtMachineState *vms) 201 { 202 uint32_t redist0_capacity = virt_redist_capacity(vms, VIRT_GIC_REDIST); 203 204 assert(vms->gic_version != VIRT_GIC_VERSION_2); 205 206 return (MACHINE(vms)->smp.cpus > redist0_capacity && 207 vms->highmem_redists) ? 2 : 1; 208 } 209 210 #endif /* QEMU_ARM_VIRT_H */ 211