1 /* 2 * 3 * Copyright (c) 2015 Linaro Limited 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2 or later, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 * 17 * Emulate a virtual board which works by passing Linux all the information 18 * it needs about what devices are present via the device tree. 19 * There are some restrictions about what we can do here: 20 * + we can only present devices whose Linux drivers will work based 21 * purely on the device tree with no platform data at all 22 * + we want to present a very stripped-down minimalist platform, 23 * both because this reduces the security attack surface from the guest 24 * and also because it reduces our exposure to being broken when 25 * the kernel updates its device tree bindings and requires further 26 * information in a device binding that we aren't providing. 27 * This is essentially the same approach kvmtool uses. 28 */ 29 30 #ifndef QEMU_ARM_VIRT_H 31 #define QEMU_ARM_VIRT_H 32 33 #include "qemu-common.h" 34 #include "exec/hwaddr.h" 35 #include "qemu/notify.h" 36 #include "hw/boards.h" 37 #include "hw/arm/arm.h" 38 39 #define NUM_GICV2M_SPIS 64 40 #define NUM_VIRTIO_TRANSPORTS 32 41 #define NUM_SMMU_IRQS 4 42 43 #define ARCH_GICV3_MAINT_IRQ 9 44 45 #define ARCH_TIMER_VIRT_IRQ 11 46 #define ARCH_TIMER_S_EL1_IRQ 13 47 #define ARCH_TIMER_NS_EL1_IRQ 14 48 #define ARCH_TIMER_NS_EL2_IRQ 10 49 50 #define VIRTUAL_PMU_IRQ 7 51 52 #define PPI(irq) ((irq) + 16) 53 54 enum { 55 VIRT_FLASH, 56 VIRT_MEM, 57 VIRT_CPUPERIPHS, 58 VIRT_GIC_DIST, 59 VIRT_GIC_CPU, 60 VIRT_GIC_V2M, 61 VIRT_GIC_ITS, 62 VIRT_GIC_REDIST, 63 VIRT_SMMU, 64 VIRT_UART, 65 VIRT_MMIO, 66 VIRT_RTC, 67 VIRT_FW_CFG, 68 VIRT_PCIE, 69 VIRT_PCIE_MMIO, 70 VIRT_PCIE_PIO, 71 VIRT_PCIE_ECAM, 72 VIRT_PLATFORM_BUS, 73 VIRT_PCIE_MMIO_HIGH, 74 VIRT_GPIO, 75 VIRT_SECURE_UART, 76 VIRT_SECURE_MEM, 77 }; 78 79 typedef enum VirtIOMMUType { 80 VIRT_IOMMU_NONE, 81 VIRT_IOMMU_SMMUV3, 82 VIRT_IOMMU_VIRTIO, 83 } VirtIOMMUType; 84 85 typedef struct MemMapEntry { 86 hwaddr base; 87 hwaddr size; 88 } MemMapEntry; 89 90 typedef struct { 91 MachineClass parent; 92 bool disallow_affinity_adjustment; 93 bool no_its; 94 bool no_pmu; 95 bool claim_edge_triggered_timers; 96 bool smbios_old_sys_ver; 97 } VirtMachineClass; 98 99 typedef struct { 100 MachineState parent; 101 Notifier machine_done; 102 DeviceState *platform_bus_dev; 103 FWCfgState *fw_cfg; 104 bool secure; 105 bool highmem; 106 bool its; 107 bool virt; 108 int32_t gic_version; 109 VirtIOMMUType iommu; 110 struct arm_boot_info bootinfo; 111 const MemMapEntry *memmap; 112 const int *irqmap; 113 int smp_cpus; 114 void *fdt; 115 int fdt_size; 116 uint32_t clock_phandle; 117 uint32_t gic_phandle; 118 uint32_t msi_phandle; 119 uint32_t iommu_phandle; 120 int psci_conduit; 121 } VirtMachineState; 122 123 #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt") 124 #define VIRT_MACHINE(obj) \ 125 OBJECT_CHECK(VirtMachineState, (obj), TYPE_VIRT_MACHINE) 126 #define VIRT_MACHINE_GET_CLASS(obj) \ 127 OBJECT_GET_CLASS(VirtMachineClass, obj, TYPE_VIRT_MACHINE) 128 #define VIRT_MACHINE_CLASS(klass) \ 129 OBJECT_CLASS_CHECK(VirtMachineClass, klass, TYPE_VIRT_MACHINE) 130 131 void virt_acpi_setup(VirtMachineState *vms); 132 133 #endif /* QEMU_ARM_VIRT_H */ 134