1 /* 2 * 3 * Copyright (c) 2015 Linaro Limited 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2 or later, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 * 17 * Emulate a virtual board which works by passing Linux all the information 18 * it needs about what devices are present via the device tree. 19 * There are some restrictions about what we can do here: 20 * + we can only present devices whose Linux drivers will work based 21 * purely on the device tree with no platform data at all 22 * + we want to present a very stripped-down minimalist platform, 23 * both because this reduces the security attack surface from the guest 24 * and also because it reduces our exposure to being broken when 25 * the kernel updates its device tree bindings and requires further 26 * information in a device binding that we aren't providing. 27 * This is essentially the same approach kvmtool uses. 28 */ 29 30 #ifndef QEMU_ARM_VIRT_H 31 #define QEMU_ARM_VIRT_H 32 33 #include "exec/hwaddr.h" 34 #include "qemu/notify.h" 35 #include "hw/boards.h" 36 #include "hw/arm/boot.h" 37 #include "hw/block/flash.h" 38 #include "sysemu/kvm.h" 39 #include "hw/intc/arm_gicv3_common.h" 40 #include "qom/object.h" 41 42 #define NUM_GICV2M_SPIS 64 43 #define NUM_VIRTIO_TRANSPORTS 32 44 #define NUM_SMMU_IRQS 4 45 46 #define ARCH_GIC_MAINT_IRQ 9 47 48 #define ARCH_TIMER_VIRT_IRQ 11 49 #define ARCH_TIMER_S_EL1_IRQ 13 50 #define ARCH_TIMER_NS_EL1_IRQ 14 51 #define ARCH_TIMER_NS_EL2_IRQ 10 52 53 #define VIRTUAL_PMU_IRQ 7 54 55 #define PPI(irq) ((irq) + 16) 56 57 enum { 58 VIRT_FLASH, 59 VIRT_MEM, 60 VIRT_CPUPERIPHS, 61 VIRT_GIC_DIST, 62 VIRT_GIC_CPU, 63 VIRT_GIC_V2M, 64 VIRT_GIC_HYP, 65 VIRT_GIC_VCPU, 66 VIRT_GIC_ITS, 67 VIRT_GIC_REDIST, 68 VIRT_SMMU, 69 VIRT_UART, 70 VIRT_MMIO, 71 VIRT_RTC, 72 VIRT_FW_CFG, 73 VIRT_PCIE, 74 VIRT_PCIE_MMIO, 75 VIRT_PCIE_PIO, 76 VIRT_PCIE_ECAM, 77 VIRT_PLATFORM_BUS, 78 VIRT_GPIO, 79 VIRT_SECURE_UART, 80 VIRT_SECURE_MEM, 81 VIRT_PCDIMM_ACPI, 82 VIRT_ACPI_GED, 83 VIRT_NVDIMM_ACPI, 84 VIRT_LOWMEMMAP_LAST, 85 }; 86 87 /* indices of IO regions located after the RAM */ 88 enum { 89 VIRT_HIGH_GIC_REDIST2 = VIRT_LOWMEMMAP_LAST, 90 VIRT_HIGH_PCIE_ECAM, 91 VIRT_HIGH_PCIE_MMIO, 92 }; 93 94 typedef enum VirtIOMMUType { 95 VIRT_IOMMU_NONE, 96 VIRT_IOMMU_SMMUV3, 97 VIRT_IOMMU_VIRTIO, 98 } VirtIOMMUType; 99 100 typedef enum VirtMSIControllerType { 101 VIRT_MSI_CTRL_NONE, 102 VIRT_MSI_CTRL_GICV2M, 103 VIRT_MSI_CTRL_ITS, 104 } VirtMSIControllerType; 105 106 typedef enum VirtGICType { 107 VIRT_GIC_VERSION_MAX, 108 VIRT_GIC_VERSION_HOST, 109 VIRT_GIC_VERSION_2, 110 VIRT_GIC_VERSION_3, 111 VIRT_GIC_VERSION_NOSEL, 112 } VirtGICType; 113 114 struct VirtMachineClass { 115 MachineClass parent; 116 bool disallow_affinity_adjustment; 117 bool no_its; 118 bool no_pmu; 119 bool claim_edge_triggered_timers; 120 bool smbios_old_sys_ver; 121 bool no_highmem_ecam; 122 bool no_ged; /* Machines < 4.2 has no support for ACPI GED device */ 123 bool kvm_no_adjvtime; 124 bool acpi_expose_flash; 125 }; 126 127 struct VirtMachineState { 128 MachineState parent; 129 Notifier machine_done; 130 DeviceState *platform_bus_dev; 131 FWCfgState *fw_cfg; 132 PFlashCFI01 *flash[2]; 133 bool secure; 134 bool highmem; 135 bool highmem_ecam; 136 bool its; 137 bool virt; 138 bool ras; 139 bool mte; 140 OnOffAuto acpi; 141 VirtGICType gic_version; 142 VirtIOMMUType iommu; 143 VirtMSIControllerType msi_controller; 144 uint16_t virtio_iommu_bdf; 145 struct arm_boot_info bootinfo; 146 MemMapEntry *memmap; 147 char *pciehb_nodename; 148 const int *irqmap; 149 int smp_cpus; 150 void *fdt; 151 int fdt_size; 152 uint32_t clock_phandle; 153 uint32_t gic_phandle; 154 uint32_t msi_phandle; 155 uint32_t iommu_phandle; 156 int psci_conduit; 157 hwaddr highest_gpa; 158 DeviceState *gic; 159 DeviceState *acpi_dev; 160 Notifier powerdown_notifier; 161 }; 162 163 #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) 164 165 #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt") 166 OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClass, VIRT_MACHINE) 167 168 void virt_acpi_setup(VirtMachineState *vms); 169 bool virt_is_acpi_enabled(VirtMachineState *vms); 170 171 /* Return the number of used redistributor regions */ 172 static inline int virt_gicv3_redist_region_count(VirtMachineState *vms) 173 { 174 uint32_t redist0_capacity = 175 vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE; 176 177 assert(vms->gic_version == VIRT_GIC_VERSION_3); 178 179 return vms->smp_cpus > redist0_capacity ? 2 : 1; 180 } 181 182 #endif /* QEMU_ARM_VIRT_H */ 183