xref: /openbmc/qemu/include/hw/arm/virt.h (revision 5a28fa5ba17254d0398a854657b47af3096bd86a)
1 /*
2  *
3  * Copyright (c) 2015 Linaro Limited
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2 or later, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program.  If not, see <http://www.gnu.org/licenses/>.
16  *
17  * Emulate a virtual board which works by passing Linux all the information
18  * it needs about what devices are present via the device tree.
19  * There are some restrictions about what we can do here:
20  *  + we can only present devices whose Linux drivers will work based
21  *    purely on the device tree with no platform data at all
22  *  + we want to present a very stripped-down minimalist platform,
23  *    both because this reduces the security attack surface from the guest
24  *    and also because it reduces our exposure to being broken when
25  *    the kernel updates its device tree bindings and requires further
26  *    information in a device binding that we aren't providing.
27  * This is essentially the same approach kvmtool uses.
28  */
29 
30 #ifndef QEMU_ARM_VIRT_H
31 #define QEMU_ARM_VIRT_H
32 
33 #include "exec/hwaddr.h"
34 #include "qemu/notify.h"
35 #include "hw/boards.h"
36 #include "hw/arm/boot.h"
37 #include "hw/arm/bsa.h"
38 #include "hw/block/flash.h"
39 #include "hw/cxl/cxl.h"
40 #include "system/kvm.h"
41 #include "hw/intc/arm_gicv3_common.h"
42 #include "qom/object.h"
43 
44 #define NUM_GICV2M_SPIS       64
45 #define NUM_VIRTIO_TRANSPORTS 32
46 #define NUM_SMMU_IRQS          4
47 
48 /* See Linux kernel arch/arm64/include/asm/pvclock-abi.h */
49 #define PVTIME_SIZE_PER_CPU 64
50 
51 /* GPIO pins */
52 #define GPIO_PIN_POWER_BUTTON  3
53 
54 enum {
55     VIRT_FLASH,
56     VIRT_MEM,
57     VIRT_CPUPERIPHS,
58     VIRT_GIC_DIST,
59     VIRT_GIC_CPU,
60     VIRT_GIC_V2M,
61     VIRT_GIC_HYP,
62     VIRT_GIC_VCPU,
63     VIRT_GIC_ITS,
64     VIRT_GIC_REDIST,
65     VIRT_SMMU,
66     VIRT_UART0,
67     VIRT_MMIO,
68     VIRT_RTC,
69     VIRT_FW_CFG,
70     VIRT_PCIE,
71     VIRT_PCIE_MMIO,
72     VIRT_PCIE_PIO,
73     VIRT_PCIE_ECAM,
74     VIRT_PLATFORM_BUS,
75     VIRT_GPIO,
76     VIRT_UART1,
77     VIRT_SECURE_MEM,
78     VIRT_SECURE_GPIO,
79     VIRT_PCDIMM_ACPI,
80     VIRT_ACPI_GED,
81     VIRT_NVDIMM_ACPI,
82     VIRT_PVTIME,
83     VIRT_LOWMEMMAP_LAST,
84 };
85 
86 /* indices of IO regions located after the RAM */
87 enum {
88     VIRT_HIGH_GIC_REDIST2 =  VIRT_LOWMEMMAP_LAST,
89     VIRT_CXL_HOST,
90     VIRT_HIGH_PCIE_ECAM,
91     VIRT_HIGH_PCIE_MMIO,
92 };
93 
94 typedef enum VirtIOMMUType {
95     VIRT_IOMMU_NONE,
96     VIRT_IOMMU_SMMUV3,
97     VIRT_IOMMU_VIRTIO,
98 } VirtIOMMUType;
99 
100 typedef enum VirtMSIControllerType {
101     VIRT_MSI_CTRL_NONE,
102     VIRT_MSI_CTRL_GICV2M,
103     VIRT_MSI_CTRL_ITS,
104 } VirtMSIControllerType;
105 
106 typedef enum VirtGICType {
107     VIRT_GIC_VERSION_MAX = 0,
108     VIRT_GIC_VERSION_HOST = 1,
109     /* The concrete GIC values have to match the GIC version number */
110     VIRT_GIC_VERSION_2 = 2,
111     VIRT_GIC_VERSION_3 = 3,
112     VIRT_GIC_VERSION_4 = 4,
113     VIRT_GIC_VERSION_NOSEL,
114 } VirtGICType;
115 
116 #define VIRT_GIC_VERSION_2_MASK BIT(VIRT_GIC_VERSION_2)
117 #define VIRT_GIC_VERSION_3_MASK BIT(VIRT_GIC_VERSION_3)
118 #define VIRT_GIC_VERSION_4_MASK BIT(VIRT_GIC_VERSION_4)
119 
120 struct VirtMachineClass {
121     MachineClass parent;
122     bool no_tcg_its;
123     bool no_highmem_compact;
124     bool no_ged;   /* Machines < 4.2 have no support for ACPI GED device */
125     bool kvm_no_adjvtime;
126     bool no_kvm_steal_time;
127     bool acpi_expose_flash;
128     bool no_secure_gpio;
129     /* Machines < 6.2 have no support for describing cpu topology to guest */
130     bool no_cpu_topology;
131     bool no_tcg_lpa2;
132     bool no_ns_el2_virt_timer_irq;
133     bool no_nested_smmu;
134 };
135 
136 struct VirtMachineState {
137     MachineState parent;
138     Notifier machine_done;
139     DeviceState *platform_bus_dev;
140     FWCfgState *fw_cfg;
141     PFlashCFI01 *flash[2];
142     bool secure;
143     bool highmem;
144     bool highmem_compact;
145     bool highmem_cxl;
146     bool highmem_ecam;
147     bool highmem_mmio;
148     bool highmem_redists;
149     bool its;
150     bool tcg_its;
151     bool virt;
152     bool ras;
153     bool mte;
154     bool dtb_randomness;
155     bool second_ns_uart_present;
156     OnOffAuto acpi;
157     VirtGICType gic_version;
158     VirtIOMMUType iommu;
159     bool default_bus_bypass_iommu;
160     VirtMSIControllerType msi_controller;
161     uint16_t virtio_iommu_bdf;
162     struct arm_boot_info bootinfo;
163     MemMapEntry *memmap;
164     char *pciehb_nodename;
165     const int *irqmap;
166     int fdt_size;
167     uint32_t clock_phandle;
168     uint32_t gic_phandle;
169     uint32_t msi_phandle;
170     uint32_t iommu_phandle;
171     int psci_conduit;
172     hwaddr highest_gpa;
173     DeviceState *gic;
174     DeviceState *acpi_dev;
175     Notifier powerdown_notifier;
176     PCIBus *bus;
177     char *oem_id;
178     char *oem_table_id;
179     bool ns_el2_virt_timer_irq;
180     CXLState cxl_devices_state;
181 };
182 
183 #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
184 
185 #define TYPE_VIRT_MACHINE   MACHINE_TYPE_NAME("virt")
186 OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClass, VIRT_MACHINE)
187 
188 void virt_acpi_setup(VirtMachineState *vms);
189 bool virt_is_acpi_enabled(VirtMachineState *vms);
190 
191 /* Return number of redistributors that fit in the specified region */
192 static uint32_t virt_redist_capacity(VirtMachineState *vms, int region)
193 {
194     uint32_t redist_size;
195 
196     if (vms->gic_version == VIRT_GIC_VERSION_3) {
197         redist_size = GICV3_REDIST_SIZE;
198     } else {
199         redist_size = GICV4_REDIST_SIZE;
200     }
201     return vms->memmap[region].size / redist_size;
202 }
203 
204 /* Return the number of used redistributor regions  */
205 static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)
206 {
207     uint32_t redist0_capacity = virt_redist_capacity(vms, VIRT_GIC_REDIST);
208 
209     assert(vms->gic_version != VIRT_GIC_VERSION_2);
210 
211     return (MACHINE(vms)->smp.cpus > redist0_capacity &&
212             vms->highmem_redists) ? 2 : 1;
213 }
214 
215 #endif /* QEMU_ARM_VIRT_H */
216