xref: /openbmc/qemu/include/hw/arm/virt.h (revision 49d755d0)
1 /*
2  *
3  * Copyright (c) 2015 Linaro Limited
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2 or later, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program.  If not, see <http://www.gnu.org/licenses/>.
16  *
17  * Emulate a virtual board which works by passing Linux all the information
18  * it needs about what devices are present via the device tree.
19  * There are some restrictions about what we can do here:
20  *  + we can only present devices whose Linux drivers will work based
21  *    purely on the device tree with no platform data at all
22  *  + we want to present a very stripped-down minimalist platform,
23  *    both because this reduces the security attack surface from the guest
24  *    and also because it reduces our exposure to being broken when
25  *    the kernel updates its device tree bindings and requires further
26  *    information in a device binding that we aren't providing.
27  * This is essentially the same approach kvmtool uses.
28  */
29 
30 #ifndef QEMU_ARM_VIRT_H
31 #define QEMU_ARM_VIRT_H
32 
33 #include "qemu-common.h"
34 #include "exec/hwaddr.h"
35 #include "qemu/notify.h"
36 #include "hw/boards.h"
37 #include "hw/arm/boot.h"
38 #include "hw/block/flash.h"
39 #include "sysemu/kvm.h"
40 #include "hw/intc/arm_gicv3_common.h"
41 
42 #define NUM_GICV2M_SPIS       64
43 #define NUM_VIRTIO_TRANSPORTS 32
44 #define NUM_SMMU_IRQS          4
45 
46 #define ARCH_GIC_MAINT_IRQ  9
47 
48 #define ARCH_TIMER_VIRT_IRQ   11
49 #define ARCH_TIMER_S_EL1_IRQ  13
50 #define ARCH_TIMER_NS_EL1_IRQ 14
51 #define ARCH_TIMER_NS_EL2_IRQ 10
52 
53 #define VIRTUAL_PMU_IRQ 7
54 
55 #define PPI(irq) ((irq) + 16)
56 
57 enum {
58     VIRT_FLASH,
59     VIRT_MEM,
60     VIRT_CPUPERIPHS,
61     VIRT_GIC_DIST,
62     VIRT_GIC_CPU,
63     VIRT_GIC_V2M,
64     VIRT_GIC_HYP,
65     VIRT_GIC_VCPU,
66     VIRT_GIC_ITS,
67     VIRT_GIC_REDIST,
68     VIRT_SMMU,
69     VIRT_UART,
70     VIRT_MMIO,
71     VIRT_RTC,
72     VIRT_FW_CFG,
73     VIRT_PCIE,
74     VIRT_PCIE_MMIO,
75     VIRT_PCIE_PIO,
76     VIRT_PCIE_ECAM,
77     VIRT_PLATFORM_BUS,
78     VIRT_GPIO,
79     VIRT_SECURE_UART,
80     VIRT_SECURE_MEM,
81     VIRT_LOWMEMMAP_LAST,
82 };
83 
84 /* indices of IO regions located after the RAM */
85 enum {
86     VIRT_HIGH_GIC_REDIST2 =  VIRT_LOWMEMMAP_LAST,
87     VIRT_HIGH_PCIE_ECAM,
88     VIRT_HIGH_PCIE_MMIO,
89 };
90 
91 typedef enum VirtIOMMUType {
92     VIRT_IOMMU_NONE,
93     VIRT_IOMMU_SMMUV3,
94     VIRT_IOMMU_VIRTIO,
95 } VirtIOMMUType;
96 
97 typedef struct MemMapEntry {
98     hwaddr base;
99     hwaddr size;
100 } MemMapEntry;
101 
102 typedef struct {
103     MachineClass parent;
104     bool disallow_affinity_adjustment;
105     bool no_its;
106     bool no_pmu;
107     bool claim_edge_triggered_timers;
108     bool smbios_old_sys_ver;
109     bool no_highmem_ecam;
110 } VirtMachineClass;
111 
112 typedef struct {
113     MachineState parent;
114     Notifier machine_done;
115     DeviceState *platform_bus_dev;
116     FWCfgState *fw_cfg;
117     PFlashCFI01 *flash[2];
118     bool secure;
119     bool highmem;
120     bool highmem_ecam;
121     bool its;
122     bool virt;
123     int32_t gic_version;
124     VirtIOMMUType iommu;
125     struct arm_boot_info bootinfo;
126     MemMapEntry *memmap;
127     const int *irqmap;
128     int smp_cpus;
129     void *fdt;
130     int fdt_size;
131     uint32_t clock_phandle;
132     uint32_t gic_phandle;
133     uint32_t msi_phandle;
134     uint32_t iommu_phandle;
135     int psci_conduit;
136     hwaddr highest_gpa;
137 } VirtMachineState;
138 
139 #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
140 
141 #define TYPE_VIRT_MACHINE   MACHINE_TYPE_NAME("virt")
142 #define VIRT_MACHINE(obj) \
143     OBJECT_CHECK(VirtMachineState, (obj), TYPE_VIRT_MACHINE)
144 #define VIRT_MACHINE_GET_CLASS(obj) \
145     OBJECT_GET_CLASS(VirtMachineClass, obj, TYPE_VIRT_MACHINE)
146 #define VIRT_MACHINE_CLASS(klass) \
147     OBJECT_CLASS_CHECK(VirtMachineClass, klass, TYPE_VIRT_MACHINE)
148 
149 void virt_acpi_setup(VirtMachineState *vms);
150 
151 /* Return the number of used redistributor regions  */
152 static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)
153 {
154     uint32_t redist0_capacity =
155                 vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;
156 
157     assert(vms->gic_version == 3);
158 
159     return vms->smp_cpus > redist0_capacity ? 2 : 1;
160 }
161 
162 #endif /* QEMU_ARM_VIRT_H */
163