1 /* 2 * 3 * Copyright (c) 2015 Linaro Limited 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2 or later, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 * 17 * Emulate a virtual board which works by passing Linux all the information 18 * it needs about what devices are present via the device tree. 19 * There are some restrictions about what we can do here: 20 * + we can only present devices whose Linux drivers will work based 21 * purely on the device tree with no platform data at all 22 * + we want to present a very stripped-down minimalist platform, 23 * both because this reduces the security attack surface from the guest 24 * and also because it reduces our exposure to being broken when 25 * the kernel updates its device tree bindings and requires further 26 * information in a device binding that we aren't providing. 27 * This is essentially the same approach kvmtool uses. 28 */ 29 30 #ifndef QEMU_ARM_VIRT_H 31 #define QEMU_ARM_VIRT_H 32 33 #include "qemu-common.h" 34 #include "exec/hwaddr.h" 35 #include "qemu/notify.h" 36 #include "hw/boards.h" 37 #include "hw/arm/arm.h" 38 #include "sysemu/kvm.h" 39 #include "hw/intc/arm_gicv3_common.h" 40 41 #define NUM_GICV2M_SPIS 64 42 #define NUM_VIRTIO_TRANSPORTS 32 43 #define NUM_SMMU_IRQS 4 44 45 #define ARCH_GICV3_MAINT_IRQ 9 46 47 #define ARCH_TIMER_VIRT_IRQ 11 48 #define ARCH_TIMER_S_EL1_IRQ 13 49 #define ARCH_TIMER_NS_EL1_IRQ 14 50 #define ARCH_TIMER_NS_EL2_IRQ 10 51 52 #define VIRTUAL_PMU_IRQ 7 53 54 #define PPI(irq) ((irq) + 16) 55 56 enum { 57 VIRT_FLASH, 58 VIRT_MEM, 59 VIRT_CPUPERIPHS, 60 VIRT_GIC_DIST, 61 VIRT_GIC_CPU, 62 VIRT_GIC_V2M, 63 VIRT_GIC_ITS, 64 VIRT_GIC_REDIST, 65 VIRT_GIC_REDIST2, 66 VIRT_SMMU, 67 VIRT_UART, 68 VIRT_MMIO, 69 VIRT_RTC, 70 VIRT_FW_CFG, 71 VIRT_PCIE, 72 VIRT_PCIE_MMIO, 73 VIRT_PCIE_PIO, 74 VIRT_PCIE_ECAM, 75 VIRT_PCIE_ECAM_HIGH, 76 VIRT_PLATFORM_BUS, 77 VIRT_PCIE_MMIO_HIGH, 78 VIRT_GPIO, 79 VIRT_SECURE_UART, 80 VIRT_SECURE_MEM, 81 }; 82 83 typedef enum VirtIOMMUType { 84 VIRT_IOMMU_NONE, 85 VIRT_IOMMU_SMMUV3, 86 VIRT_IOMMU_VIRTIO, 87 } VirtIOMMUType; 88 89 typedef struct MemMapEntry { 90 hwaddr base; 91 hwaddr size; 92 } MemMapEntry; 93 94 typedef struct { 95 MachineClass parent; 96 bool disallow_affinity_adjustment; 97 bool no_its; 98 bool no_pmu; 99 bool claim_edge_triggered_timers; 100 bool smbios_old_sys_ver; 101 bool no_highmem_ecam; 102 } VirtMachineClass; 103 104 typedef struct { 105 MachineState parent; 106 Notifier machine_done; 107 DeviceState *platform_bus_dev; 108 FWCfgState *fw_cfg; 109 bool secure; 110 bool highmem; 111 bool highmem_ecam; 112 bool its; 113 bool virt; 114 int32_t gic_version; 115 VirtIOMMUType iommu; 116 struct arm_boot_info bootinfo; 117 const MemMapEntry *memmap; 118 const int *irqmap; 119 int smp_cpus; 120 void *fdt; 121 int fdt_size; 122 uint32_t clock_phandle; 123 uint32_t gic_phandle; 124 uint32_t msi_phandle; 125 uint32_t iommu_phandle; 126 int psci_conduit; 127 } VirtMachineState; 128 129 #define VIRT_ECAM_ID(high) (high ? VIRT_PCIE_ECAM_HIGH : VIRT_PCIE_ECAM) 130 131 #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt") 132 #define VIRT_MACHINE(obj) \ 133 OBJECT_CHECK(VirtMachineState, (obj), TYPE_VIRT_MACHINE) 134 #define VIRT_MACHINE_GET_CLASS(obj) \ 135 OBJECT_GET_CLASS(VirtMachineClass, obj, TYPE_VIRT_MACHINE) 136 #define VIRT_MACHINE_CLASS(klass) \ 137 OBJECT_CLASS_CHECK(VirtMachineClass, klass, TYPE_VIRT_MACHINE) 138 139 void virt_acpi_setup(VirtMachineState *vms); 140 141 /* Return the number of used redistributor regions */ 142 static inline int virt_gicv3_redist_region_count(VirtMachineState *vms) 143 { 144 uint32_t redist0_capacity = 145 vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE; 146 147 assert(vms->gic_version == 3); 148 149 return vms->smp_cpus > redist0_capacity ? 2 : 1; 150 } 151 152 #endif /* QEMU_ARM_VIRT_H */ 153