1 /* 2 * 3 * Copyright (c) 2015 Linaro Limited 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2 or later, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 * 17 * Emulate a virtual board which works by passing Linux all the information 18 * it needs about what devices are present via the device tree. 19 * There are some restrictions about what we can do here: 20 * + we can only present devices whose Linux drivers will work based 21 * purely on the device tree with no platform data at all 22 * + we want to present a very stripped-down minimalist platform, 23 * both because this reduces the security attack surface from the guest 24 * and also because it reduces our exposure to being broken when 25 * the kernel updates its device tree bindings and requires further 26 * information in a device binding that we aren't providing. 27 * This is essentially the same approach kvmtool uses. 28 */ 29 30 #ifndef QEMU_ARM_VIRT_H 31 #define QEMU_ARM_VIRT_H 32 33 #include "exec/hwaddr.h" 34 #include "qemu/notify.h" 35 #include "hw/boards.h" 36 #include "hw/arm/boot.h" 37 #include "hw/block/flash.h" 38 #include "sysemu/kvm.h" 39 #include "hw/intc/arm_gicv3_common.h" 40 41 #define NUM_GICV2M_SPIS 64 42 #define NUM_VIRTIO_TRANSPORTS 32 43 #define NUM_SMMU_IRQS 4 44 45 #define ARCH_GIC_MAINT_IRQ 9 46 47 #define ARCH_TIMER_VIRT_IRQ 11 48 #define ARCH_TIMER_S_EL1_IRQ 13 49 #define ARCH_TIMER_NS_EL1_IRQ 14 50 #define ARCH_TIMER_NS_EL2_IRQ 10 51 52 #define VIRTUAL_PMU_IRQ 7 53 54 #define PPI(irq) ((irq) + 16) 55 56 enum { 57 VIRT_FLASH, 58 VIRT_MEM, 59 VIRT_CPUPERIPHS, 60 VIRT_GIC_DIST, 61 VIRT_GIC_CPU, 62 VIRT_GIC_V2M, 63 VIRT_GIC_HYP, 64 VIRT_GIC_VCPU, 65 VIRT_GIC_ITS, 66 VIRT_GIC_REDIST, 67 VIRT_SMMU, 68 VIRT_UART, 69 VIRT_MMIO, 70 VIRT_RTC, 71 VIRT_FW_CFG, 72 VIRT_PCIE, 73 VIRT_PCIE_MMIO, 74 VIRT_PCIE_PIO, 75 VIRT_PCIE_ECAM, 76 VIRT_PLATFORM_BUS, 77 VIRT_GPIO, 78 VIRT_SECURE_UART, 79 VIRT_SECURE_MEM, 80 VIRT_PCDIMM_ACPI, 81 VIRT_ACPI_GED, 82 VIRT_NVDIMM_ACPI, 83 VIRT_LOWMEMMAP_LAST, 84 }; 85 86 /* indices of IO regions located after the RAM */ 87 enum { 88 VIRT_HIGH_GIC_REDIST2 = VIRT_LOWMEMMAP_LAST, 89 VIRT_HIGH_PCIE_ECAM, 90 VIRT_HIGH_PCIE_MMIO, 91 }; 92 93 typedef enum VirtIOMMUType { 94 VIRT_IOMMU_NONE, 95 VIRT_IOMMU_SMMUV3, 96 VIRT_IOMMU_VIRTIO, 97 } VirtIOMMUType; 98 99 typedef enum VirtMSIControllerType { 100 VIRT_MSI_CTRL_NONE, 101 VIRT_MSI_CTRL_GICV2M, 102 VIRT_MSI_CTRL_ITS, 103 } VirtMSIControllerType; 104 105 typedef enum VirtGICType { 106 VIRT_GIC_VERSION_MAX, 107 VIRT_GIC_VERSION_HOST, 108 VIRT_GIC_VERSION_2, 109 VIRT_GIC_VERSION_3, 110 VIRT_GIC_VERSION_NOSEL, 111 } VirtGICType; 112 113 typedef struct MemMapEntry { 114 hwaddr base; 115 hwaddr size; 116 } MemMapEntry; 117 118 typedef struct { 119 MachineClass parent; 120 bool disallow_affinity_adjustment; 121 bool no_its; 122 bool no_pmu; 123 bool claim_edge_triggered_timers; 124 bool smbios_old_sys_ver; 125 bool no_highmem_ecam; 126 bool no_ged; /* Machines < 4.2 has no support for ACPI GED device */ 127 bool kvm_no_adjvtime; 128 bool acpi_expose_flash; 129 } VirtMachineClass; 130 131 typedef struct { 132 MachineState parent; 133 Notifier machine_done; 134 DeviceState *platform_bus_dev; 135 FWCfgState *fw_cfg; 136 PFlashCFI01 *flash[2]; 137 bool secure; 138 bool highmem; 139 bool highmem_ecam; 140 bool its; 141 bool virt; 142 bool ras; 143 bool mte; 144 OnOffAuto acpi; 145 VirtGICType gic_version; 146 VirtIOMMUType iommu; 147 VirtMSIControllerType msi_controller; 148 uint16_t virtio_iommu_bdf; 149 struct arm_boot_info bootinfo; 150 MemMapEntry *memmap; 151 char *pciehb_nodename; 152 const int *irqmap; 153 int smp_cpus; 154 void *fdt; 155 int fdt_size; 156 uint32_t clock_phandle; 157 uint32_t gic_phandle; 158 uint32_t msi_phandle; 159 uint32_t iommu_phandle; 160 int psci_conduit; 161 hwaddr highest_gpa; 162 DeviceState *gic; 163 DeviceState *acpi_dev; 164 Notifier powerdown_notifier; 165 } VirtMachineState; 166 167 #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) 168 169 #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt") 170 #define VIRT_MACHINE(obj) \ 171 OBJECT_CHECK(VirtMachineState, (obj), TYPE_VIRT_MACHINE) 172 #define VIRT_MACHINE_GET_CLASS(obj) \ 173 OBJECT_GET_CLASS(VirtMachineClass, obj, TYPE_VIRT_MACHINE) 174 #define VIRT_MACHINE_CLASS(klass) \ 175 OBJECT_CLASS_CHECK(VirtMachineClass, klass, TYPE_VIRT_MACHINE) 176 177 void virt_acpi_setup(VirtMachineState *vms); 178 bool virt_is_acpi_enabled(VirtMachineState *vms); 179 180 /* Return the number of used redistributor regions */ 181 static inline int virt_gicv3_redist_region_count(VirtMachineState *vms) 182 { 183 uint32_t redist0_capacity = 184 vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE; 185 186 assert(vms->gic_version == VIRT_GIC_VERSION_3); 187 188 return vms->smp_cpus > redist0_capacity ? 2 : 1; 189 } 190 191 #endif /* QEMU_ARM_VIRT_H */ 192