1 /* 2 * 3 * Copyright (c) 2015 Linaro Limited 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2 or later, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program. If not, see <http://www.gnu.org/licenses/>. 16 * 17 * Emulate a virtual board which works by passing Linux all the information 18 * it needs about what devices are present via the device tree. 19 * There are some restrictions about what we can do here: 20 * + we can only present devices whose Linux drivers will work based 21 * purely on the device tree with no platform data at all 22 * + we want to present a very stripped-down minimalist platform, 23 * both because this reduces the security attack surface from the guest 24 * and also because it reduces our exposure to being broken when 25 * the kernel updates its device tree bindings and requires further 26 * information in a device binding that we aren't providing. 27 * This is essentially the same approach kvmtool uses. 28 */ 29 30 #ifndef QEMU_ARM_VIRT_H 31 #define QEMU_ARM_VIRT_H 32 33 #include "exec/hwaddr.h" 34 #include "qemu/notify.h" 35 #include "hw/boards.h" 36 #include "hw/arm/boot.h" 37 #include "hw/arm/bsa.h" 38 #include "hw/block/flash.h" 39 #include "hw/cxl/cxl.h" 40 #include "system/kvm.h" 41 #include "hw/intc/arm_gicv3_common.h" 42 #include "qom/object.h" 43 44 #define NUM_GICV2M_SPIS 64 45 #define NUM_VIRTIO_TRANSPORTS 32 46 #define NUM_SMMU_IRQS 4 47 48 /* See Linux kernel arch/arm64/include/asm/pvclock-abi.h */ 49 #define PVTIME_SIZE_PER_CPU 64 50 51 /* GPIO pins */ 52 #define GPIO_PIN_POWER_BUTTON 3 53 54 enum { 55 VIRT_FLASH, 56 VIRT_MEM, 57 VIRT_CPUPERIPHS, 58 VIRT_GIC_DIST, 59 VIRT_GIC_CPU, 60 VIRT_GIC_V2M, 61 VIRT_GIC_HYP, 62 VIRT_GIC_VCPU, 63 VIRT_GIC_ITS, 64 VIRT_GIC_REDIST, 65 VIRT_SMMU, 66 VIRT_UART0, 67 VIRT_MMIO, 68 VIRT_RTC, 69 VIRT_FW_CFG, 70 VIRT_PCIE, 71 VIRT_PCIE_MMIO, 72 VIRT_PCIE_PIO, 73 VIRT_PCIE_ECAM, 74 VIRT_PLATFORM_BUS, 75 VIRT_GPIO, 76 VIRT_UART1, 77 VIRT_SECURE_MEM, 78 VIRT_SECURE_GPIO, 79 VIRT_PCDIMM_ACPI, 80 VIRT_ACPI_GED, 81 VIRT_NVDIMM_ACPI, 82 VIRT_PVTIME, 83 VIRT_ACPI_PCIHP, 84 VIRT_LOWMEMMAP_LAST, 85 }; 86 87 /* indices of IO regions located after the RAM */ 88 enum { 89 VIRT_HIGH_GIC_REDIST2 = VIRT_LOWMEMMAP_LAST, 90 VIRT_CXL_HOST, 91 VIRT_HIGH_PCIE_ECAM, 92 VIRT_HIGH_PCIE_MMIO, 93 }; 94 95 typedef enum VirtIOMMUType { 96 VIRT_IOMMU_NONE, 97 VIRT_IOMMU_SMMUV3, 98 VIRT_IOMMU_VIRTIO, 99 } VirtIOMMUType; 100 101 typedef enum VirtMSIControllerType { 102 VIRT_MSI_CTRL_NONE, 103 VIRT_MSI_CTRL_GICV2M, 104 VIRT_MSI_CTRL_ITS, 105 } VirtMSIControllerType; 106 107 typedef enum VirtGICType { 108 VIRT_GIC_VERSION_MAX = 0, 109 VIRT_GIC_VERSION_HOST = 1, 110 /* The concrete GIC values have to match the GIC version number */ 111 VIRT_GIC_VERSION_2 = 2, 112 VIRT_GIC_VERSION_3 = 3, 113 VIRT_GIC_VERSION_4 = 4, 114 VIRT_GIC_VERSION_NOSEL, 115 } VirtGICType; 116 117 #define VIRT_GIC_VERSION_2_MASK BIT(VIRT_GIC_VERSION_2) 118 #define VIRT_GIC_VERSION_3_MASK BIT(VIRT_GIC_VERSION_3) 119 #define VIRT_GIC_VERSION_4_MASK BIT(VIRT_GIC_VERSION_4) 120 121 struct VirtMachineClass { 122 MachineClass parent; 123 bool no_tcg_its; 124 bool no_highmem_compact; 125 bool no_ged; /* Machines < 4.2 have no support for ACPI GED device */ 126 bool kvm_no_adjvtime; 127 bool no_kvm_steal_time; 128 bool acpi_expose_flash; 129 bool no_secure_gpio; 130 /* Machines < 6.2 have no support for describing cpu topology to guest */ 131 bool no_cpu_topology; 132 bool no_tcg_lpa2; 133 bool no_ns_el2_virt_timer_irq; 134 bool no_nested_smmu; 135 }; 136 137 struct VirtMachineState { 138 MachineState parent; 139 Notifier machine_done; 140 DeviceState *platform_bus_dev; 141 FWCfgState *fw_cfg; 142 PFlashCFI01 *flash[2]; 143 bool secure; 144 bool highmem; 145 bool highmem_compact; 146 bool highmem_cxl; 147 bool highmem_ecam; 148 bool highmem_mmio; 149 bool highmem_redists; 150 bool its; 151 bool tcg_its; 152 bool virt; 153 bool ras; 154 bool mte; 155 bool dtb_randomness; 156 bool second_ns_uart_present; 157 OnOffAuto acpi; 158 VirtGICType gic_version; 159 VirtIOMMUType iommu; 160 bool default_bus_bypass_iommu; 161 VirtMSIControllerType msi_controller; 162 uint16_t virtio_iommu_bdf; 163 struct arm_boot_info bootinfo; 164 MemMapEntry *memmap; 165 char *pciehb_nodename; 166 const int *irqmap; 167 int fdt_size; 168 uint32_t clock_phandle; 169 uint32_t gic_phandle; 170 uint32_t msi_phandle; 171 uint32_t iommu_phandle; 172 int psci_conduit; 173 hwaddr highest_gpa; 174 DeviceState *gic; 175 DeviceState *acpi_dev; 176 Notifier powerdown_notifier; 177 PCIBus *bus; 178 char *oem_id; 179 char *oem_table_id; 180 bool ns_el2_virt_timer_irq; 181 CXLState cxl_devices_state; 182 }; 183 184 #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM) 185 186 #define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt") 187 OBJECT_DECLARE_TYPE(VirtMachineState, VirtMachineClass, VIRT_MACHINE) 188 189 void virt_acpi_setup(VirtMachineState *vms); 190 bool virt_is_acpi_enabled(VirtMachineState *vms); 191 192 /* Return number of redistributors that fit in the specified region */ 193 static uint32_t virt_redist_capacity(VirtMachineState *vms, int region) 194 { 195 uint32_t redist_size; 196 197 if (vms->gic_version == VIRT_GIC_VERSION_3) { 198 redist_size = GICV3_REDIST_SIZE; 199 } else { 200 redist_size = GICV4_REDIST_SIZE; 201 } 202 return vms->memmap[region].size / redist_size; 203 } 204 205 /* Return the number of used redistributor regions */ 206 static inline int virt_gicv3_redist_region_count(VirtMachineState *vms) 207 { 208 uint32_t redist0_capacity = virt_redist_capacity(vms, VIRT_GIC_REDIST); 209 210 assert(vms->gic_version != VIRT_GIC_VERSION_2); 211 212 return (MACHINE(vms)->smp.cpus > redist0_capacity && 213 vms->highmem_redists) ? 2 : 1; 214 } 215 216 #endif /* QEMU_ARM_VIRT_H */ 217