1 /* 2 * i.MX 8M Plus SoC Definitions 3 * 4 * Copyright (c) 2024, Bernhard Beschow <shentey@gmail.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0-or-later 7 */ 8 9 #ifndef FSL_IMX8MP_H 10 #define FSL_IMX8MP_H 11 12 #include "cpu.h" 13 #include "hw/char/imx_serial.h" 14 #include "hw/intc/arm_gicv3_common.h" 15 #include "hw/misc/imx7_snvs.h" 16 #include "hw/misc/imx8mp_analog.h" 17 #include "hw/misc/imx8mp_ccm.h" 18 #include "hw/sd/sdhci.h" 19 #include "qom/object.h" 20 #include "qemu/units.h" 21 22 #define TYPE_FSL_IMX8MP "fsl-imx8mp" 23 OBJECT_DECLARE_SIMPLE_TYPE(FslImx8mpState, FSL_IMX8MP) 24 25 #define FSL_IMX8MP_RAM_START 0x40000000 26 #define FSL_IMX8MP_RAM_SIZE_MAX (8 * GiB) 27 28 enum FslImx8mpConfiguration { 29 FSL_IMX8MP_NUM_CPUS = 4, 30 FSL_IMX8MP_NUM_IRQS = 160, 31 FSL_IMX8MP_NUM_UARTS = 4, 32 FSL_IMX8MP_NUM_USDHCS = 3, 33 }; 34 35 struct FslImx8mpState { 36 DeviceState parent_obj; 37 38 ARMCPU cpu[FSL_IMX8MP_NUM_CPUS]; 39 GICv3State gic; 40 IMX8MPCCMState ccm; 41 IMX8MPAnalogState analog; 42 IMX7SNVSState snvs; 43 IMXSerialState uart[FSL_IMX8MP_NUM_UARTS]; 44 SDHCIState usdhc[FSL_IMX8MP_NUM_USDHCS]; 45 }; 46 47 enum FslImx8mpMemoryRegions { 48 FSL_IMX8MP_A53_DAP, 49 FSL_IMX8MP_AIPS1_CONFIGURATION, 50 FSL_IMX8MP_AIPS2_CONFIGURATION, 51 FSL_IMX8MP_AIPS3_CONFIGURATION, 52 FSL_IMX8MP_AIPS4_CONFIGURATION, 53 FSL_IMX8MP_AIPS5_CONFIGURATION, 54 FSL_IMX8MP_ANA_OSC, 55 FSL_IMX8MP_ANA_PLL, 56 FSL_IMX8MP_ANA_TSENSOR, 57 FSL_IMX8MP_APBH_DMA, 58 FSL_IMX8MP_ASRC, 59 FSL_IMX8MP_AUDIO_BLK_CTRL, 60 FSL_IMX8MP_AUDIO_DSP, 61 FSL_IMX8MP_AUDIO_XCVR_RX, 62 FSL_IMX8MP_AUD_IRQ_STEER, 63 FSL_IMX8MP_BOOT_ROM, 64 FSL_IMX8MP_BOOT_ROM_PROTECTED, 65 FSL_IMX8MP_CAAM, 66 FSL_IMX8MP_CAAM_MEM, 67 FSL_IMX8MP_CCM, 68 FSL_IMX8MP_CSU, 69 FSL_IMX8MP_DDR_BLK_CTRL, 70 FSL_IMX8MP_DDR_CTL, 71 FSL_IMX8MP_DDR_PERF_MON, 72 FSL_IMX8MP_DDR_PHY, 73 FSL_IMX8MP_DDR_PHY_BROADCAST, 74 FSL_IMX8MP_ECSPI1, 75 FSL_IMX8MP_ECSPI2, 76 FSL_IMX8MP_ECSPI3, 77 FSL_IMX8MP_EDMA_CHANNELS, 78 FSL_IMX8MP_EDMA_MANAGEMENT_PAGE, 79 FSL_IMX8MP_ENET1, 80 FSL_IMX8MP_ENET2_TSN, 81 FSL_IMX8MP_FLEXCAN1, 82 FSL_IMX8MP_FLEXCAN2, 83 FSL_IMX8MP_GIC_DIST, 84 FSL_IMX8MP_GIC_REDIST, 85 FSL_IMX8MP_GPC, 86 FSL_IMX8MP_GPIO1, 87 FSL_IMX8MP_GPIO2, 88 FSL_IMX8MP_GPIO3, 89 FSL_IMX8MP_GPIO4, 90 FSL_IMX8MP_GPIO5, 91 FSL_IMX8MP_GPT1, 92 FSL_IMX8MP_GPT2, 93 FSL_IMX8MP_GPT3, 94 FSL_IMX8MP_GPT4, 95 FSL_IMX8MP_GPT5, 96 FSL_IMX8MP_GPT6, 97 FSL_IMX8MP_GPU2D, 98 FSL_IMX8MP_GPU3D, 99 FSL_IMX8MP_HDMI_TX, 100 FSL_IMX8MP_HDMI_TX_AUDLNK_MSTR, 101 FSL_IMX8MP_HSIO_BLK_CTL, 102 FSL_IMX8MP_I2C1, 103 FSL_IMX8MP_I2C2, 104 FSL_IMX8MP_I2C3, 105 FSL_IMX8MP_I2C4, 106 FSL_IMX8MP_I2C5, 107 FSL_IMX8MP_I2C6, 108 FSL_IMX8MP_INTERCONNECT, 109 FSL_IMX8MP_IOMUXC, 110 FSL_IMX8MP_IOMUXC_GPR, 111 FSL_IMX8MP_IPS_DEWARP, 112 FSL_IMX8MP_ISI, 113 FSL_IMX8MP_ISP1, 114 FSL_IMX8MP_ISP2, 115 FSL_IMX8MP_LCDIF1, 116 FSL_IMX8MP_LCDIF2, 117 FSL_IMX8MP_MEDIA_BLK_CTL, 118 FSL_IMX8MP_MIPI_CSI1, 119 FSL_IMX8MP_MIPI_CSI2, 120 FSL_IMX8MP_MIPI_DSI1, 121 FSL_IMX8MP_MU_1_A, 122 FSL_IMX8MP_MU_1_B, 123 FSL_IMX8MP_MU_2_A, 124 FSL_IMX8MP_MU_2_B, 125 FSL_IMX8MP_MU_3_A, 126 FSL_IMX8MP_MU_3_B, 127 FSL_IMX8MP_NPU, 128 FSL_IMX8MP_OCOTP_CTRL, 129 FSL_IMX8MP_OCRAM, 130 FSL_IMX8MP_OCRAM_S, 131 FSL_IMX8MP_PCIE1, 132 FSL_IMX8MP_PCIE1_MEM, 133 FSL_IMX8MP_PCIE_PHY1, 134 FSL_IMX8MP_PDM, 135 FSL_IMX8MP_PERFMON1, 136 FSL_IMX8MP_PERFMON2, 137 FSL_IMX8MP_PWM1, 138 FSL_IMX8MP_PWM2, 139 FSL_IMX8MP_PWM3, 140 FSL_IMX8MP_PWM4, 141 FSL_IMX8MP_QOSC, 142 FSL_IMX8MP_QSPI, 143 FSL_IMX8MP_QSPI1_RX_BUFFER, 144 FSL_IMX8MP_QSPI1_TX_BUFFER, 145 FSL_IMX8MP_QSPI_MEM, 146 FSL_IMX8MP_RAM, 147 FSL_IMX8MP_RDC, 148 FSL_IMX8MP_SAI1, 149 FSL_IMX8MP_SAI2, 150 FSL_IMX8MP_SAI3, 151 FSL_IMX8MP_SAI5, 152 FSL_IMX8MP_SAI6, 153 FSL_IMX8MP_SAI7, 154 FSL_IMX8MP_SDMA1, 155 FSL_IMX8MP_SDMA2, 156 FSL_IMX8MP_SDMA3, 157 FSL_IMX8MP_SEMAPHORE1, 158 FSL_IMX8MP_SEMAPHORE2, 159 FSL_IMX8MP_SEMAPHORE_HS, 160 FSL_IMX8MP_SNVS_HP, 161 FSL_IMX8MP_SPBA1, 162 FSL_IMX8MP_SPBA2, 163 FSL_IMX8MP_SRC, 164 FSL_IMX8MP_SYSCNT_CMP, 165 FSL_IMX8MP_SYSCNT_CTRL, 166 FSL_IMX8MP_SYSCNT_RD, 167 FSL_IMX8MP_TCM_DTCM, 168 FSL_IMX8MP_TCM_ITCM, 169 FSL_IMX8MP_TZASC, 170 FSL_IMX8MP_UART1, 171 FSL_IMX8MP_UART2, 172 FSL_IMX8MP_UART3, 173 FSL_IMX8MP_UART4, 174 FSL_IMX8MP_USB1, 175 FSL_IMX8MP_USB2, 176 FSL_IMX8MP_USDHC1, 177 FSL_IMX8MP_USDHC2, 178 FSL_IMX8MP_USDHC3, 179 FSL_IMX8MP_VPU, 180 FSL_IMX8MP_VPU_BLK_CTRL, 181 FSL_IMX8MP_VPU_G1_DECODER, 182 FSL_IMX8MP_VPU_G2_DECODER, 183 FSL_IMX8MP_VPU_VC8000E_ENCODER, 184 FSL_IMX8MP_WDOG1, 185 FSL_IMX8MP_WDOG2, 186 FSL_IMX8MP_WDOG3, 187 }; 188 189 enum FslImx8mpIrqs { 190 FSL_IMX8MP_USDHC1_IRQ = 22, 191 FSL_IMX8MP_USDHC2_IRQ = 23, 192 FSL_IMX8MP_USDHC3_IRQ = 24, 193 194 FSL_IMX8MP_UART1_IRQ = 26, 195 FSL_IMX8MP_UART2_IRQ = 27, 196 FSL_IMX8MP_UART3_IRQ = 28, 197 FSL_IMX8MP_UART4_IRQ = 29, 198 FSL_IMX8MP_UART5_IRQ = 30, 199 FSL_IMX8MP_UART6_IRQ = 16, 200 }; 201 202 #endif /* FSL_IMX8MP_H */ 203