1*dcf1d8cdSSergey Kambalin /*
2*dcf1d8cdSSergey Kambalin  * BCM2838 peripherals emulation
3*dcf1d8cdSSergey Kambalin  *
4*dcf1d8cdSSergey Kambalin  * Copyright (C) 2022 Ovchinnikov Vitalii <vitalii.ovchinnikov@auriga.com>
5*dcf1d8cdSSergey Kambalin  *
6*dcf1d8cdSSergey Kambalin  * SPDX-License-Identifier: GPL-2.0-or-later
7*dcf1d8cdSSergey Kambalin  */
8*dcf1d8cdSSergey Kambalin 
9*dcf1d8cdSSergey Kambalin #ifndef BCM2838_PERIPHERALS_H
10*dcf1d8cdSSergey Kambalin #define BCM2838_PERIPHERALS_H
11*dcf1d8cdSSergey Kambalin 
12*dcf1d8cdSSergey Kambalin #include "hw/arm/bcm2835_peripherals.h"
13*dcf1d8cdSSergey Kambalin 
14*dcf1d8cdSSergey Kambalin 
15*dcf1d8cdSSergey Kambalin #define TYPE_BCM2838_PERIPHERALS "bcm2838-peripherals"
16*dcf1d8cdSSergey Kambalin OBJECT_DECLARE_TYPE(BCM2838PeripheralState, BCM2838PeripheralClass,
17*dcf1d8cdSSergey Kambalin                     BCM2838_PERIPHERALS)
18*dcf1d8cdSSergey Kambalin 
19*dcf1d8cdSSergey Kambalin struct BCM2838PeripheralState {
20*dcf1d8cdSSergey Kambalin     /*< private >*/
21*dcf1d8cdSSergey Kambalin     BCMSocPeripheralBaseState parent_obj;
22*dcf1d8cdSSergey Kambalin 
23*dcf1d8cdSSergey Kambalin     /*< public >*/
24*dcf1d8cdSSergey Kambalin     MemoryRegion peri_low_mr;
25*dcf1d8cdSSergey Kambalin     MemoryRegion peri_low_mr_alias;
26*dcf1d8cdSSergey Kambalin     MemoryRegion mphi_mr_alias;
27*dcf1d8cdSSergey Kambalin };
28*dcf1d8cdSSergey Kambalin 
29*dcf1d8cdSSergey Kambalin struct BCM2838PeripheralClass {
30*dcf1d8cdSSergey Kambalin     /*< private >*/
31*dcf1d8cdSSergey Kambalin     BCMSocPeripheralBaseClass parent_class;
32*dcf1d8cdSSergey Kambalin     /*< public >*/
33*dcf1d8cdSSergey Kambalin     uint64_t peri_low_size; /* Peripheral lower range size */
34*dcf1d8cdSSergey Kambalin };
35*dcf1d8cdSSergey Kambalin 
36*dcf1d8cdSSergey Kambalin #endif /* BCM2838_PERIPHERALS_H */
37