1 /* 2 * ASPEED SoC family 3 * 4 * Andrew Jeffery <andrew@aj.id.au> 5 * 6 * Copyright 2016 IBM Corp. 7 * 8 * This code is licensed under the GPL version 2 or later. See 9 * the COPYING file in the top-level directory. 10 */ 11 12 #ifndef ASPEED_SOC_H 13 #define ASPEED_SOC_H 14 15 #include "hw/arm/arm.h" 16 #include "hw/intc/aspeed_vic.h" 17 #include "hw/misc/aspeed_scu.h" 18 #include "hw/misc/aspeed_sdmc.h" 19 #include "hw/timer/aspeed_timer.h" 20 #include "hw/i2c/aspeed_i2c.h" 21 #include "hw/ssi/aspeed_smc.h" 22 23 #define ASPEED_SPIS_NUM 2 24 25 typedef struct AspeedSoCState { 26 /*< private >*/ 27 DeviceState parent; 28 29 /*< public >*/ 30 ARMCPU *cpu; 31 MemoryRegion iomem; 32 AspeedVICState vic; 33 AspeedTimerCtrlState timerctrl; 34 AspeedI2CState i2c; 35 AspeedSCUState scu; 36 AspeedSMCState fmc; 37 AspeedSMCState spi[ASPEED_SPIS_NUM]; 38 AspeedSDMCState sdmc; 39 } AspeedSoCState; 40 41 #define TYPE_ASPEED_SOC "aspeed-soc" 42 #define ASPEED_SOC(obj) OBJECT_CHECK(AspeedSoCState, (obj), TYPE_ASPEED_SOC) 43 44 typedef struct AspeedSoCInfo { 45 const char *name; 46 const char *cpu_model; 47 uint32_t silicon_rev; 48 hwaddr sdram_base; 49 int spis_num; 50 const hwaddr *spi_bases; 51 const char *fmc_typename; 52 const char **spi_typename; 53 } AspeedSoCInfo; 54 55 typedef struct AspeedSoCClass { 56 DeviceClass parent_class; 57 AspeedSoCInfo *info; 58 } AspeedSoCClass; 59 60 #define ASPEED_SOC_CLASS(klass) \ 61 OBJECT_CLASS_CHECK(AspeedSoCClass, (klass), TYPE_ASPEED_SOC) 62 #define ASPEED_SOC_GET_CLASS(obj) \ 63 OBJECT_GET_CLASS(AspeedSoCClass, (obj), TYPE_ASPEED_SOC) 64 65 #endif /* ASPEED_SOC_H */ 66