xref: /openbmc/qemu/include/hw/arm/allwinner-r40.h (revision 43eef24f52def75df9d491788db90e11098b1f7b)
1 /*
2  * Allwinner R40/A40i/T3 System on Chip emulation
3  *
4  * Copyright (C) 2023 qianfan Zhao <qianfanguijin@163.com>
5  *
6  * This program is free software: you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation, either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #ifndef HW_ARM_ALLWINNER_R40_H
21 #define HW_ARM_ALLWINNER_R40_H
22 
23 #include "qom/object.h"
24 #include "hw/timer/allwinner-a10-pit.h"
25 #include "hw/intc/arm_gic.h"
26 #include "hw/sd/allwinner-sdhost.h"
27 #include "hw/misc/allwinner-r40-ccu.h"
28 #include "hw/misc/allwinner-r40-dramc.h"
29 #include "hw/misc/allwinner-sramc.h"
30 #include "hw/i2c/allwinner-i2c.h"
31 #include "hw/net/allwinner_emac.h"
32 #include "hw/net/allwinner-sun8i-emac.h"
33 #include "hw/usb/hcd-ohci.h"
34 #include "hw/usb/hcd-ehci.h"
35 #include "target/arm/cpu.h"
36 #include "sysemu/block-backend.h"
37 
38 enum {
39     AW_R40_DEV_SRAM_A1,
40     AW_R40_DEV_SRAM_A2,
41     AW_R40_DEV_SRAM_A3,
42     AW_R40_DEV_SRAM_A4,
43     AW_R40_DEV_SRAMC,
44     AW_R40_DEV_EMAC,
45     AW_R40_DEV_MMC0,
46     AW_R40_DEV_MMC1,
47     AW_R40_DEV_MMC2,
48     AW_R40_DEV_MMC3,
49     AW_R40_DEV_EHCI1,
50     AW_R40_DEV_OHCI1,
51     AW_R40_DEV_EHCI2,
52     AW_R40_DEV_OHCI2,
53     AW_R40_DEV_CCU,
54     AW_R40_DEV_PIT,
55     AW_R40_DEV_UART0,
56     AW_R40_DEV_UART1,
57     AW_R40_DEV_UART2,
58     AW_R40_DEV_UART3,
59     AW_R40_DEV_UART4,
60     AW_R40_DEV_UART5,
61     AW_R40_DEV_UART6,
62     AW_R40_DEV_UART7,
63     AW_R40_DEV_TWI0,
64     AW_R40_DEV_GMAC,
65     AW_R40_DEV_GIC_DIST,
66     AW_R40_DEV_GIC_CPU,
67     AW_R40_DEV_GIC_HYP,
68     AW_R40_DEV_GIC_VCPU,
69     AW_R40_DEV_SDRAM,
70     AW_R40_DEV_DRAMCOM,
71     AW_R40_DEV_DRAMCTL,
72     AW_R40_DEV_DRAMPHY,
73 };
74 
75 #define AW_R40_NUM_CPUS      (4)
76 
77 /**
78  * Allwinner R40 object model
79  * @{
80  */
81 
82 /** Object type for the Allwinner R40 SoC */
83 #define TYPE_AW_R40 "allwinner-r40"
84 
85 /** Convert input object to Allwinner R40 state object */
86 OBJECT_DECLARE_SIMPLE_TYPE(AwR40State, AW_R40)
87 
88 /** @} */
89 
90 /**
91  * Allwinner R40 object
92  *
93  * This struct contains the state of all the devices
94  * which are currently emulated by the R40 SoC code.
95  */
96 #define AW_R40_NUM_MMCS         4
97 #define AW_R40_NUM_USB          2
98 #define AW_R40_NUM_UARTS        8
99 
100 struct AwR40State {
101     /*< private >*/
102     DeviceState parent_obj;
103     /*< public >*/
104 
105     /** Physical base address for start of RAM */
106     hwaddr ram_addr;
107 
108     /** Total RAM size in megabytes */
109     uint32_t ram_size;
110 
111     ARMCPU cpus[AW_R40_NUM_CPUS];
112     const hwaddr *memmap;
113     AwSRAMCState sramc;
114     AwA10PITState timer;
115     AwSdHostState mmc[AW_R40_NUM_MMCS];
116     EHCISysBusState ehci[AW_R40_NUM_USB];
117     OHCISysBusState ohci[AW_R40_NUM_USB];
118     AwR40ClockCtlState ccu;
119     AwR40DramCtlState dramc;
120     AWI2CState i2c0;
121     AwEmacState emac;
122     AwSun8iEmacState gmac;
123     GICState gic;
124     MemoryRegion sram_a1;
125     MemoryRegion sram_a2;
126     MemoryRegion sram_a3;
127     MemoryRegion sram_a4;
128 };
129 
130 /**
131  * Emulate Boot ROM firmware setup functionality.
132  *
133  * A real Allwinner R40 SoC contains a Boot ROM
134  * which is the first code that runs right after
135  * the SoC is powered on. The Boot ROM is responsible
136  * for loading user code (e.g. a bootloader) from any
137  * of the supported external devices and writing the
138  * downloaded code to internal SRAM. After loading the SoC
139  * begins executing the code written to SRAM.
140  *
141  * This function emulates the Boot ROM by copying 32 KiB
142  * of data from the given block device and writes it to
143  * the start of the first internal SRAM memory.
144  *
145  * @s: Allwinner R40 state object pointer
146  * @blk: Block backend device object pointer
147  * @unit: the mmc control's unit
148  */
149 bool allwinner_r40_bootrom_setup(AwR40State *s, BlockBackend *blk, int unit);
150 
151 #endif /* HW_ARM_ALLWINNER_R40_H */
152