1 /* 2 * Allwinner H3 System on Chip emulation 3 * 4 * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com> 5 * 6 * This program is free software: you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation, either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 /* 21 * The Allwinner H3 is a System on Chip containing four ARM Cortex A7 22 * processor cores. Features and specifications include DDR2/DDR3 memory, 23 * SD/MMC storage cards, 10/100/1000Mbit Ethernet, USB 2.0, HDMI and 24 * various I/O modules. 25 * 26 * This implementation is based on the following datasheet: 27 * 28 * https://linux-sunxi.org/File:Allwinner_H3_Datasheet_V1.2.pdf 29 * 30 * The latest datasheet and more info can be found on the Linux Sunxi wiki: 31 * 32 * https://linux-sunxi.org/H3 33 */ 34 35 #ifndef HW_ARM_ALLWINNER_H3_H 36 #define HW_ARM_ALLWINNER_H3_H 37 38 #include "qom/object.h" 39 #include "hw/arm/boot.h" 40 #include "hw/timer/allwinner-a10-pit.h" 41 #include "hw/intc/arm_gic.h" 42 #include "hw/misc/allwinner-h3-ccu.h" 43 #include "hw/misc/allwinner-cpucfg.h" 44 #include "hw/misc/allwinner-h3-sysctrl.h" 45 #include "hw/misc/allwinner-sid.h" 46 #include "hw/sd/allwinner-sdhost.h" 47 #include "hw/net/allwinner-sun8i-emac.h" 48 #include "target/arm/cpu.h" 49 50 /** 51 * Allwinner H3 device list 52 * 53 * This enumeration is can be used refer to a particular device in the 54 * Allwinner H3 SoC. For example, the physical memory base address for 55 * each device can be found in the AwH3State object in the memmap member 56 * using the device enum value as index. 57 * 58 * @see AwH3State 59 */ 60 enum { 61 AW_H3_SRAM_A1, 62 AW_H3_SRAM_A2, 63 AW_H3_SRAM_C, 64 AW_H3_SYSCTRL, 65 AW_H3_MMC0, 66 AW_H3_SID, 67 AW_H3_EHCI0, 68 AW_H3_OHCI0, 69 AW_H3_EHCI1, 70 AW_H3_OHCI1, 71 AW_H3_EHCI2, 72 AW_H3_OHCI2, 73 AW_H3_EHCI3, 74 AW_H3_OHCI3, 75 AW_H3_CCU, 76 AW_H3_PIT, 77 AW_H3_UART0, 78 AW_H3_UART1, 79 AW_H3_UART2, 80 AW_H3_UART3, 81 AW_H3_EMAC, 82 AW_H3_GIC_DIST, 83 AW_H3_GIC_CPU, 84 AW_H3_GIC_HYP, 85 AW_H3_GIC_VCPU, 86 AW_H3_CPUCFG, 87 AW_H3_SDRAM 88 }; 89 90 /** Total number of CPU cores in the H3 SoC */ 91 #define AW_H3_NUM_CPUS (4) 92 93 /** 94 * Allwinner H3 object model 95 * @{ 96 */ 97 98 /** Object type for the Allwinner H3 SoC */ 99 #define TYPE_AW_H3 "allwinner-h3" 100 101 /** Convert input object to Allwinner H3 state object */ 102 #define AW_H3(obj) OBJECT_CHECK(AwH3State, (obj), TYPE_AW_H3) 103 104 /** @} */ 105 106 /** 107 * Allwinner H3 object 108 * 109 * This struct contains the state of all the devices 110 * which are currently emulated by the H3 SoC code. 111 */ 112 typedef struct AwH3State { 113 /*< private >*/ 114 DeviceState parent_obj; 115 /*< public >*/ 116 117 ARMCPU cpus[AW_H3_NUM_CPUS]; 118 const hwaddr *memmap; 119 AwA10PITState timer; 120 AwH3ClockCtlState ccu; 121 AwCpuCfgState cpucfg; 122 AwH3SysCtrlState sysctrl; 123 AwSidState sid; 124 AwSdHostState mmc0; 125 AwSun8iEmacState emac; 126 GICState gic; 127 MemoryRegion sram_a1; 128 MemoryRegion sram_a2; 129 MemoryRegion sram_c; 130 } AwH3State; 131 132 #endif /* HW_ARM_ALLWINNER_H3_H */ 133