xref: /openbmc/qemu/include/hw/arm/allwinner-a10.h (revision ed5abf46)
1 #ifndef HW_ARM_ALLWINNER_A10_H
2 #define HW_ARM_ALLWINNER_A10_H
3 
4 #include "qemu/error-report.h"
5 #include "hw/char/serial.h"
6 #include "hw/arm/boot.h"
7 #include "hw/timer/allwinner-a10-pit.h"
8 #include "hw/intc/allwinner-a10-pic.h"
9 #include "hw/net/allwinner_emac.h"
10 #include "hw/sd/allwinner-sdhost.h"
11 #include "hw/ide/ahci.h"
12 #include "hw/usb/hcd-ohci.h"
13 #include "hw/usb/hcd-ehci.h"
14 #include "hw/rtc/allwinner-rtc.h"
15 
16 #include "target/arm/cpu.h"
17 
18 
19 #define AW_A10_SDRAM_BASE       0x40000000
20 
21 #define AW_A10_NUM_USB          2
22 
23 #define TYPE_AW_A10 "allwinner-a10"
24 #define AW_A10(obj) OBJECT_CHECK(AwA10State, (obj), TYPE_AW_A10)
25 
26 typedef struct AwA10State {
27     /*< private >*/
28     DeviceState parent_obj;
29     /*< public >*/
30 
31     ARMCPU cpu;
32     AwA10PITState timer;
33     AwA10PICState intc;
34     AwEmacState emac;
35     AllwinnerAHCIState sata;
36     AwSdHostState mmc0;
37     AwRtcState rtc;
38     MemoryRegion sram_a;
39     EHCISysBusState ehci[AW_A10_NUM_USB];
40     OHCISysBusState ohci[AW_A10_NUM_USB];
41 } AwA10State;
42 
43 #endif
44