xref: /openbmc/qemu/include/hw/arm/allwinner-a10.h (revision 6e2e2e8a)
1 #ifndef HW_ARM_ALLWINNER_A10_H
2 #define HW_ARM_ALLWINNER_A10_H
3 
4 #include "qemu/error-report.h"
5 #include "hw/char/serial.h"
6 #include "hw/arm/boot.h"
7 #include "hw/timer/allwinner-a10-pit.h"
8 #include "hw/intc/allwinner-a10-pic.h"
9 #include "hw/net/allwinner_emac.h"
10 #include "hw/sd/allwinner-sdhost.h"
11 #include "hw/ide/ahci.h"
12 #include "hw/usb/hcd-ohci.h"
13 #include "hw/usb/hcd-ehci.h"
14 #include "hw/rtc/allwinner-rtc.h"
15 
16 #include "target/arm/cpu.h"
17 #include "qom/object.h"
18 
19 
20 #define AW_A10_SDRAM_BASE       0x40000000
21 
22 #define AW_A10_NUM_USB          2
23 
24 #define TYPE_AW_A10 "allwinner-a10"
25 OBJECT_DECLARE_SIMPLE_TYPE(AwA10State, AW_A10)
26 
27 struct AwA10State {
28     /*< private >*/
29     DeviceState parent_obj;
30     /*< public >*/
31 
32     ARMCPU cpu;
33     AwA10PITState timer;
34     AwA10PICState intc;
35     AwEmacState emac;
36     AllwinnerAHCIState sata;
37     AwSdHostState mmc0;
38     AwRtcState rtc;
39     MemoryRegion sram_a;
40     EHCISysBusState ehci[AW_A10_NUM_USB];
41     OHCISysBusState ohci[AW_A10_NUM_USB];
42 };
43 
44 #endif
45