1 /* 2 * Aspeed ADC 3 * 4 * Copyright 2017-2021 IBM Corp. 5 * 6 * Andrew Jeffery <andrew@aj.id.au> 7 * 8 * SPDX-License-Identifier: GPL-2.0-or-later 9 */ 10 11 #ifndef HW_ADC_ASPEED_ADC_H 12 #define HW_ADC_ASPEED_ADC_H 13 14 #include "hw/sysbus.h" 15 16 #define TYPE_ASPEED_ADC "aspeed.adc" 17 #define TYPE_ASPEED_2400_ADC TYPE_ASPEED_ADC "-ast2400" 18 #define TYPE_ASPEED_2500_ADC TYPE_ASPEED_ADC "-ast2500" 19 #define TYPE_ASPEED_2600_ADC TYPE_ASPEED_ADC "-ast2600" 20 #define TYPE_ASPEED_1030_ADC TYPE_ASPEED_ADC "-ast1030" 21 OBJECT_DECLARE_TYPE(AspeedADCState, AspeedADCClass, ASPEED_ADC) 22 23 #define TYPE_ASPEED_ADC_ENGINE "aspeed.adc.engine" 24 OBJECT_DECLARE_SIMPLE_TYPE(AspeedADCEngineState, ASPEED_ADC_ENGINE) 25 26 #define ASPEED_ADC_NR_CHANNELS 16 27 #define ASPEED_ADC_NR_REGS (0xD0 >> 2) 28 29 struct AspeedADCEngineState { 30 /* <private> */ 31 SysBusDevice parent; 32 33 MemoryRegion mmio; 34 qemu_irq irq; 35 uint32_t engine_id; 36 uint32_t nr_channels; 37 uint32_t regs[ASPEED_ADC_NR_REGS]; 38 }; 39 40 struct AspeedADCState { 41 /* <private> */ 42 SysBusDevice parent; 43 44 MemoryRegion mmio; 45 qemu_irq irq; 46 47 AspeedADCEngineState engines[2]; 48 }; 49 50 struct AspeedADCClass { 51 SysBusDeviceClass parent_class; 52 53 uint32_t nr_engines; 54 }; 55 56 #endif /* HW_ADC_ASPEED_ADC_H */ 57