1711b20b4SStefan Berger /* 2711b20b4SStefan Berger * tpm.h - TPM ACPI definitions 3711b20b4SStefan Berger * 4711b20b4SStefan Berger * Copyright (C) 2014 IBM Corporation 5711b20b4SStefan Berger * 6711b20b4SStefan Berger * Authors: 7711b20b4SStefan Berger * Stefan Berger <stefanb@us.ibm.com> 8711b20b4SStefan Berger * 9711b20b4SStefan Berger * This work is licensed under the terms of the GNU GPL, version 2 or later. 10711b20b4SStefan Berger * See the COPYING file in the top-level directory. 11711b20b4SStefan Berger * 12711b20b4SStefan Berger * Implementation of the TIS interface according to specs found at 13711b20b4SStefan Berger * http://www.trustedcomputinggroup.org 14711b20b4SStefan Berger * 15711b20b4SStefan Berger */ 16711b20b4SStefan Berger #ifndef HW_ACPI_TPM_H 17711b20b4SStefan Berger #define HW_ACPI_TPM_H 18711b20b4SStefan Berger 19*4ab6cb4cSMarc-André Lureau #include "hw/registerfields.h" 20*4ab6cb4cSMarc-André Lureau 21711b20b4SStefan Berger #define TPM_TIS_ADDR_BASE 0xFED40000 22711b20b4SStefan Berger #define TPM_TIS_ADDR_SIZE 0x5000 23711b20b4SStefan Berger 24711b20b4SStefan Berger #define TPM_TIS_IRQ 5 25711b20b4SStefan Berger 26*4ab6cb4cSMarc-André Lureau REG32(CRB_LOC_STATE, 0x00) 27*4ab6cb4cSMarc-André Lureau FIELD(CRB_LOC_STATE, tpmEstablished, 0, 1) 28*4ab6cb4cSMarc-André Lureau FIELD(CRB_LOC_STATE, locAssigned, 1, 1) 29*4ab6cb4cSMarc-André Lureau FIELD(CRB_LOC_STATE, activeLocality, 2, 3) 30*4ab6cb4cSMarc-André Lureau FIELD(CRB_LOC_STATE, reserved, 5, 2) 31*4ab6cb4cSMarc-André Lureau FIELD(CRB_LOC_STATE, tpmRegValidSts, 7, 1) 32*4ab6cb4cSMarc-André Lureau REG32(CRB_LOC_CTRL, 0x08) 33*4ab6cb4cSMarc-André Lureau REG32(CRB_LOC_STS, 0x0C) 34*4ab6cb4cSMarc-André Lureau FIELD(CRB_LOC_STS, Granted, 0, 1) 35*4ab6cb4cSMarc-André Lureau FIELD(CRB_LOC_STS, beenSeized, 1, 1) 36*4ab6cb4cSMarc-André Lureau REG32(CRB_INTF_ID, 0x30) 37*4ab6cb4cSMarc-André Lureau FIELD(CRB_INTF_ID, InterfaceType, 0, 4) 38*4ab6cb4cSMarc-André Lureau FIELD(CRB_INTF_ID, InterfaceVersion, 4, 4) 39*4ab6cb4cSMarc-André Lureau FIELD(CRB_INTF_ID, CapLocality, 8, 1) 40*4ab6cb4cSMarc-André Lureau FIELD(CRB_INTF_ID, CapCRBIdleBypass, 9, 1) 41*4ab6cb4cSMarc-André Lureau FIELD(CRB_INTF_ID, Reserved1, 10, 1) 42*4ab6cb4cSMarc-André Lureau FIELD(CRB_INTF_ID, CapDataXferSizeSupport, 11, 2) 43*4ab6cb4cSMarc-André Lureau FIELD(CRB_INTF_ID, CapFIFO, 13, 1) 44*4ab6cb4cSMarc-André Lureau FIELD(CRB_INTF_ID, CapCRB, 14, 1) 45*4ab6cb4cSMarc-André Lureau FIELD(CRB_INTF_ID, CapIFRes, 15, 2) 46*4ab6cb4cSMarc-André Lureau FIELD(CRB_INTF_ID, InterfaceSelector, 17, 2) 47*4ab6cb4cSMarc-André Lureau FIELD(CRB_INTF_ID, IntfSelLock, 19, 1) 48*4ab6cb4cSMarc-André Lureau FIELD(CRB_INTF_ID, Reserved2, 20, 4) 49*4ab6cb4cSMarc-André Lureau FIELD(CRB_INTF_ID, RID, 24, 8) 50*4ab6cb4cSMarc-André Lureau REG32(CRB_INTF_ID2, 0x34) 51*4ab6cb4cSMarc-André Lureau FIELD(CRB_INTF_ID2, VID, 0, 16) 52*4ab6cb4cSMarc-André Lureau FIELD(CRB_INTF_ID2, DID, 16, 16) 53*4ab6cb4cSMarc-André Lureau REG32(CRB_CTRL_EXT, 0x38) 54*4ab6cb4cSMarc-André Lureau REG32(CRB_CTRL_REQ, 0x40) 55*4ab6cb4cSMarc-André Lureau REG32(CRB_CTRL_STS, 0x44) 56*4ab6cb4cSMarc-André Lureau FIELD(CRB_CTRL_STS, tpmSts, 0, 1) 57*4ab6cb4cSMarc-André Lureau FIELD(CRB_CTRL_STS, tpmIdle, 1, 1) 58*4ab6cb4cSMarc-André Lureau REG32(CRB_CTRL_CANCEL, 0x48) 59*4ab6cb4cSMarc-André Lureau REG32(CRB_CTRL_START, 0x4C) 60*4ab6cb4cSMarc-André Lureau REG32(CRB_INT_ENABLED, 0x50) 61*4ab6cb4cSMarc-André Lureau REG32(CRB_INT_STS, 0x54) 62*4ab6cb4cSMarc-André Lureau REG32(CRB_CTRL_CMD_SIZE, 0x58) 63*4ab6cb4cSMarc-André Lureau REG32(CRB_CTRL_CMD_LADDR, 0x5C) 64*4ab6cb4cSMarc-André Lureau REG32(CRB_CTRL_CMD_HADDR, 0x60) 65*4ab6cb4cSMarc-André Lureau REG32(CRB_CTRL_RSP_SIZE, 0x64) 66*4ab6cb4cSMarc-André Lureau REG32(CRB_CTRL_RSP_ADDR, 0x68) 67*4ab6cb4cSMarc-André Lureau REG32(CRB_DATA_BUFFER, 0x80) 68*4ab6cb4cSMarc-André Lureau 69*4ab6cb4cSMarc-André Lureau #define TPM_CRB_ADDR_BASE 0xFED40000 70*4ab6cb4cSMarc-André Lureau #define TPM_CRB_ADDR_SIZE 0x1000 71*4ab6cb4cSMarc-André Lureau #define TPM_CRB_ADDR_CTRL (TPM_CRB_ADDR_BASE + A_CRB_CTRL_REQ) 72*4ab6cb4cSMarc-André Lureau #define TPM_CRB_R_MAX R_CRB_DATA_BUFFER 73*4ab6cb4cSMarc-André Lureau 74711b20b4SStefan Berger #define TPM_LOG_AREA_MINIMUM_SIZE (64 * 1024) 75711b20b4SStefan Berger 76711b20b4SStefan Berger #define TPM_TCPA_ACPI_CLASS_CLIENT 0 77711b20b4SStefan Berger #define TPM_TCPA_ACPI_CLASS_SERVER 1 78711b20b4SStefan Berger 795cb18b3dSStefan Berger #define TPM2_ACPI_CLASS_CLIENT 0 805cb18b3dSStefan Berger #define TPM2_ACPI_CLASS_SERVER 1 815cb18b3dSStefan Berger 825cb18b3dSStefan Berger #define TPM2_START_METHOD_MMIO 6 83*4ab6cb4cSMarc-André Lureau #define TPM2_START_METHOD_CRB 7 845cb18b3dSStefan Berger 85711b20b4SStefan Berger #endif /* HW_ACPI_TPM_H */ 86