1 /* 2 * QEMU ICH9 TCO emulation (total cost of ownership) 3 * 4 * Copyright (c) 2015 Paulo Alcantara <pcacjr@zytor.com> 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2 or later. 7 * See the COPYING file in the top-level directory. 8 */ 9 10 #ifndef HW_ACPI_TCO_H 11 #define HW_ACPI_TCO_H 12 13 #include "exec/memory.h" 14 #include "migration/vmstate.h" 15 16 /* As per ICH9 spec, the internal timer has an error of ~0.6s on every tick */ 17 #define TCO_TICK_NSEC 600000000LL 18 19 /* TCO I/O register offsets */ 20 enum { 21 TCO_RLD = 0x00, 22 TCO_DAT_IN = 0x02, 23 TCO_DAT_OUT = 0x03, 24 TCO1_STS = 0x04, 25 TCO2_STS = 0x06, 26 TCO1_CNT = 0x08, 27 TCO2_CNT = 0x0a, 28 TCO_MESSAGE1 = 0x0c, 29 TCO_MESSAGE2 = 0x0d, 30 TCO_WDCNT = 0x0e, 31 SW_IRQ_GEN = 0x10, 32 TCO_TMR = 0x12, 33 }; 34 35 /* TCO I/O register control/status bits */ 36 enum { 37 SW_TCO_SMI = 1 << 1, 38 TCO_INT_STS = 1 << 2, 39 TCO_LOCK = 1 << 12, 40 TCO_TMR_HLT = 1 << 11, 41 TCO_TIMEOUT = 1 << 3, 42 TCO_SECOND_TO_STS = 1 << 1, 43 TCO_BOOT_STS = 1 << 2, 44 }; 45 46 /* TCO I/O registers mask bits */ 47 enum { 48 TCO_RLD_MASK = 0x3ff, 49 TCO1_STS_MASK = 0xe870, 50 TCO2_STS_MASK = 0xfff8, 51 TCO1_CNT_MASK = 0xfeff, 52 TCO_TMR_MASK = 0x3ff, 53 }; 54 55 typedef struct TCOIORegs { 56 struct { 57 uint16_t rld; 58 uint8_t din; 59 uint8_t dout; 60 uint16_t sts1; 61 uint16_t sts2; 62 uint16_t cnt1; 63 uint16_t cnt2; 64 uint8_t msg1; 65 uint8_t msg2; 66 uint8_t wdcnt; 67 uint16_t tmr; 68 } tco; 69 uint8_t sw_irq_gen; 70 71 QEMUTimer *tco_timer; 72 int64_t expire_time; 73 uint8_t timeouts_no; 74 75 MemoryRegion io; 76 } TCOIORegs; 77 78 /* tco.c */ 79 void acpi_pm_tco_init(TCOIORegs *tr, MemoryRegion *parent); 80 81 extern const VMStateDescription vmstate_tco_io_sts; 82 83 #endif /* HW_ACPI_TCO_H */ 84