1 #ifndef QEMU_HW_ACPI_H 2 #define QEMU_HW_ACPI_H 3 /* 4 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp> 5 * VA Linux Systems Japan K.K. 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public 9 * License as published by the Free Software Foundation; either 10 * version 2 of the License, or (at your option) any later version. 11 * 12 * This library is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * Lesser General Public License for more details. 16 * 17 * You should have received a copy of the GNU Lesser General Public 18 * License along with this library; if not, see 19 * <http://www.gnu.org/licenses/>. 20 */ 21 22 #include "qapi/error.h" 23 #include "qemu/typedefs.h" 24 #include "qemu/notify.h" 25 #include "qemu/option.h" 26 #include "exec/memory.h" 27 28 /* from linux include/acpi/actype.h */ 29 /* Default ACPI register widths */ 30 31 #define ACPI_GPE_REGISTER_WIDTH 8 32 #define ACPI_PM1_REGISTER_WIDTH 16 33 #define ACPI_PM2_REGISTER_WIDTH 8 34 #define ACPI_PM_TIMER_WIDTH 32 35 36 /* PM Timer ticks per second (HZ) */ 37 #define PM_TIMER_FREQUENCY 3579545 38 39 40 /* ACPI fixed hardware registers */ 41 42 /* from linux/drivers/acpi/acpica/aclocal.h */ 43 /* Masks used to access the bit_registers */ 44 45 /* PM1x_STS */ 46 #define ACPI_BITMASK_TIMER_STATUS 0x0001 47 #define ACPI_BITMASK_BUS_MASTER_STATUS 0x0010 48 #define ACPI_BITMASK_GLOBAL_LOCK_STATUS 0x0020 49 #define ACPI_BITMASK_POWER_BUTTON_STATUS 0x0100 50 #define ACPI_BITMASK_SLEEP_BUTTON_STATUS 0x0200 51 #define ACPI_BITMASK_RT_CLOCK_STATUS 0x0400 52 #define ACPI_BITMASK_PCIEXP_WAKE_STATUS 0x4000 /* ACPI 3.0 */ 53 #define ACPI_BITMASK_WAKE_STATUS 0x8000 54 55 #define ACPI_BITMASK_ALL_FIXED_STATUS (\ 56 ACPI_BITMASK_TIMER_STATUS | \ 57 ACPI_BITMASK_BUS_MASTER_STATUS | \ 58 ACPI_BITMASK_GLOBAL_LOCK_STATUS | \ 59 ACPI_BITMASK_POWER_BUTTON_STATUS | \ 60 ACPI_BITMASK_SLEEP_BUTTON_STATUS | \ 61 ACPI_BITMASK_RT_CLOCK_STATUS | \ 62 ACPI_BITMASK_WAKE_STATUS) 63 64 /* PM1x_EN */ 65 #define ACPI_BITMASK_TIMER_ENABLE 0x0001 66 #define ACPI_BITMASK_GLOBAL_LOCK_ENABLE 0x0020 67 #define ACPI_BITMASK_POWER_BUTTON_ENABLE 0x0100 68 #define ACPI_BITMASK_SLEEP_BUTTON_ENABLE 0x0200 69 #define ACPI_BITMASK_RT_CLOCK_ENABLE 0x0400 70 #define ACPI_BITMASK_PCIEXP_WAKE_DISABLE 0x4000 /* ACPI 3.0 */ 71 72 /* PM1x_CNT */ 73 #define ACPI_BITMASK_SCI_ENABLE 0x0001 74 #define ACPI_BITMASK_BUS_MASTER_RLD 0x0002 75 #define ACPI_BITMASK_GLOBAL_LOCK_RELEASE 0x0004 76 #define ACPI_BITMASK_SLEEP_TYPE 0x1C00 77 #define ACPI_BITMASK_SLEEP_ENABLE 0x2000 78 79 /* PM2_CNT */ 80 #define ACPI_BITMASK_ARB_DISABLE 0x0001 81 82 /* structs */ 83 typedef struct ACPIPMTimer ACPIPMTimer; 84 typedef struct ACPIPM1EVT ACPIPM1EVT; 85 typedef struct ACPIPM1CNT ACPIPM1CNT; 86 typedef struct ACPIGPE ACPIGPE; 87 typedef struct ACPIREGS ACPIREGS; 88 89 typedef void (*acpi_update_sci_fn)(ACPIREGS *ar); 90 91 struct ACPIPMTimer { 92 QEMUTimer *timer; 93 MemoryRegion io; 94 int64_t overflow_time; 95 96 acpi_update_sci_fn update_sci; 97 }; 98 99 struct ACPIPM1EVT { 100 MemoryRegion io; 101 uint16_t sts; 102 uint16_t en; 103 acpi_update_sci_fn update_sci; 104 }; 105 106 struct ACPIPM1CNT { 107 MemoryRegion io; 108 uint16_t cnt; 109 uint8_t s4_val; 110 }; 111 112 struct ACPIGPE { 113 uint8_t len; 114 115 uint8_t *sts; 116 uint8_t *en; 117 }; 118 119 struct ACPIREGS { 120 ACPIPMTimer tmr; 121 ACPIGPE gpe; 122 struct { 123 ACPIPM1EVT evt; 124 ACPIPM1CNT cnt; 125 } pm1; 126 Notifier wakeup; 127 }; 128 129 /* PM_TMR */ 130 void acpi_pm_tmr_update(ACPIREGS *ar, bool enable); 131 void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar); 132 void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, 133 MemoryRegion *parent); 134 void acpi_pm_tmr_reset(ACPIREGS *ar); 135 136 #include "qemu/timer.h" 137 static inline int64_t acpi_pm_tmr_get_clock(void) 138 { 139 return muldiv64(qemu_get_clock_ns(vm_clock), PM_TIMER_FREQUENCY, 140 get_ticks_per_sec()); 141 } 142 143 /* PM1a_EVT: piix and ich9 don't implement PM1b. */ 144 uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar); 145 void acpi_pm1_evt_power_down(ACPIREGS *ar); 146 void acpi_pm1_evt_reset(ACPIREGS *ar); 147 void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, 148 MemoryRegion *parent); 149 150 /* PM1a_CNT: piix and ich9 don't implement PM1b CNT. */ 151 void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, uint8_t s4_val); 152 void acpi_pm1_cnt_update(ACPIREGS *ar, 153 bool sci_enable, bool sci_disable); 154 void acpi_pm1_cnt_reset(ACPIREGS *ar); 155 156 /* GPE0 */ 157 void acpi_gpe_init(ACPIREGS *ar, uint8_t len); 158 void acpi_gpe_reset(ACPIREGS *ar); 159 160 void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val); 161 uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr); 162 163 /* acpi.c */ 164 extern int acpi_enabled; 165 extern char unsigned *acpi_tables; 166 extern size_t acpi_tables_len; 167 168 void acpi_table_add(const QemuOpts *opts, Error **errp); 169 170 #endif /* !QEMU_HW_ACPI_H */ 171