1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License as published by 4 * the Free Software Foundation; either version 2 of the License, or 5 * (at your option) any later version. 6 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 12 * You should have received a copy of the GNU General Public License along 13 * with this program; if not, see <http://www.gnu.org/licenses/>. 14 */ 15 #ifndef QEMU_ACPI_DEFS_H 16 #define QEMU_ACPI_DEFS_H 17 18 enum { 19 ACPI_FADT_F_WBINVD, 20 ACPI_FADT_F_WBINVD_FLUSH, 21 ACPI_FADT_F_PROC_C1, 22 ACPI_FADT_F_P_LVL2_UP, 23 ACPI_FADT_F_PWR_BUTTON, 24 ACPI_FADT_F_SLP_BUTTON, 25 ACPI_FADT_F_FIX_RTC, 26 ACPI_FADT_F_RTC_S4, 27 ACPI_FADT_F_TMR_VAL_EXT, 28 ACPI_FADT_F_DCK_CAP, 29 ACPI_FADT_F_RESET_REG_SUP, 30 ACPI_FADT_F_SEALED_CASE, 31 ACPI_FADT_F_HEADLESS, 32 ACPI_FADT_F_CPU_SW_SLP, 33 ACPI_FADT_F_PCI_EXP_WAK, 34 ACPI_FADT_F_USE_PLATFORM_CLOCK, 35 ACPI_FADT_F_S4_RTC_STS_VALID, 36 ACPI_FADT_F_REMOTE_POWER_ON_CAPABLE, 37 ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL, 38 ACPI_FADT_F_FORCE_APIC_PHYSICAL_DESTINATION_MODE, 39 ACPI_FADT_F_HW_REDUCED_ACPI, 40 ACPI_FADT_F_LOW_POWER_S0_IDLE_CAPABLE, 41 }; 42 43 typedef struct AcpiRsdpData { 44 uint8_t oem_id[6] QEMU_NONSTRING; /* OEM identification */ 45 uint8_t revision; /* Must be 0 for 1.0, 2 for 2.0 */ 46 47 unsigned *rsdt_tbl_offset; 48 unsigned *xsdt_tbl_offset; 49 } AcpiRsdpData; 50 51 /* Table structure from Linux kernel (the ACPI tables are under the 52 BSD license) */ 53 54 55 #define ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \ 56 uint32_t signature; /* ACPI signature (4 ASCII characters) */ \ 57 uint32_t length; /* Length of table, in bytes, including header */ \ 58 uint8_t revision; /* ACPI Specification minor version # */ \ 59 uint8_t checksum; /* To make sum of entire table == 0 */ \ 60 uint8_t oem_id[6] \ 61 QEMU_NONSTRING; /* OEM identification */ \ 62 uint8_t oem_table_id[8] \ 63 QEMU_NONSTRING; /* OEM table identification */ \ 64 uint32_t oem_revision; /* OEM revision number */ \ 65 uint8_t asl_compiler_id[4] \ 66 QEMU_NONSTRING; /* ASL compiler vendor ID */ \ 67 uint32_t asl_compiler_revision; /* ASL compiler revision number */ 68 69 70 /* ACPI common table header */ 71 struct AcpiTableHeader { 72 ACPI_TABLE_HEADER_DEF 73 } QEMU_PACKED; 74 typedef struct AcpiTableHeader AcpiTableHeader; 75 76 struct AcpiGenericAddress { 77 uint8_t space_id; /* Address space where struct or register exists */ 78 uint8_t bit_width; /* Size in bits of given register */ 79 uint8_t bit_offset; /* Bit offset within the register */ 80 uint8_t access_width; /* ACPI 3.0: Minimum Access size (ACPI 3.0), 81 ACPI 2.0: Reserved, Table 5-1 */ 82 uint64_t address; /* 64-bit address of struct or register */ 83 } QEMU_PACKED; 84 85 typedef struct AcpiFadtData { 86 struct AcpiGenericAddress pm1a_cnt; /* PM1a_CNT_BLK */ 87 struct AcpiGenericAddress pm1a_evt; /* PM1a_EVT_BLK */ 88 struct AcpiGenericAddress pm_tmr; /* PM_TMR_BLK */ 89 struct AcpiGenericAddress gpe0_blk; /* GPE0_BLK */ 90 struct AcpiGenericAddress reset_reg; /* RESET_REG */ 91 uint8_t reset_val; /* RESET_VALUE */ 92 uint8_t rev; /* Revision */ 93 uint32_t flags; /* Flags */ 94 uint32_t smi_cmd; /* SMI_CMD */ 95 uint16_t sci_int; /* SCI_INT */ 96 uint8_t int_model; /* INT_MODEL */ 97 uint8_t acpi_enable_cmd; /* ACPI_ENABLE */ 98 uint8_t acpi_disable_cmd; /* ACPI_DISABLE */ 99 uint8_t rtc_century; /* CENTURY */ 100 uint16_t plvl2_lat; /* P_LVL2_LAT */ 101 uint16_t plvl3_lat; /* P_LVL3_LAT */ 102 uint16_t arm_boot_arch; /* ARM_BOOT_ARCH */ 103 uint8_t minor_ver; /* FADT Minor Version */ 104 105 /* 106 * respective tables offsets within ACPI_BUILD_TABLE_FILE, 107 * NULL if table doesn't exist (in that case field's value 108 * won't be patched by linker and will be kept set to 0) 109 */ 110 unsigned *facs_tbl_offset; /* FACS offset in */ 111 unsigned *dsdt_tbl_offset; 112 unsigned *xdsdt_tbl_offset; 113 } AcpiFadtData; 114 115 #define ACPI_FADT_ARM_PSCI_COMPLIANT (1 << 0) 116 #define ACPI_FADT_ARM_PSCI_USE_HVC (1 << 1) 117 118 /* 119 * Serial Port Console Redirection Table (SPCR), Rev. 1.02 120 * 121 * For .interface_type see Debug Port Table 2 (DBG2) serial port 122 * subtypes in Table 3, Rev. May 22, 2012 123 */ 124 struct AcpiSerialPortConsoleRedirection { 125 ACPI_TABLE_HEADER_DEF 126 uint8_t interface_type; 127 uint8_t reserved1[3]; 128 struct AcpiGenericAddress base_address; 129 uint8_t interrupt_types; 130 uint8_t irq; 131 uint32_t gsi; 132 uint8_t baud; 133 uint8_t parity; 134 uint8_t stopbits; 135 uint8_t flowctrl; 136 uint8_t term_type; 137 uint8_t reserved2; 138 uint16_t pci_device_id; 139 uint16_t pci_vendor_id; 140 uint8_t pci_bus; 141 uint8_t pci_slot; 142 uint8_t pci_func; 143 uint32_t pci_flags; 144 uint8_t pci_seg; 145 uint32_t reserved3; 146 } QEMU_PACKED; 147 typedef struct AcpiSerialPortConsoleRedirection 148 AcpiSerialPortConsoleRedirection; 149 150 /* 151 * ACPI 1.0 Root System Description Table (RSDT) 152 */ 153 struct AcpiRsdtDescriptorRev1 { 154 ACPI_TABLE_HEADER_DEF /* ACPI common table header */ 155 uint32_t table_offset_entry[0]; /* Array of pointers to other */ 156 /* ACPI tables */ 157 } QEMU_PACKED; 158 typedef struct AcpiRsdtDescriptorRev1 AcpiRsdtDescriptorRev1; 159 160 /* 161 * ACPI 2.0 eXtended System Description Table (XSDT) 162 */ 163 struct AcpiXsdtDescriptorRev2 { 164 ACPI_TABLE_HEADER_DEF /* ACPI common table header */ 165 uint64_t table_offset_entry[0]; /* Array of pointers to other */ 166 /* ACPI tables */ 167 } QEMU_PACKED; 168 typedef struct AcpiXsdtDescriptorRev2 AcpiXsdtDescriptorRev2; 169 170 /* 171 * ACPI 1.0 Firmware ACPI Control Structure (FACS) 172 */ 173 struct AcpiFacsDescriptorRev1 { 174 uint32_t signature; /* ACPI Signature */ 175 uint32_t length; /* Length of structure, in bytes */ 176 uint32_t hardware_signature; /* Hardware configuration signature */ 177 uint32_t firmware_waking_vector; /* ACPI OS waking vector */ 178 uint32_t global_lock; /* Global Lock */ 179 uint32_t flags; 180 uint8_t resverved3 [40]; /* Reserved - must be zero */ 181 } QEMU_PACKED; 182 typedef struct AcpiFacsDescriptorRev1 AcpiFacsDescriptorRev1; 183 184 /* 185 * Differentiated System Description Table (DSDT) 186 */ 187 188 /* 189 * MADT values and structures 190 */ 191 192 /* Values for MADT PCATCompat */ 193 194 #define ACPI_DUAL_PIC 0 195 #define ACPI_MULTIPLE_APIC 1 196 197 /* Master MADT */ 198 199 struct AcpiMultipleApicTable { 200 ACPI_TABLE_HEADER_DEF /* ACPI common table header */ 201 uint32_t local_apic_address; /* Physical address of local APIC */ 202 uint32_t flags; 203 } QEMU_PACKED; 204 typedef struct AcpiMultipleApicTable AcpiMultipleApicTable; 205 206 /* Values for Type in APIC sub-headers */ 207 208 #define ACPI_APIC_PROCESSOR 0 209 #define ACPI_APIC_IO 1 210 #define ACPI_APIC_XRUPT_OVERRIDE 2 211 #define ACPI_APIC_NMI 3 212 #define ACPI_APIC_LOCAL_NMI 4 213 #define ACPI_APIC_ADDRESS_OVERRIDE 5 214 #define ACPI_APIC_IO_SAPIC 6 215 #define ACPI_APIC_LOCAL_SAPIC 7 216 #define ACPI_APIC_XRUPT_SOURCE 8 217 #define ACPI_APIC_LOCAL_X2APIC 9 218 #define ACPI_APIC_LOCAL_X2APIC_NMI 10 219 #define ACPI_APIC_GENERIC_CPU_INTERFACE 11 220 #define ACPI_APIC_GENERIC_DISTRIBUTOR 12 221 #define ACPI_APIC_GENERIC_MSI_FRAME 13 222 #define ACPI_APIC_GENERIC_REDISTRIBUTOR 14 223 #define ACPI_APIC_GENERIC_TRANSLATOR 15 224 #define ACPI_APIC_RESERVED 16 /* 16 and greater are reserved */ 225 226 /* 227 * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE) 228 */ 229 #define ACPI_SUB_HEADER_DEF /* Common ACPI sub-structure header */\ 230 uint8_t type; \ 231 uint8_t length; 232 233 /* Sub-structures for MADT */ 234 235 struct AcpiMadtProcessorApic { 236 ACPI_SUB_HEADER_DEF 237 uint8_t processor_id; /* ACPI processor id */ 238 uint8_t local_apic_id; /* Processor's local APIC id */ 239 uint32_t flags; 240 } QEMU_PACKED; 241 typedef struct AcpiMadtProcessorApic AcpiMadtProcessorApic; 242 243 struct AcpiMadtIoApic { 244 ACPI_SUB_HEADER_DEF 245 uint8_t io_apic_id; /* I/O APIC ID */ 246 uint8_t reserved; /* Reserved - must be zero */ 247 uint32_t address; /* APIC physical address */ 248 uint32_t interrupt; /* Global system interrupt where INTI 249 * lines start */ 250 } QEMU_PACKED; 251 typedef struct AcpiMadtIoApic AcpiMadtIoApic; 252 253 struct AcpiMadtIntsrcovr { 254 ACPI_SUB_HEADER_DEF 255 uint8_t bus; 256 uint8_t source; 257 uint32_t gsi; 258 uint16_t flags; 259 } QEMU_PACKED; 260 typedef struct AcpiMadtIntsrcovr AcpiMadtIntsrcovr; 261 262 struct AcpiMadtLocalNmi { 263 ACPI_SUB_HEADER_DEF 264 uint8_t processor_id; /* ACPI processor id */ 265 uint16_t flags; /* MPS INTI flags */ 266 uint8_t lint; /* Local APIC LINT# */ 267 } QEMU_PACKED; 268 typedef struct AcpiMadtLocalNmi AcpiMadtLocalNmi; 269 270 struct AcpiMadtProcessorX2Apic { 271 ACPI_SUB_HEADER_DEF 272 uint16_t reserved; 273 uint32_t x2apic_id; /* Processor's local x2APIC ID */ 274 uint32_t flags; 275 uint32_t uid; /* Processor object _UID */ 276 } QEMU_PACKED; 277 typedef struct AcpiMadtProcessorX2Apic AcpiMadtProcessorX2Apic; 278 279 struct AcpiMadtLocalX2ApicNmi { 280 ACPI_SUB_HEADER_DEF 281 uint16_t flags; /* MPS INTI flags */ 282 uint32_t uid; /* Processor object _UID */ 283 uint8_t lint; /* Local APIC LINT# */ 284 uint8_t reserved[3]; /* Local APIC LINT# */ 285 } QEMU_PACKED; 286 typedef struct AcpiMadtLocalX2ApicNmi AcpiMadtLocalX2ApicNmi; 287 288 struct AcpiMadtGenericCpuInterface { 289 ACPI_SUB_HEADER_DEF 290 uint16_t reserved; 291 uint32_t cpu_interface_number; 292 uint32_t uid; 293 uint32_t flags; 294 uint32_t parking_version; 295 uint32_t performance_interrupt; 296 uint64_t parked_address; 297 uint64_t base_address; 298 uint64_t gicv_base_address; 299 uint64_t gich_base_address; 300 uint32_t vgic_interrupt; 301 uint64_t gicr_base_address; 302 uint64_t arm_mpidr; 303 } QEMU_PACKED; 304 305 typedef struct AcpiMadtGenericCpuInterface AcpiMadtGenericCpuInterface; 306 307 /* GICC CPU Interface Flags */ 308 #define ACPI_MADT_GICC_ENABLED 1 309 310 struct AcpiMadtGenericDistributor { 311 ACPI_SUB_HEADER_DEF 312 uint16_t reserved; 313 uint32_t gic_id; 314 uint64_t base_address; 315 uint32_t global_irq_base; 316 /* ACPI 5.1 Errata 1228 Present GIC version in MADT table */ 317 uint8_t version; 318 uint8_t reserved2[3]; 319 } QEMU_PACKED; 320 321 typedef struct AcpiMadtGenericDistributor AcpiMadtGenericDistributor; 322 323 struct AcpiMadtGenericMsiFrame { 324 ACPI_SUB_HEADER_DEF 325 uint16_t reserved; 326 uint32_t gic_msi_frame_id; 327 uint64_t base_address; 328 uint32_t flags; 329 uint16_t spi_count; 330 uint16_t spi_base; 331 } QEMU_PACKED; 332 333 typedef struct AcpiMadtGenericMsiFrame AcpiMadtGenericMsiFrame; 334 335 struct AcpiMadtGenericRedistributor { 336 ACPI_SUB_HEADER_DEF 337 uint16_t reserved; 338 uint64_t base_address; 339 uint32_t range_length; 340 } QEMU_PACKED; 341 342 typedef struct AcpiMadtGenericRedistributor AcpiMadtGenericRedistributor; 343 344 struct AcpiMadtGenericTranslator { 345 ACPI_SUB_HEADER_DEF 346 uint16_t reserved; 347 uint32_t translation_id; 348 uint64_t base_address; 349 uint32_t reserved2; 350 } QEMU_PACKED; 351 352 typedef struct AcpiMadtGenericTranslator AcpiMadtGenericTranslator; 353 354 /* 355 * Generic Timer Description Table (GTDT) 356 */ 357 #define ACPI_GTDT_INTERRUPT_MODE_LEVEL (0 << 0) 358 #define ACPI_GTDT_INTERRUPT_MODE_EDGE (1 << 0) 359 #define ACPI_GTDT_CAP_ALWAYS_ON (1 << 2) 360 361 struct AcpiGenericTimerTable { 362 ACPI_TABLE_HEADER_DEF 363 uint64_t counter_block_addresss; 364 uint32_t reserved; 365 uint32_t secure_el1_interrupt; 366 uint32_t secure_el1_flags; 367 uint32_t non_secure_el1_interrupt; 368 uint32_t non_secure_el1_flags; 369 uint32_t virtual_timer_interrupt; 370 uint32_t virtual_timer_flags; 371 uint32_t non_secure_el2_interrupt; 372 uint32_t non_secure_el2_flags; 373 uint64_t counter_read_block_address; 374 uint32_t platform_timer_count; 375 uint32_t platform_timer_offset; 376 } QEMU_PACKED; 377 typedef struct AcpiGenericTimerTable AcpiGenericTimerTable; 378 379 /* 380 * HPET Description Table 381 */ 382 struct Acpi20Hpet { 383 ACPI_TABLE_HEADER_DEF /* ACPI common table header */ 384 uint32_t timer_block_id; 385 struct AcpiGenericAddress addr; 386 uint8_t hpet_number; 387 uint16_t min_tick; 388 uint8_t page_protect; 389 } QEMU_PACKED; 390 typedef struct Acpi20Hpet Acpi20Hpet; 391 392 /* 393 * SRAT (NUMA topology description) table 394 */ 395 396 struct AcpiSystemResourceAffinityTable { 397 ACPI_TABLE_HEADER_DEF 398 uint32_t reserved1; 399 uint32_t reserved2[2]; 400 } QEMU_PACKED; 401 typedef struct AcpiSystemResourceAffinityTable AcpiSystemResourceAffinityTable; 402 403 #define ACPI_SRAT_PROCESSOR_APIC 0 404 #define ACPI_SRAT_MEMORY 1 405 #define ACPI_SRAT_PROCESSOR_x2APIC 2 406 #define ACPI_SRAT_PROCESSOR_GICC 3 407 408 struct AcpiSratProcessorAffinity { 409 ACPI_SUB_HEADER_DEF 410 uint8_t proximity_lo; 411 uint8_t local_apic_id; 412 uint32_t flags; 413 uint8_t local_sapic_eid; 414 uint8_t proximity_hi[3]; 415 uint32_t reserved; 416 } QEMU_PACKED; 417 typedef struct AcpiSratProcessorAffinity AcpiSratProcessorAffinity; 418 419 struct AcpiSratProcessorX2ApicAffinity { 420 ACPI_SUB_HEADER_DEF 421 uint16_t reserved; 422 uint32_t proximity_domain; 423 uint32_t x2apic_id; 424 uint32_t flags; 425 uint32_t clk_domain; 426 uint32_t reserved2; 427 } QEMU_PACKED; 428 typedef struct AcpiSratProcessorX2ApicAffinity AcpiSratProcessorX2ApicAffinity; 429 430 struct AcpiSratMemoryAffinity { 431 ACPI_SUB_HEADER_DEF 432 uint32_t proximity; 433 uint16_t reserved1; 434 uint64_t base_addr; 435 uint64_t range_length; 436 uint32_t reserved2; 437 uint32_t flags; 438 uint32_t reserved3[2]; 439 } QEMU_PACKED; 440 typedef struct AcpiSratMemoryAffinity AcpiSratMemoryAffinity; 441 442 struct AcpiSratProcessorGiccAffinity { 443 ACPI_SUB_HEADER_DEF 444 uint32_t proximity; 445 uint32_t acpi_processor_uid; 446 uint32_t flags; 447 uint32_t clock_domain; 448 } QEMU_PACKED; 449 450 typedef struct AcpiSratProcessorGiccAffinity AcpiSratProcessorGiccAffinity; 451 452 /* PCI fw r3.0 MCFG table. */ 453 /* Subtable */ 454 struct AcpiMcfgAllocation { 455 uint64_t address; /* Base address, processor-relative */ 456 uint16_t pci_segment; /* PCI segment group number */ 457 uint8_t start_bus_number; /* Starting PCI Bus number */ 458 uint8_t end_bus_number; /* Final PCI Bus number */ 459 uint32_t reserved; 460 } QEMU_PACKED; 461 typedef struct AcpiMcfgAllocation AcpiMcfgAllocation; 462 463 struct AcpiTableMcfg { 464 ACPI_TABLE_HEADER_DEF; 465 uint8_t reserved[8]; 466 AcpiMcfgAllocation allocation[0]; 467 } QEMU_PACKED; 468 typedef struct AcpiTableMcfg AcpiTableMcfg; 469 470 /* 471 * TCPA Description Table 472 * 473 * Following Level 00, Rev 00.37 of specs: 474 * http://www.trustedcomputinggroup.org/resources/tcg_acpi_specification 475 */ 476 struct Acpi20Tcpa { 477 ACPI_TABLE_HEADER_DEF /* ACPI common table header */ 478 uint16_t platform_class; 479 uint32_t log_area_minimum_length; 480 uint64_t log_area_start_address; 481 } QEMU_PACKED; 482 typedef struct Acpi20Tcpa Acpi20Tcpa; 483 484 /* 485 * TPM2 486 * 487 * Following Version 1.2, Revision 8 of specs: 488 * https://trustedcomputinggroup.org/tcg-acpi-specification/ 489 */ 490 struct Acpi20TPM2 { 491 ACPI_TABLE_HEADER_DEF 492 uint16_t platform_class; 493 uint16_t reserved; 494 uint64_t control_area_address; 495 uint32_t start_method; 496 uint8_t start_method_params[12]; 497 uint32_t log_area_minimum_length; 498 uint64_t log_area_start_address; 499 } QEMU_PACKED; 500 typedef struct Acpi20TPM2 Acpi20TPM2; 501 502 /* DMAR - DMA Remapping table r2.2 */ 503 struct AcpiTableDmar { 504 ACPI_TABLE_HEADER_DEF 505 uint8_t host_address_width; /* Maximum DMA physical addressability */ 506 uint8_t flags; 507 uint8_t reserved[10]; 508 } QEMU_PACKED; 509 typedef struct AcpiTableDmar AcpiTableDmar; 510 511 /* Masks for Flags field above */ 512 #define ACPI_DMAR_INTR_REMAP 1 513 #define ACPI_DMAR_X2APIC_OPT_OUT (1 << 1) 514 515 /* Values for sub-structure type for DMAR */ 516 enum { 517 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, /* DRHD */ 518 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, /* RMRR */ 519 ACPI_DMAR_TYPE_ATSR = 2, /* ATSR */ 520 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, /* RHSR */ 521 ACPI_DMAR_TYPE_ANDD = 4, /* ANDD */ 522 ACPI_DMAR_TYPE_RESERVED = 5 /* Reserved for furture use */ 523 }; 524 525 /* 526 * Sub-structures for DMAR 527 */ 528 529 /* Device scope structure for DRHD. */ 530 struct AcpiDmarDeviceScope { 531 uint8_t entry_type; 532 uint8_t length; 533 uint16_t reserved; 534 uint8_t enumeration_id; 535 uint8_t bus; 536 struct { 537 uint8_t device; 538 uint8_t function; 539 } path[0]; 540 } QEMU_PACKED; 541 typedef struct AcpiDmarDeviceScope AcpiDmarDeviceScope; 542 543 /* Type 0: Hardware Unit Definition */ 544 struct AcpiDmarHardwareUnit { 545 uint16_t type; 546 uint16_t length; 547 uint8_t flags; 548 uint8_t reserved; 549 uint16_t pci_segment; /* The PCI Segment associated with this unit */ 550 uint64_t address; /* Base address of remapping hardware register-set */ 551 AcpiDmarDeviceScope scope[0]; 552 } QEMU_PACKED; 553 typedef struct AcpiDmarHardwareUnit AcpiDmarHardwareUnit; 554 555 /* Type 2: Root Port ATS Capability Reporting Structure */ 556 struct AcpiDmarRootPortATS { 557 uint16_t type; 558 uint16_t length; 559 uint8_t flags; 560 uint8_t reserved; 561 uint16_t pci_segment; 562 AcpiDmarDeviceScope scope[0]; 563 } QEMU_PACKED; 564 typedef struct AcpiDmarRootPortATS AcpiDmarRootPortATS; 565 566 /* Masks for Flags field above */ 567 #define ACPI_DMAR_INCLUDE_PCI_ALL 1 568 #define ACPI_DMAR_ATSR_ALL_PORTS 1 569 570 /* 571 * Input Output Remapping Table (IORT) 572 * Conforms to "IO Remapping Table System Software on ARM Platforms", 573 * Document number: ARM DEN 0049B, October 2015 574 */ 575 576 struct AcpiIortTable { 577 ACPI_TABLE_HEADER_DEF /* ACPI common table header */ 578 uint32_t node_count; 579 uint32_t node_offset; 580 uint32_t reserved; 581 } QEMU_PACKED; 582 typedef struct AcpiIortTable AcpiIortTable; 583 584 /* 585 * IORT node types 586 */ 587 588 #define ACPI_IORT_NODE_HEADER_DEF /* Node format common fields */ \ 589 uint8_t type; \ 590 uint16_t length; \ 591 uint8_t revision; \ 592 uint32_t reserved; \ 593 uint32_t mapping_count; \ 594 uint32_t mapping_offset; 595 596 /* Values for node Type above */ 597 enum { 598 ACPI_IORT_NODE_ITS_GROUP = 0x00, 599 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 600 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 601 ACPI_IORT_NODE_SMMU = 0x03, 602 ACPI_IORT_NODE_SMMU_V3 = 0x04 603 }; 604 605 struct AcpiIortIdMapping { 606 uint32_t input_base; 607 uint32_t id_count; 608 uint32_t output_base; 609 uint32_t output_reference; 610 uint32_t flags; 611 } QEMU_PACKED; 612 typedef struct AcpiIortIdMapping AcpiIortIdMapping; 613 614 struct AcpiIortMemoryAccess { 615 uint32_t cache_coherency; 616 uint8_t hints; 617 uint16_t reserved; 618 uint8_t memory_flags; 619 } QEMU_PACKED; 620 typedef struct AcpiIortMemoryAccess AcpiIortMemoryAccess; 621 622 struct AcpiIortItsGroup { 623 ACPI_IORT_NODE_HEADER_DEF 624 uint32_t its_count; 625 uint32_t identifiers[0]; 626 } QEMU_PACKED; 627 typedef struct AcpiIortItsGroup AcpiIortItsGroup; 628 629 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE 1 630 631 struct AcpiIortSmmu3 { 632 ACPI_IORT_NODE_HEADER_DEF 633 uint64_t base_address; 634 uint32_t flags; 635 uint32_t reserved2; 636 uint64_t vatos_address; 637 uint32_t model; 638 uint32_t event_gsiv; 639 uint32_t pri_gsiv; 640 uint32_t gerr_gsiv; 641 uint32_t sync_gsiv; 642 AcpiIortIdMapping id_mapping_array[0]; 643 } QEMU_PACKED; 644 typedef struct AcpiIortSmmu3 AcpiIortSmmu3; 645 646 struct AcpiIortRC { 647 ACPI_IORT_NODE_HEADER_DEF 648 AcpiIortMemoryAccess memory_properties; 649 uint32_t ats_attribute; 650 uint32_t pci_segment_number; 651 AcpiIortIdMapping id_mapping_array[0]; 652 } QEMU_PACKED; 653 typedef struct AcpiIortRC AcpiIortRC; 654 655 #endif 656