1 /* 2 * TLB flags definition 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 #ifndef TLB_FLAGS_H 20 #define TLB_FLAGS_H 21 22 #include "exec/cpu-defs.h" 23 24 #ifdef CONFIG_USER_ONLY 25 26 /* 27 * Allow some level of source compatibility with softmmu. We do not 28 * support any of the more exotic features, so only invalid pages may 29 * be signaled by probe_access_flags(). 30 */ 31 #define TLB_INVALID_MASK (1 << (TARGET_PAGE_BITS_MIN - 1)) 32 #define TLB_MMIO (1 << (TARGET_PAGE_BITS_MIN - 2)) 33 #define TLB_WATCHPOINT 0 34 35 #else 36 37 /* 38 * Flags stored in the low bits of the TLB virtual address. 39 * These are defined so that fast path ram access is all zeros. 40 * The flags all must be between TARGET_PAGE_BITS and 41 * maximum address alignment bit. 42 * 43 * Use TARGET_PAGE_BITS_MIN so that these bits are constant 44 * when TARGET_PAGE_BITS_VARY is in effect. 45 * 46 * The count, if not the placement of these bits is known 47 * to tcg/tcg-op-ldst.c, check_max_alignment(). 48 */ 49 /* Zero if TLB entry is valid. */ 50 #define TLB_INVALID_MASK (1 << (TARGET_PAGE_BITS_MIN - 1)) 51 /* 52 * Set if TLB entry references a clean RAM page. The iotlb entry will 53 * contain the page physical address. 54 */ 55 #define TLB_NOTDIRTY (1 << (TARGET_PAGE_BITS_MIN - 2)) 56 /* Set if TLB entry is an IO callback. */ 57 #define TLB_MMIO (1 << (TARGET_PAGE_BITS_MIN - 3)) 58 /* Set if TLB entry writes ignored. */ 59 #define TLB_DISCARD_WRITE (1 << (TARGET_PAGE_BITS_MIN - 4)) 60 /* Set if the slow path must be used; more flags in CPUTLBEntryFull. */ 61 #define TLB_FORCE_SLOW (1 << (TARGET_PAGE_BITS_MIN - 5)) 62 63 /* 64 * Use this mask to check interception with an alignment mask 65 * in a TCG backend. 66 */ 67 #define TLB_FLAGS_MASK \ 68 (TLB_INVALID_MASK | TLB_NOTDIRTY | TLB_MMIO \ 69 | TLB_FORCE_SLOW | TLB_DISCARD_WRITE) 70 71 /* 72 * Flags stored in CPUTLBEntryFull.slow_flags[x]. 73 * TLB_FORCE_SLOW must be set in CPUTLBEntry.addr_idx[x]. 74 */ 75 /* Set if TLB entry requires byte swap. */ 76 #define TLB_BSWAP (1 << 0) 77 /* Set if TLB entry contains a watchpoint. */ 78 #define TLB_WATCHPOINT (1 << 1) 79 /* Set if TLB entry requires aligned accesses. */ 80 #define TLB_CHECK_ALIGNED (1 << 2) 81 82 #define TLB_SLOW_FLAGS_MASK (TLB_BSWAP | TLB_WATCHPOINT | TLB_CHECK_ALIGNED) 83 84 /* The two sets of flags must not overlap. */ 85 QEMU_BUILD_BUG_ON(TLB_FLAGS_MASK & TLB_SLOW_FLAGS_MASK); 86 87 #endif /* !CONFIG_USER_ONLY */ 88 89 #endif /* TLB_FLAGS_H */ 90