xref: /openbmc/qemu/include/exec/memop.h (revision c4601322)
1 /*
2  * Constants for memory operations
3  *
4  * Authors:
5  *  Richard Henderson <rth@twiddle.net>
6  *
7  * This work is licensed under the terms of the GNU GPL, version 2 or later.
8  * See the COPYING file in the top-level directory.
9  *
10  */
11 
12 #ifndef MEMOP_H
13 #define MEMOP_H
14 
15 #include "qemu/host-utils.h"
16 
17 typedef enum MemOp {
18     MO_8     = 0,
19     MO_16    = 1,
20     MO_32    = 2,
21     MO_64    = 3,
22     MO_128   = 4,
23     MO_256   = 5,
24     MO_512   = 6,
25     MO_1024  = 7,
26     MO_SIZE  = 0x07,   /* Mask for the above.  */
27 
28     MO_SIGN  = 0x08,   /* Sign-extended, otherwise zero-extended.  */
29 
30     MO_BSWAP = 0x10,   /* Host reverse endian.  */
31 #if HOST_BIG_ENDIAN
32     MO_LE    = MO_BSWAP,
33     MO_BE    = 0,
34 #else
35     MO_LE    = 0,
36     MO_BE    = MO_BSWAP,
37 #endif
38 #ifdef NEED_CPU_H
39 #if TARGET_BIG_ENDIAN
40     MO_TE    = MO_BE,
41 #else
42     MO_TE    = MO_LE,
43 #endif
44 #endif
45 
46     /*
47      * MO_UNALN accesses are never checked for alignment.
48      * MO_ALIGN accesses will result in a call to the CPU's
49      * do_unaligned_access hook if the guest address is not aligned.
50      *
51      * Some architectures (e.g. ARMv8) need the address which is aligned
52      * to a size more than the size of the memory access.
53      * Some architectures (e.g. SPARCv9) need an address which is aligned,
54      * but less strictly than the natural alignment.
55      *
56      * MO_ALIGN supposes the alignment size is the size of a memory access.
57      *
58      * There are three options:
59      * - unaligned access permitted (MO_UNALN).
60      * - an alignment to the size of an access (MO_ALIGN);
61      * - an alignment to a specified size, which may be more or less than
62      *   the access size (MO_ALIGN_x where 'x' is a size in bytes);
63      */
64     MO_ASHIFT = 5,
65     MO_AMASK = 0x7 << MO_ASHIFT,
66     MO_UNALN    = 0,
67     MO_ALIGN_2  = 1 << MO_ASHIFT,
68     MO_ALIGN_4  = 2 << MO_ASHIFT,
69     MO_ALIGN_8  = 3 << MO_ASHIFT,
70     MO_ALIGN_16 = 4 << MO_ASHIFT,
71     MO_ALIGN_32 = 5 << MO_ASHIFT,
72     MO_ALIGN_64 = 6 << MO_ASHIFT,
73     MO_ALIGN    = MO_AMASK,
74 
75     /* Combinations of the above, for ease of use.  */
76     MO_UB    = MO_8,
77     MO_UW    = MO_16,
78     MO_UL    = MO_32,
79     MO_UQ    = MO_64,
80     MO_UO    = MO_128,
81     MO_SB    = MO_SIGN | MO_8,
82     MO_SW    = MO_SIGN | MO_16,
83     MO_SL    = MO_SIGN | MO_32,
84     MO_SQ    = MO_SIGN | MO_64,
85     MO_SO    = MO_SIGN | MO_128,
86 
87     MO_LEUW  = MO_LE | MO_UW,
88     MO_LEUL  = MO_LE | MO_UL,
89     MO_LEUQ  = MO_LE | MO_UQ,
90     MO_LESW  = MO_LE | MO_SW,
91     MO_LESL  = MO_LE | MO_SL,
92     MO_LESQ  = MO_LE | MO_SQ,
93 
94     MO_BEUW  = MO_BE | MO_UW,
95     MO_BEUL  = MO_BE | MO_UL,
96     MO_BEUQ  = MO_BE | MO_UQ,
97     MO_BESW  = MO_BE | MO_SW,
98     MO_BESL  = MO_BE | MO_SL,
99     MO_BESQ  = MO_BE | MO_SQ,
100 
101 #ifdef NEED_CPU_H
102     MO_TEUW  = MO_TE | MO_UW,
103     MO_TEUL  = MO_TE | MO_UL,
104     MO_TEUQ  = MO_TE | MO_UQ,
105     MO_TEUO  = MO_TE | MO_UO,
106     MO_TESW  = MO_TE | MO_SW,
107     MO_TESL  = MO_TE | MO_SL,
108     MO_TESQ  = MO_TE | MO_SQ,
109 #endif
110 
111     MO_SSIZE = MO_SIZE | MO_SIGN,
112 } MemOp;
113 
114 /* MemOp to size in bytes.  */
115 static inline unsigned memop_size(MemOp op)
116 {
117     return 1 << (op & MO_SIZE);
118 }
119 
120 /* Size in bytes to MemOp.  */
121 static inline MemOp size_memop(unsigned size)
122 {
123 #ifdef CONFIG_DEBUG_TCG
124     /* Power of 2 up to 8.  */
125     assert((size & (size - 1)) == 0 && size >= 1 && size <= 8);
126 #endif
127     return ctz32(size);
128 }
129 
130 /* Big endianness from MemOp.  */
131 static inline bool memop_big_endian(MemOp op)
132 {
133     return (op & MO_BSWAP) == MO_BE;
134 }
135 
136 #endif
137