1 /* 2 * Software MMU support 3 * 4 * This library is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU Lesser General Public 6 * License as published by the Free Software Foundation; either 7 * version 2 of the License, or (at your option) any later version. 8 * 9 * This library is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * Lesser General Public License for more details. 13 * 14 * You should have received a copy of the GNU Lesser General Public 15 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 16 * 17 */ 18 19 /* 20 * Generate inline load/store functions for all MMU modes (typically 21 * at least _user and _kernel) as well as _data versions, for all data 22 * sizes. 23 * 24 * Used by target op helpers. 25 * 26 * The syntax for the accessors is: 27 * 28 * load: cpu_ld{sign}{size}_{mmusuffix}(env, ptr) 29 * 30 * store: cpu_st{sign}{size}_{mmusuffix}(env, ptr, val) 31 * 32 * sign is: 33 * (empty): for 32 and 64 bit sizes 34 * u : unsigned 35 * s : signed 36 * 37 * size is: 38 * b: 8 bits 39 * w: 16 bits 40 * l: 32 bits 41 * q: 64 bits 42 * 43 * mmusuffix is one of the generic suffixes "data" or "code", or 44 * (for softmmu configs) a target-specific MMU mode suffix as defined 45 * in target cpu.h. 46 */ 47 #ifndef CPU_LDST_H 48 #define CPU_LDST_H 49 50 #if defined(CONFIG_USER_ONLY) 51 /* All direct uses of g2h and h2g need to go away for usermode softmmu. */ 52 #define g2h(x) ((void *)((unsigned long)(target_ulong)(x) + GUEST_BASE)) 53 54 #if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS 55 #define h2g_valid(x) 1 56 #else 57 #define h2g_valid(x) ({ \ 58 unsigned long __guest = (unsigned long)(x) - GUEST_BASE; \ 59 (__guest < (1ul << TARGET_VIRT_ADDR_SPACE_BITS)) && \ 60 (!RESERVED_VA || (__guest < RESERVED_VA)); \ 61 }) 62 #endif 63 64 #define h2g_nocheck(x) ({ \ 65 unsigned long __ret = (unsigned long)(x) - GUEST_BASE; \ 66 (abi_ulong)__ret; \ 67 }) 68 69 #define h2g(x) ({ \ 70 /* Check if given address fits target address space */ \ 71 assert(h2g_valid(x)); \ 72 h2g_nocheck(x); \ 73 }) 74 75 #endif 76 77 #if defined(CONFIG_USER_ONLY) 78 79 /* In user-only mode we provide only the _code and _data accessors. */ 80 81 #define MEMSUFFIX _data 82 #define DATA_SIZE 1 83 #include "exec/cpu_ldst_useronly_template.h" 84 85 #define DATA_SIZE 2 86 #include "exec/cpu_ldst_useronly_template.h" 87 88 #define DATA_SIZE 4 89 #include "exec/cpu_ldst_useronly_template.h" 90 91 #define DATA_SIZE 8 92 #include "exec/cpu_ldst_useronly_template.h" 93 #undef MEMSUFFIX 94 95 #define MEMSUFFIX _code 96 #define CODE_ACCESS 97 #define DATA_SIZE 1 98 #include "exec/cpu_ldst_useronly_template.h" 99 100 #define DATA_SIZE 2 101 #include "exec/cpu_ldst_useronly_template.h" 102 103 #define DATA_SIZE 4 104 #include "exec/cpu_ldst_useronly_template.h" 105 106 #define DATA_SIZE 8 107 #include "exec/cpu_ldst_useronly_template.h" 108 #undef MEMSUFFIX 109 #undef CODE_ACCESS 110 111 #else 112 113 /* The memory helpers for tcg-generated code need tcg_target_long etc. */ 114 #include "tcg.h" 115 116 uint8_t helper_ldb_mmu(CPUArchState *env, target_ulong addr, int mmu_idx); 117 uint16_t helper_ldw_mmu(CPUArchState *env, target_ulong addr, int mmu_idx); 118 uint32_t helper_ldl_mmu(CPUArchState *env, target_ulong addr, int mmu_idx); 119 uint64_t helper_ldq_mmu(CPUArchState *env, target_ulong addr, int mmu_idx); 120 121 void helper_stb_mmu(CPUArchState *env, target_ulong addr, 122 uint8_t val, int mmu_idx); 123 void helper_stw_mmu(CPUArchState *env, target_ulong addr, 124 uint16_t val, int mmu_idx); 125 void helper_stl_mmu(CPUArchState *env, target_ulong addr, 126 uint32_t val, int mmu_idx); 127 void helper_stq_mmu(CPUArchState *env, target_ulong addr, 128 uint64_t val, int mmu_idx); 129 130 uint8_t helper_ldb_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); 131 uint16_t helper_ldw_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); 132 uint32_t helper_ldl_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); 133 uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); 134 135 #ifdef MMU_MODE0_SUFFIX 136 #define CPU_MMU_INDEX 0 137 #define MEMSUFFIX MMU_MODE0_SUFFIX 138 #define DATA_SIZE 1 139 #include "exec/cpu_ldst_template.h" 140 141 #define DATA_SIZE 2 142 #include "exec/cpu_ldst_template.h" 143 144 #define DATA_SIZE 4 145 #include "exec/cpu_ldst_template.h" 146 147 #define DATA_SIZE 8 148 #include "exec/cpu_ldst_template.h" 149 #undef CPU_MMU_INDEX 150 #undef MEMSUFFIX 151 #endif 152 153 #if (NB_MMU_MODES >= 2) && defined(MMU_MODE1_SUFFIX) 154 #define CPU_MMU_INDEX 1 155 #define MEMSUFFIX MMU_MODE1_SUFFIX 156 #define DATA_SIZE 1 157 #include "exec/cpu_ldst_template.h" 158 159 #define DATA_SIZE 2 160 #include "exec/cpu_ldst_template.h" 161 162 #define DATA_SIZE 4 163 #include "exec/cpu_ldst_template.h" 164 165 #define DATA_SIZE 8 166 #include "exec/cpu_ldst_template.h" 167 #undef CPU_MMU_INDEX 168 #undef MEMSUFFIX 169 #endif 170 171 #if (NB_MMU_MODES >= 3) && defined(MMU_MODE2_SUFFIX) 172 173 #define CPU_MMU_INDEX 2 174 #define MEMSUFFIX MMU_MODE2_SUFFIX 175 #define DATA_SIZE 1 176 #include "exec/cpu_ldst_template.h" 177 178 #define DATA_SIZE 2 179 #include "exec/cpu_ldst_template.h" 180 181 #define DATA_SIZE 4 182 #include "exec/cpu_ldst_template.h" 183 184 #define DATA_SIZE 8 185 #include "exec/cpu_ldst_template.h" 186 #undef CPU_MMU_INDEX 187 #undef MEMSUFFIX 188 #endif /* (NB_MMU_MODES >= 3) */ 189 190 #if (NB_MMU_MODES >= 4) && defined(MMU_MODE3_SUFFIX) 191 192 #define CPU_MMU_INDEX 3 193 #define MEMSUFFIX MMU_MODE3_SUFFIX 194 #define DATA_SIZE 1 195 #include "exec/cpu_ldst_template.h" 196 197 #define DATA_SIZE 2 198 #include "exec/cpu_ldst_template.h" 199 200 #define DATA_SIZE 4 201 #include "exec/cpu_ldst_template.h" 202 203 #define DATA_SIZE 8 204 #include "exec/cpu_ldst_template.h" 205 #undef CPU_MMU_INDEX 206 #undef MEMSUFFIX 207 #endif /* (NB_MMU_MODES >= 4) */ 208 209 #if (NB_MMU_MODES >= 5) && defined(MMU_MODE4_SUFFIX) 210 211 #define CPU_MMU_INDEX 4 212 #define MEMSUFFIX MMU_MODE4_SUFFIX 213 #define DATA_SIZE 1 214 #include "exec/cpu_ldst_template.h" 215 216 #define DATA_SIZE 2 217 #include "exec/cpu_ldst_template.h" 218 219 #define DATA_SIZE 4 220 #include "exec/cpu_ldst_template.h" 221 222 #define DATA_SIZE 8 223 #include "exec/cpu_ldst_template.h" 224 #undef CPU_MMU_INDEX 225 #undef MEMSUFFIX 226 #endif /* (NB_MMU_MODES >= 5) */ 227 228 #if (NB_MMU_MODES >= 6) && defined(MMU_MODE5_SUFFIX) 229 230 #define CPU_MMU_INDEX 5 231 #define MEMSUFFIX MMU_MODE5_SUFFIX 232 #define DATA_SIZE 1 233 #include "exec/cpu_ldst_template.h" 234 235 #define DATA_SIZE 2 236 #include "exec/cpu_ldst_template.h" 237 238 #define DATA_SIZE 4 239 #include "exec/cpu_ldst_template.h" 240 241 #define DATA_SIZE 8 242 #include "exec/cpu_ldst_template.h" 243 #undef CPU_MMU_INDEX 244 #undef MEMSUFFIX 245 #endif /* (NB_MMU_MODES >= 6) */ 246 247 #if (NB_MMU_MODES >= 7) && defined(MMU_MODE6_SUFFIX) 248 249 #define CPU_MMU_INDEX 6 250 #define MEMSUFFIX MMU_MODE6_SUFFIX 251 #define DATA_SIZE 1 252 #include "exec/cpu_ldst_template.h" 253 254 #define DATA_SIZE 2 255 #include "exec/cpu_ldst_template.h" 256 257 #define DATA_SIZE 4 258 #include "exec/cpu_ldst_template.h" 259 260 #define DATA_SIZE 8 261 #include "exec/cpu_ldst_template.h" 262 #undef CPU_MMU_INDEX 263 #undef MEMSUFFIX 264 #endif /* (NB_MMU_MODES >= 7) */ 265 266 #if (NB_MMU_MODES >= 8) && defined(MMU_MODE7_SUFFIX) 267 268 #define CPU_MMU_INDEX 7 269 #define MEMSUFFIX MMU_MODE7_SUFFIX 270 #define DATA_SIZE 1 271 #include "exec/cpu_ldst_template.h" 272 273 #define DATA_SIZE 2 274 #include "exec/cpu_ldst_template.h" 275 276 #define DATA_SIZE 4 277 #include "exec/cpu_ldst_template.h" 278 279 #define DATA_SIZE 8 280 #include "exec/cpu_ldst_template.h" 281 #undef CPU_MMU_INDEX 282 #undef MEMSUFFIX 283 #endif /* (NB_MMU_MODES >= 8) */ 284 285 #if (NB_MMU_MODES >= 9) && defined(MMU_MODE8_SUFFIX) 286 287 #define CPU_MMU_INDEX 8 288 #define MEMSUFFIX MMU_MODE8_SUFFIX 289 #define DATA_SIZE 1 290 #include "exec/cpu_ldst_template.h" 291 292 #define DATA_SIZE 2 293 #include "exec/cpu_ldst_template.h" 294 295 #define DATA_SIZE 4 296 #include "exec/cpu_ldst_template.h" 297 298 #define DATA_SIZE 8 299 #include "exec/cpu_ldst_template.h" 300 #undef CPU_MMU_INDEX 301 #undef MEMSUFFIX 302 #endif /* (NB_MMU_MODES >= 9) */ 303 304 #if (NB_MMU_MODES >= 10) && defined(MMU_MODE9_SUFFIX) 305 306 #define CPU_MMU_INDEX 9 307 #define MEMSUFFIX MMU_MODE9_SUFFIX 308 #define DATA_SIZE 1 309 #include "exec/cpu_ldst_template.h" 310 311 #define DATA_SIZE 2 312 #include "exec/cpu_ldst_template.h" 313 314 #define DATA_SIZE 4 315 #include "exec/cpu_ldst_template.h" 316 317 #define DATA_SIZE 8 318 #include "exec/cpu_ldst_template.h" 319 #undef CPU_MMU_INDEX 320 #undef MEMSUFFIX 321 #endif /* (NB_MMU_MODES >= 10) */ 322 323 #if (NB_MMU_MODES >= 11) && defined(MMU_MODE10_SUFFIX) 324 325 #define CPU_MMU_INDEX 10 326 #define MEMSUFFIX MMU_MODE10_SUFFIX 327 #define DATA_SIZE 1 328 #include "exec/cpu_ldst_template.h" 329 330 #define DATA_SIZE 2 331 #include "exec/cpu_ldst_template.h" 332 333 #define DATA_SIZE 4 334 #include "exec/cpu_ldst_template.h" 335 336 #define DATA_SIZE 8 337 #include "exec/cpu_ldst_template.h" 338 #undef CPU_MMU_INDEX 339 #undef MEMSUFFIX 340 #endif /* (NB_MMU_MODES >= 11) */ 341 342 #if (NB_MMU_MODES >= 12) && defined(MMU_MODE11_SUFFIX) 343 344 #define CPU_MMU_INDEX 11 345 #define MEMSUFFIX MMU_MODE11_SUFFIX 346 #define DATA_SIZE 1 347 #include "exec/cpu_ldst_template.h" 348 349 #define DATA_SIZE 2 350 #include "exec/cpu_ldst_template.h" 351 352 #define DATA_SIZE 4 353 #include "exec/cpu_ldst_template.h" 354 355 #define DATA_SIZE 8 356 #include "exec/cpu_ldst_template.h" 357 #undef CPU_MMU_INDEX 358 #undef MEMSUFFIX 359 #endif /* (NB_MMU_MODES >= 12) */ 360 361 #if (NB_MMU_MODES > 12) 362 #error "NB_MMU_MODES > 12 is not supported for now" 363 #endif /* (NB_MMU_MODES > 12) */ 364 365 /* these access are slower, they must be as rare as possible */ 366 #define CPU_MMU_INDEX (cpu_mmu_index(env)) 367 #define MEMSUFFIX _data 368 #define DATA_SIZE 1 369 #include "exec/cpu_ldst_template.h" 370 371 #define DATA_SIZE 2 372 #include "exec/cpu_ldst_template.h" 373 374 #define DATA_SIZE 4 375 #include "exec/cpu_ldst_template.h" 376 377 #define DATA_SIZE 8 378 #include "exec/cpu_ldst_template.h" 379 #undef CPU_MMU_INDEX 380 #undef MEMSUFFIX 381 382 #define CPU_MMU_INDEX (cpu_mmu_index(env)) 383 #define MEMSUFFIX _code 384 #define SOFTMMU_CODE_ACCESS 385 386 #define DATA_SIZE 1 387 #include "exec/cpu_ldst_template.h" 388 389 #define DATA_SIZE 2 390 #include "exec/cpu_ldst_template.h" 391 392 #define DATA_SIZE 4 393 #include "exec/cpu_ldst_template.h" 394 395 #define DATA_SIZE 8 396 #include "exec/cpu_ldst_template.h" 397 398 #undef CPU_MMU_INDEX 399 #undef MEMSUFFIX 400 #undef SOFTMMU_CODE_ACCESS 401 402 #endif /* defined(CONFIG_USER_ONLY) */ 403 404 /** 405 * tlb_vaddr_to_host: 406 * @env: CPUArchState 407 * @addr: guest virtual address to look up 408 * @access_type: 0 for read, 1 for write, 2 for execute 409 * @mmu_idx: MMU index to use for lookup 410 * 411 * Look up the specified guest virtual index in the TCG softmmu TLB. 412 * If the TLB contains a host virtual address suitable for direct RAM 413 * access, then return it. Otherwise (TLB miss, TLB entry is for an 414 * I/O access, etc) return NULL. 415 * 416 * This is the equivalent of the initial fast-path code used by 417 * TCG backends for guest load and store accesses. 418 */ 419 static inline void *tlb_vaddr_to_host(CPUArchState *env, target_ulong addr, 420 int access_type, int mmu_idx) 421 { 422 #if defined(CONFIG_USER_ONLY) 423 return g2h(vaddr); 424 #else 425 int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); 426 CPUTLBEntry *tlbentry = &env->tlb_table[mmu_idx][index]; 427 target_ulong tlb_addr; 428 uintptr_t haddr; 429 430 switch (access_type) { 431 case 0: 432 tlb_addr = tlbentry->addr_read; 433 break; 434 case 1: 435 tlb_addr = tlbentry->addr_write; 436 break; 437 case 2: 438 tlb_addr = tlbentry->addr_code; 439 break; 440 default: 441 g_assert_not_reached(); 442 } 443 444 if ((addr & TARGET_PAGE_MASK) 445 != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { 446 /* TLB entry is for a different page */ 447 return NULL; 448 } 449 450 if (tlb_addr & ~TARGET_PAGE_MASK) { 451 /* IO access */ 452 return NULL; 453 } 454 455 haddr = addr + env->tlb_table[mmu_idx][index].addend; 456 return (void *)haddr; 457 #endif /* defined(CONFIG_USER_ONLY) */ 458 } 459 460 #endif /* CPU_LDST_H */ 461