1022c62cbSPaolo Bonzini /* 2022c62cbSPaolo Bonzini * common defines for all CPUs 3022c62cbSPaolo Bonzini * 4022c62cbSPaolo Bonzini * Copyright (c) 2003 Fabrice Bellard 5022c62cbSPaolo Bonzini * 6022c62cbSPaolo Bonzini * This library is free software; you can redistribute it and/or 7022c62cbSPaolo Bonzini * modify it under the terms of the GNU Lesser General Public 8022c62cbSPaolo Bonzini * License as published by the Free Software Foundation; either 9d6ea4236SChetan Pant * version 2.1 of the License, or (at your option) any later version. 10022c62cbSPaolo Bonzini * 11022c62cbSPaolo Bonzini * This library is distributed in the hope that it will be useful, 12022c62cbSPaolo Bonzini * but WITHOUT ANY WARRANTY; without even the implied warranty of 13022c62cbSPaolo Bonzini * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14022c62cbSPaolo Bonzini * Lesser General Public License for more details. 15022c62cbSPaolo Bonzini * 16022c62cbSPaolo Bonzini * You should have received a copy of the GNU Lesser General Public 17022c62cbSPaolo Bonzini * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18022c62cbSPaolo Bonzini */ 19022c62cbSPaolo Bonzini #ifndef CPU_DEFS_H 20022c62cbSPaolo Bonzini #define CPU_DEFS_H 21022c62cbSPaolo Bonzini 22*7d7a21baSPhilippe Mathieu-Daudé #ifndef COMPILING_PER_TARGET 23022c62cbSPaolo Bonzini #error cpu.h included from common code 24022c62cbSPaolo Bonzini #endif 25022c62cbSPaolo Bonzini 2687776ab7SPaolo Bonzini #include "qemu/host-utils.h" 2771aec354SEmilio G. Cota #include "qemu/thread.h" 28ce927ed9SAndreas Färber #ifndef CONFIG_USER_ONLY 29022c62cbSPaolo Bonzini #include "exec/hwaddr.h" 30ce927ed9SAndreas Färber #endif 31fadc1cbeSPeter Maydell #include "exec/memattrs.h" 322e5b09fdSMarkus Armbruster #include "hw/core/cpu.h" 33022c62cbSPaolo Bonzini 3474433bf0SRichard Henderson #include "cpu-param.h" 3574433bf0SRichard Henderson 36022c62cbSPaolo Bonzini #ifndef TARGET_LONG_BITS 3774433bf0SRichard Henderson # error TARGET_LONG_BITS must be defined in cpu-param.h 3874433bf0SRichard Henderson #endif 3974433bf0SRichard Henderson #ifndef TARGET_PHYS_ADDR_SPACE_BITS 4074433bf0SRichard Henderson # error TARGET_PHYS_ADDR_SPACE_BITS must be defined in cpu-param.h 4174433bf0SRichard Henderson #endif 4274433bf0SRichard Henderson #ifndef TARGET_VIRT_ADDR_SPACE_BITS 4374433bf0SRichard Henderson # error TARGET_VIRT_ADDR_SPACE_BITS must be defined in cpu-param.h 4474433bf0SRichard Henderson #endif 4574433bf0SRichard Henderson #ifndef TARGET_PAGE_BITS 4674433bf0SRichard Henderson # ifdef TARGET_PAGE_BITS_VARY 4774433bf0SRichard Henderson # ifndef TARGET_PAGE_BITS_MIN 4874433bf0SRichard Henderson # error TARGET_PAGE_BITS_MIN must be defined in cpu-param.h 4974433bf0SRichard Henderson # endif 5074433bf0SRichard Henderson # else 5174433bf0SRichard Henderson # error TARGET_PAGE_BITS must be defined in cpu-param.h 5274433bf0SRichard Henderson # endif 53022c62cbSPaolo Bonzini #endif 54022c62cbSPaolo Bonzini 554692a86fSAlex Bennée #include "exec/target_long.h" 56022c62cbSPaolo Bonzini 57708906dcSPhilippe Mathieu-Daudé #if defined(CONFIG_SOFTMMU) && defined(CONFIG_TCG) 5886e1eff8SEmilio G. Cota #define CPU_TLB_DYN_MIN_BITS 6 5986e1eff8SEmilio G. Cota #define CPU_TLB_DYN_DEFAULT_BITS 8 6086e1eff8SEmilio G. Cota 6186e1eff8SEmilio G. Cota # if HOST_LONG_BITS == 32 6286e1eff8SEmilio G. Cota /* Make sure we do not require a double-word shift for the TLB load */ 6386e1eff8SEmilio G. Cota # define CPU_TLB_DYN_MAX_BITS (32 - TARGET_PAGE_BITS) 6486e1eff8SEmilio G. Cota # else /* HOST_LONG_BITS == 64 */ 6586e1eff8SEmilio G. Cota /* 6686e1eff8SEmilio G. Cota * Assuming TARGET_PAGE_BITS==12, with 2**22 entries we can cover 2**(22+12) == 6786e1eff8SEmilio G. Cota * 2**34 == 16G of address space. This is roughly what one would expect a 6886e1eff8SEmilio G. Cota * TLB to cover in a modern (as of 2018) x86_64 CPU. For instance, Intel 6986e1eff8SEmilio G. Cota * Skylake's Level-2 STLB has 16 1G entries. 7086e1eff8SEmilio G. Cota * Also, make sure we do not size the TLB past the guest's address space. 7186e1eff8SEmilio G. Cota */ 72f9919116SEric Blake # ifdef TARGET_PAGE_BITS_VARY 7386e1eff8SEmilio G. Cota # define CPU_TLB_DYN_MAX_BITS \ 7486e1eff8SEmilio G. Cota MIN(22, TARGET_VIRT_ADDR_SPACE_BITS - TARGET_PAGE_BITS) 75f9919116SEric Blake # else 76f9919116SEric Blake # define CPU_TLB_DYN_MAX_BITS \ 77f9919116SEric Blake MIN_CONST(22, TARGET_VIRT_ADDR_SPACE_BITS - TARGET_PAGE_BITS) 78f9919116SEric Blake # endif 7986e1eff8SEmilio G. Cota # endif 8086e1eff8SEmilio G. Cota 81708906dcSPhilippe Mathieu-Daudé #endif /* CONFIG_SOFTMMU && CONFIG_TCG */ 824cb884e9SFabiano Rosas 83022c62cbSPaolo Bonzini #endif 84