1 #ifndef CPU_COMMON_H 2 #define CPU_COMMON_H 3 4 /* CPU interfaces that are target independent. */ 5 6 #ifndef CONFIG_USER_ONLY 7 #include "exec/hwaddr.h" 8 #endif 9 10 #define EXCP_INTERRUPT 0x10000 /* async interruption */ 11 #define EXCP_HLT 0x10001 /* hlt instruction reached */ 12 #define EXCP_DEBUG 0x10002 /* cpu stopped after a breakpoint or singlestep */ 13 #define EXCP_HALTED 0x10003 /* cpu is halted (waiting for external event) */ 14 #define EXCP_YIELD 0x10004 /* cpu wants to yield timeslice to another */ 15 #define EXCP_ATOMIC 0x10005 /* stop-the-world and emulate atomic */ 16 17 /** 18 * vaddr: 19 * Type wide enough to contain any #target_ulong virtual address. 20 */ 21 typedef uint64_t vaddr; 22 #define VADDR_PRId PRId64 23 #define VADDR_PRIu PRIu64 24 #define VADDR_PRIo PRIo64 25 #define VADDR_PRIx PRIx64 26 #define VADDR_PRIX PRIX64 27 #define VADDR_MAX UINT64_MAX 28 29 void cpu_exec_init_all(void); 30 void cpu_exec_step_atomic(CPUState *cpu); 31 32 /* Using intptr_t ensures that qemu_*_page_mask is sign-extended even 33 * when intptr_t is 32-bit and we are aligning a long long. 34 */ 35 extern uintptr_t qemu_host_page_size; 36 extern intptr_t qemu_host_page_mask; 37 38 #define HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_host_page_size) 39 #define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_size()) 40 41 /* The CPU list lock nests outside page_(un)lock or mmap_(un)lock */ 42 extern QemuMutex qemu_cpu_list_lock; 43 void qemu_init_cpu_list(void); 44 void cpu_list_lock(void); 45 void cpu_list_unlock(void); 46 unsigned int cpu_list_generation_id_get(void); 47 48 void tcg_flush_softmmu_tlb(CPUState *cs); 49 50 void tcg_iommu_init_notifier_list(CPUState *cpu); 51 void tcg_iommu_free_notifier_list(CPUState *cpu); 52 53 #if !defined(CONFIG_USER_ONLY) 54 55 enum device_endian { 56 DEVICE_NATIVE_ENDIAN, 57 DEVICE_BIG_ENDIAN, 58 DEVICE_LITTLE_ENDIAN, 59 }; 60 61 #if HOST_BIG_ENDIAN 62 #define DEVICE_HOST_ENDIAN DEVICE_BIG_ENDIAN 63 #else 64 #define DEVICE_HOST_ENDIAN DEVICE_LITTLE_ENDIAN 65 #endif 66 67 /* address in the RAM (different from a physical address) */ 68 #if defined(CONFIG_XEN_BACKEND) 69 typedef uint64_t ram_addr_t; 70 # define RAM_ADDR_MAX UINT64_MAX 71 # define RAM_ADDR_FMT "%" PRIx64 72 #else 73 typedef uintptr_t ram_addr_t; 74 # define RAM_ADDR_MAX UINTPTR_MAX 75 # define RAM_ADDR_FMT "%" PRIxPTR 76 #endif 77 78 /* memory API */ 79 80 void qemu_ram_remap(ram_addr_t addr, ram_addr_t length); 81 /* This should not be used by devices. */ 82 ram_addr_t qemu_ram_addr_from_host(void *ptr); 83 ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr); 84 RAMBlock *qemu_ram_block_by_name(const char *name); 85 86 /* 87 * Translates a host ptr back to a RAMBlock and an offset in that RAMBlock. 88 * 89 * @ptr: The host pointer to translate. 90 * @round_offset: Whether to round the result offset down to a target page 91 * @offset: Will be set to the offset within the returned RAMBlock. 92 * 93 * Returns: RAMBlock (or NULL if not found) 94 * 95 * By the time this function returns, the returned pointer is not protected 96 * by RCU anymore. If the caller is not within an RCU critical section and 97 * does not hold the iothread lock, it must have other means of protecting the 98 * pointer, such as a reference to the memory region that owns the RAMBlock. 99 */ 100 RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset, 101 ram_addr_t *offset); 102 ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host); 103 void qemu_ram_set_idstr(RAMBlock *block, const char *name, DeviceState *dev); 104 void qemu_ram_unset_idstr(RAMBlock *block); 105 const char *qemu_ram_get_idstr(RAMBlock *rb); 106 void *qemu_ram_get_host_addr(RAMBlock *rb); 107 ram_addr_t qemu_ram_get_offset(RAMBlock *rb); 108 ram_addr_t qemu_ram_get_used_length(RAMBlock *rb); 109 ram_addr_t qemu_ram_get_max_length(RAMBlock *rb); 110 bool qemu_ram_is_shared(RAMBlock *rb); 111 bool qemu_ram_is_noreserve(RAMBlock *rb); 112 bool qemu_ram_is_uf_zeroable(RAMBlock *rb); 113 void qemu_ram_set_uf_zeroable(RAMBlock *rb); 114 bool qemu_ram_is_migratable(RAMBlock *rb); 115 void qemu_ram_set_migratable(RAMBlock *rb); 116 void qemu_ram_unset_migratable(RAMBlock *rb); 117 bool qemu_ram_is_named_file(RAMBlock *rb); 118 int qemu_ram_get_fd(RAMBlock *rb); 119 120 size_t qemu_ram_pagesize(RAMBlock *block); 121 size_t qemu_ram_pagesize_largest(void); 122 123 /** 124 * cpu_address_space_init: 125 * @cpu: CPU to add this address space to 126 * @asidx: integer index of this address space 127 * @prefix: prefix to be used as name of address space 128 * @mr: the root memory region of address space 129 * 130 * Add the specified address space to the CPU's cpu_ases list. 131 * The address space added with @asidx 0 is the one used for the 132 * convenience pointer cpu->as. 133 * The target-specific code which registers ASes is responsible 134 * for defining what semantics address space 0, 1, 2, etc have. 135 * 136 * Before the first call to this function, the caller must set 137 * cpu->num_ases to the total number of address spaces it needs 138 * to support. 139 * 140 * Note that with KVM only one address space is supported. 141 */ 142 void cpu_address_space_init(CPUState *cpu, int asidx, 143 const char *prefix, MemoryRegion *mr); 144 145 void cpu_physical_memory_rw(hwaddr addr, void *buf, 146 hwaddr len, bool is_write); 147 static inline void cpu_physical_memory_read(hwaddr addr, 148 void *buf, hwaddr len) 149 { 150 cpu_physical_memory_rw(addr, buf, len, false); 151 } 152 static inline void cpu_physical_memory_write(hwaddr addr, 153 const void *buf, hwaddr len) 154 { 155 cpu_physical_memory_rw(addr, (void *)buf, len, true); 156 } 157 void *cpu_physical_memory_map(hwaddr addr, 158 hwaddr *plen, 159 bool is_write); 160 void cpu_physical_memory_unmap(void *buffer, hwaddr len, 161 bool is_write, hwaddr access_len); 162 void cpu_register_map_client(QEMUBH *bh); 163 void cpu_unregister_map_client(QEMUBH *bh); 164 165 bool cpu_physical_memory_is_io(hwaddr phys_addr); 166 167 /* Coalesced MMIO regions are areas where write operations can be reordered. 168 * This usually implies that write operations are side-effect free. This allows 169 * batching which can make a major impact on performance when using 170 * virtualization. 171 */ 172 void qemu_flush_coalesced_mmio_buffer(void); 173 174 void cpu_flush_icache_range(hwaddr start, hwaddr len); 175 176 typedef int (RAMBlockIterFunc)(RAMBlock *rb, void *opaque); 177 178 int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque); 179 int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length); 180 181 #endif 182 183 /* Returns: 0 on success, -1 on error */ 184 int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, 185 void *ptr, size_t len, bool is_write); 186 187 /* vl.c */ 188 void list_cpus(void); 189 190 #ifdef CONFIG_TCG 191 /** 192 * cpu_unwind_state_data: 193 * @cpu: the cpu context 194 * @host_pc: the host pc within the translation 195 * @data: output data 196 * 197 * Attempt to load the the unwind state for a host pc occurring in 198 * translated code. If @host_pc is not in translated code, the 199 * function returns false; otherwise @data is loaded. 200 * This is the same unwind info as given to restore_state_to_opc. 201 */ 202 bool cpu_unwind_state_data(CPUState *cpu, uintptr_t host_pc, uint64_t *data); 203 204 /** 205 * cpu_restore_state: 206 * @cpu: the cpu context 207 * @host_pc: the host pc within the translation 208 * @return: true if state was restored, false otherwise 209 * 210 * Attempt to restore the state for a fault occurring in translated 211 * code. If @host_pc is not in translated code no state is 212 * restored and the function returns false. 213 */ 214 bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc); 215 216 G_NORETURN void cpu_loop_exit_noexc(CPUState *cpu); 217 G_NORETURN void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc); 218 #endif /* CONFIG_TCG */ 219 G_NORETURN void cpu_loop_exit(CPUState *cpu); 220 G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc); 221 222 #endif /* CPU_COMMON_H */ 223