xref: /openbmc/qemu/include/exec/cpu-common.h (revision 8692aa29)
1 #ifndef CPU_COMMON_H
2 #define CPU_COMMON_H 1
3 
4 /* CPU interfaces that are target independent.  */
5 
6 #ifndef CONFIG_USER_ONLY
7 #include "exec/hwaddr.h"
8 #endif
9 
10 #include "qemu/bswap.h"
11 #include "qemu/queue.h"
12 #include "qemu/fprintf-fn.h"
13 
14 /**
15  * CPUListState:
16  * @cpu_fprintf: Print function.
17  * @file: File to print to using @cpu_fprint.
18  *
19  * State commonly used for iterating over CPU models.
20  */
21 typedef struct CPUListState {
22     fprintf_function cpu_fprintf;
23     FILE *file;
24 } CPUListState;
25 
26 typedef enum MMUAccessType {
27     MMU_DATA_LOAD  = 0,
28     MMU_DATA_STORE = 1,
29     MMU_INST_FETCH = 2
30 } MMUAccessType;
31 
32 #if !defined(CONFIG_USER_ONLY)
33 
34 enum device_endian {
35     DEVICE_NATIVE_ENDIAN,
36     DEVICE_BIG_ENDIAN,
37     DEVICE_LITTLE_ENDIAN,
38 };
39 
40 /* address in the RAM (different from a physical address) */
41 #if defined(CONFIG_XEN_BACKEND)
42 typedef uint64_t ram_addr_t;
43 #  define RAM_ADDR_MAX UINT64_MAX
44 #  define RAM_ADDR_FMT "%" PRIx64
45 #else
46 typedef uintptr_t ram_addr_t;
47 #  define RAM_ADDR_MAX UINTPTR_MAX
48 #  define RAM_ADDR_FMT "%" PRIxPTR
49 #endif
50 
51 extern ram_addr_t ram_size;
52 
53 /* memory API */
54 
55 typedef void CPUWriteMemoryFunc(void *opaque, hwaddr addr, uint32_t value);
56 typedef uint32_t CPUReadMemoryFunc(void *opaque, hwaddr addr);
57 
58 void qemu_ram_remap(ram_addr_t addr, ram_addr_t length);
59 /* This should not be used by devices.  */
60 ram_addr_t qemu_ram_addr_from_host(void *ptr);
61 RAMBlock *qemu_ram_block_by_name(const char *name);
62 RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset,
63                                    ram_addr_t *offset);
64 void qemu_ram_set_idstr(RAMBlock *block, const char *name, DeviceState *dev);
65 void qemu_ram_unset_idstr(RAMBlock *block);
66 const char *qemu_ram_get_idstr(RAMBlock *rb);
67 
68 void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
69                             int len, int is_write);
70 static inline void cpu_physical_memory_read(hwaddr addr,
71                                             void *buf, int len)
72 {
73     cpu_physical_memory_rw(addr, buf, len, 0);
74 }
75 static inline void cpu_physical_memory_write(hwaddr addr,
76                                              const void *buf, int len)
77 {
78     cpu_physical_memory_rw(addr, (void *)buf, len, 1);
79 }
80 void *cpu_physical_memory_map(hwaddr addr,
81                               hwaddr *plen,
82                               int is_write);
83 void cpu_physical_memory_unmap(void *buffer, hwaddr len,
84                                int is_write, hwaddr access_len);
85 void cpu_register_map_client(QEMUBH *bh);
86 void cpu_unregister_map_client(QEMUBH *bh);
87 
88 bool cpu_physical_memory_is_io(hwaddr phys_addr);
89 
90 /* Coalesced MMIO regions are areas where write operations can be reordered.
91  * This usually implies that write operations are side-effect free.  This allows
92  * batching which can make a major impact on performance when using
93  * virtualization.
94  */
95 void qemu_flush_coalesced_mmio_buffer(void);
96 
97 uint32_t ldub_phys(AddressSpace *as, hwaddr addr);
98 uint32_t lduw_le_phys(AddressSpace *as, hwaddr addr);
99 uint32_t lduw_be_phys(AddressSpace *as, hwaddr addr);
100 uint32_t ldl_le_phys(AddressSpace *as, hwaddr addr);
101 uint32_t ldl_be_phys(AddressSpace *as, hwaddr addr);
102 uint64_t ldq_le_phys(AddressSpace *as, hwaddr addr);
103 uint64_t ldq_be_phys(AddressSpace *as, hwaddr addr);
104 void stb_phys(AddressSpace *as, hwaddr addr, uint32_t val);
105 void stw_le_phys(AddressSpace *as, hwaddr addr, uint32_t val);
106 void stw_be_phys(AddressSpace *as, hwaddr addr, uint32_t val);
107 void stl_le_phys(AddressSpace *as, hwaddr addr, uint32_t val);
108 void stl_be_phys(AddressSpace *as, hwaddr addr, uint32_t val);
109 void stq_le_phys(AddressSpace *as, hwaddr addr, uint64_t val);
110 void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val);
111 
112 void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr,
113                                    const uint8_t *buf, int len);
114 void cpu_flush_icache_range(hwaddr start, int len);
115 
116 extern struct MemoryRegion io_mem_rom;
117 extern struct MemoryRegion io_mem_notdirty;
118 
119 typedef int (RAMBlockIterFunc)(const char *block_name, void *host_addr,
120     ram_addr_t offset, ram_addr_t length, void *opaque);
121 
122 int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque);
123 
124 #endif
125 
126 #endif /* !CPU_COMMON_H */
127