1 #ifndef CPU_COMMON_H 2 #define CPU_COMMON_H 3 4 /* CPU interfaces that are target independent. */ 5 6 #ifndef CONFIG_USER_ONLY 7 #include "exec/hwaddr.h" 8 #endif 9 10 #define EXCP_INTERRUPT 0x10000 /* async interruption */ 11 #define EXCP_HLT 0x10001 /* hlt instruction reached */ 12 #define EXCP_DEBUG 0x10002 /* cpu stopped after a breakpoint or singlestep */ 13 #define EXCP_HALTED 0x10003 /* cpu is halted (waiting for external event) */ 14 #define EXCP_YIELD 0x10004 /* cpu wants to yield timeslice to another */ 15 #define EXCP_ATOMIC 0x10005 /* stop-the-world and emulate atomic */ 16 17 /** 18 * vaddr: 19 * Type wide enough to contain any #target_ulong virtual address. 20 */ 21 typedef uint64_t vaddr; 22 #define VADDR_PRId PRId64 23 #define VADDR_PRIu PRIu64 24 #define VADDR_PRIo PRIo64 25 #define VADDR_PRIx PRIx64 26 #define VADDR_PRIX PRIX64 27 #define VADDR_MAX UINT64_MAX 28 29 void cpu_exec_init_all(void); 30 void cpu_exec_step_atomic(CPUState *cpu); 31 32 /* Using intptr_t ensures that qemu_*_page_mask is sign-extended even 33 * when intptr_t is 32-bit and we are aligning a long long. 34 */ 35 extern uintptr_t qemu_host_page_size; 36 extern intptr_t qemu_host_page_mask; 37 38 #define HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_host_page_size) 39 #define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_size()) 40 41 /* The CPU list lock nests outside page_(un)lock or mmap_(un)lock */ 42 extern QemuMutex qemu_cpu_list_lock; 43 void qemu_init_cpu_list(void); 44 void cpu_list_lock(void); 45 void cpu_list_unlock(void); 46 unsigned int cpu_list_generation_id_get(void); 47 48 void tcg_flush_softmmu_tlb(CPUState *cs); 49 void tcg_flush_jmp_cache(CPUState *cs); 50 51 void tcg_iommu_init_notifier_list(CPUState *cpu); 52 void tcg_iommu_free_notifier_list(CPUState *cpu); 53 54 #if !defined(CONFIG_USER_ONLY) 55 56 enum device_endian { 57 DEVICE_NATIVE_ENDIAN, 58 DEVICE_BIG_ENDIAN, 59 DEVICE_LITTLE_ENDIAN, 60 }; 61 62 #if HOST_BIG_ENDIAN 63 #define DEVICE_HOST_ENDIAN DEVICE_BIG_ENDIAN 64 #else 65 #define DEVICE_HOST_ENDIAN DEVICE_LITTLE_ENDIAN 66 #endif 67 68 /* address in the RAM (different from a physical address) */ 69 #if defined(CONFIG_XEN_BACKEND) 70 typedef uint64_t ram_addr_t; 71 # define RAM_ADDR_MAX UINT64_MAX 72 # define RAM_ADDR_FMT "%" PRIx64 73 #else 74 typedef uintptr_t ram_addr_t; 75 # define RAM_ADDR_MAX UINTPTR_MAX 76 # define RAM_ADDR_FMT "%" PRIxPTR 77 #endif 78 79 /* memory API */ 80 81 void qemu_ram_remap(ram_addr_t addr, ram_addr_t length); 82 /* This should not be used by devices. */ 83 ram_addr_t qemu_ram_addr_from_host(void *ptr); 84 ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr); 85 RAMBlock *qemu_ram_block_by_name(const char *name); 86 87 /* 88 * Translates a host ptr back to a RAMBlock and an offset in that RAMBlock. 89 * 90 * @ptr: The host pointer to translate. 91 * @round_offset: Whether to round the result offset down to a target page 92 * @offset: Will be set to the offset within the returned RAMBlock. 93 * 94 * Returns: RAMBlock (or NULL if not found) 95 * 96 * By the time this function returns, the returned pointer is not protected 97 * by RCU anymore. If the caller is not within an RCU critical section and 98 * does not hold the iothread lock, it must have other means of protecting the 99 * pointer, such as a reference to the memory region that owns the RAMBlock. 100 */ 101 RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset, 102 ram_addr_t *offset); 103 ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host); 104 void qemu_ram_set_idstr(RAMBlock *block, const char *name, DeviceState *dev); 105 void qemu_ram_unset_idstr(RAMBlock *block); 106 const char *qemu_ram_get_idstr(RAMBlock *rb); 107 void *qemu_ram_get_host_addr(RAMBlock *rb); 108 ram_addr_t qemu_ram_get_offset(RAMBlock *rb); 109 ram_addr_t qemu_ram_get_used_length(RAMBlock *rb); 110 ram_addr_t qemu_ram_get_max_length(RAMBlock *rb); 111 bool qemu_ram_is_shared(RAMBlock *rb); 112 bool qemu_ram_is_noreserve(RAMBlock *rb); 113 bool qemu_ram_is_uf_zeroable(RAMBlock *rb); 114 void qemu_ram_set_uf_zeroable(RAMBlock *rb); 115 bool qemu_ram_is_migratable(RAMBlock *rb); 116 void qemu_ram_set_migratable(RAMBlock *rb); 117 void qemu_ram_unset_migratable(RAMBlock *rb); 118 bool qemu_ram_is_named_file(RAMBlock *rb); 119 int qemu_ram_get_fd(RAMBlock *rb); 120 121 size_t qemu_ram_pagesize(RAMBlock *block); 122 size_t qemu_ram_pagesize_largest(void); 123 124 /** 125 * cpu_address_space_init: 126 * @cpu: CPU to add this address space to 127 * @asidx: integer index of this address space 128 * @prefix: prefix to be used as name of address space 129 * @mr: the root memory region of address space 130 * 131 * Add the specified address space to the CPU's cpu_ases list. 132 * The address space added with @asidx 0 is the one used for the 133 * convenience pointer cpu->as. 134 * The target-specific code which registers ASes is responsible 135 * for defining what semantics address space 0, 1, 2, etc have. 136 * 137 * Before the first call to this function, the caller must set 138 * cpu->num_ases to the total number of address spaces it needs 139 * to support. 140 * 141 * Note that with KVM only one address space is supported. 142 */ 143 void cpu_address_space_init(CPUState *cpu, int asidx, 144 const char *prefix, MemoryRegion *mr); 145 146 void cpu_physical_memory_rw(hwaddr addr, void *buf, 147 hwaddr len, bool is_write); 148 static inline void cpu_physical_memory_read(hwaddr addr, 149 void *buf, hwaddr len) 150 { 151 cpu_physical_memory_rw(addr, buf, len, false); 152 } 153 static inline void cpu_physical_memory_write(hwaddr addr, 154 const void *buf, hwaddr len) 155 { 156 cpu_physical_memory_rw(addr, (void *)buf, len, true); 157 } 158 void *cpu_physical_memory_map(hwaddr addr, 159 hwaddr *plen, 160 bool is_write); 161 void cpu_physical_memory_unmap(void *buffer, hwaddr len, 162 bool is_write, hwaddr access_len); 163 void cpu_register_map_client(QEMUBH *bh); 164 void cpu_unregister_map_client(QEMUBH *bh); 165 166 bool cpu_physical_memory_is_io(hwaddr phys_addr); 167 168 /* Coalesced MMIO regions are areas where write operations can be reordered. 169 * This usually implies that write operations are side-effect free. This allows 170 * batching which can make a major impact on performance when using 171 * virtualization. 172 */ 173 void qemu_flush_coalesced_mmio_buffer(void); 174 175 void cpu_flush_icache_range(hwaddr start, hwaddr len); 176 177 typedef int (RAMBlockIterFunc)(RAMBlock *rb, void *opaque); 178 179 int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque); 180 int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length); 181 182 #endif 183 184 /* Returns: 0 on success, -1 on error */ 185 int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, 186 void *ptr, size_t len, bool is_write); 187 188 /* vl.c */ 189 void list_cpus(void); 190 191 #ifdef CONFIG_TCG 192 /** 193 * cpu_unwind_state_data: 194 * @cpu: the cpu context 195 * @host_pc: the host pc within the translation 196 * @data: output data 197 * 198 * Attempt to load the the unwind state for a host pc occurring in 199 * translated code. If @host_pc is not in translated code, the 200 * function returns false; otherwise @data is loaded. 201 * This is the same unwind info as given to restore_state_to_opc. 202 */ 203 bool cpu_unwind_state_data(CPUState *cpu, uintptr_t host_pc, uint64_t *data); 204 205 /** 206 * cpu_restore_state: 207 * @cpu: the cpu context 208 * @host_pc: the host pc within the translation 209 * @return: true if state was restored, false otherwise 210 * 211 * Attempt to restore the state for a fault occurring in translated 212 * code. If @host_pc is not in translated code no state is 213 * restored and the function returns false. 214 */ 215 bool cpu_restore_state(CPUState *cpu, uintptr_t host_pc); 216 217 G_NORETURN void cpu_loop_exit_noexc(CPUState *cpu); 218 G_NORETURN void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc); 219 #endif /* CONFIG_TCG */ 220 G_NORETURN void cpu_loop_exit(CPUState *cpu); 221 G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc); 222 223 #endif /* CPU_COMMON_H */ 224