1 #ifndef CPU_COMMON_H 2 #define CPU_COMMON_H 1 3 4 /* CPU interfaces that are target independent. */ 5 6 #ifndef CONFIG_USER_ONLY 7 #include "exec/hwaddr.h" 8 #endif 9 10 #ifndef NEED_CPU_H 11 #include "exec/poison.h" 12 #endif 13 14 #include "qemu/bswap.h" 15 #include "qemu/queue.h" 16 17 /** 18 * CPUListState: 19 * @cpu_fprintf: Print function. 20 * @file: File to print to using @cpu_fprint. 21 * 22 * State commonly used for iterating over CPU models. 23 */ 24 typedef struct CPUListState { 25 fprintf_function cpu_fprintf; 26 FILE *file; 27 } CPUListState; 28 29 typedef enum MMUAccessType { 30 MMU_DATA_LOAD = 0, 31 MMU_DATA_STORE = 1, 32 MMU_INST_FETCH = 2 33 } MMUAccessType; 34 35 #if !defined(CONFIG_USER_ONLY) 36 37 enum device_endian { 38 DEVICE_NATIVE_ENDIAN, 39 DEVICE_BIG_ENDIAN, 40 DEVICE_LITTLE_ENDIAN, 41 }; 42 43 /* address in the RAM (different from a physical address) */ 44 #if defined(CONFIG_XEN_BACKEND) 45 typedef uint64_t ram_addr_t; 46 # define RAM_ADDR_MAX UINT64_MAX 47 # define RAM_ADDR_FMT "%" PRIx64 48 #else 49 typedef uintptr_t ram_addr_t; 50 # define RAM_ADDR_MAX UINTPTR_MAX 51 # define RAM_ADDR_FMT "%" PRIxPTR 52 #endif 53 54 extern ram_addr_t ram_size; 55 56 /* memory API */ 57 58 typedef void CPUWriteMemoryFunc(void *opaque, hwaddr addr, uint32_t value); 59 typedef uint32_t CPUReadMemoryFunc(void *opaque, hwaddr addr); 60 61 void qemu_ram_remap(ram_addr_t addr, ram_addr_t length); 62 /* This should not be used by devices. */ 63 MemoryRegion *qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr); 64 void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev); 65 void qemu_ram_unset_idstr(ram_addr_t addr); 66 67 void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, 68 int len, int is_write); 69 static inline void cpu_physical_memory_read(hwaddr addr, 70 void *buf, int len) 71 { 72 cpu_physical_memory_rw(addr, buf, len, 0); 73 } 74 static inline void cpu_physical_memory_write(hwaddr addr, 75 const void *buf, int len) 76 { 77 cpu_physical_memory_rw(addr, (void *)buf, len, 1); 78 } 79 void *cpu_physical_memory_map(hwaddr addr, 80 hwaddr *plen, 81 int is_write); 82 void cpu_physical_memory_unmap(void *buffer, hwaddr len, 83 int is_write, hwaddr access_len); 84 void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque)); 85 86 bool cpu_physical_memory_is_io(hwaddr phys_addr); 87 88 /* Coalesced MMIO regions are areas where write operations can be reordered. 89 * This usually implies that write operations are side-effect free. This allows 90 * batching which can make a major impact on performance when using 91 * virtualization. 92 */ 93 void qemu_flush_coalesced_mmio_buffer(void); 94 95 uint32_t ldub_phys(AddressSpace *as, hwaddr addr); 96 uint32_t lduw_le_phys(AddressSpace *as, hwaddr addr); 97 uint32_t lduw_be_phys(AddressSpace *as, hwaddr addr); 98 uint32_t ldl_le_phys(AddressSpace *as, hwaddr addr); 99 uint32_t ldl_be_phys(AddressSpace *as, hwaddr addr); 100 uint64_t ldq_le_phys(AddressSpace *as, hwaddr addr); 101 uint64_t ldq_be_phys(AddressSpace *as, hwaddr addr); 102 void stb_phys(AddressSpace *as, hwaddr addr, uint32_t val); 103 void stw_le_phys(AddressSpace *as, hwaddr addr, uint32_t val); 104 void stw_be_phys(AddressSpace *as, hwaddr addr, uint32_t val); 105 void stl_le_phys(AddressSpace *as, hwaddr addr, uint32_t val); 106 void stl_be_phys(AddressSpace *as, hwaddr addr, uint32_t val); 107 void stq_le_phys(AddressSpace *as, hwaddr addr, uint64_t val); 108 void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val); 109 110 #ifdef NEED_CPU_H 111 uint32_t lduw_phys(AddressSpace *as, hwaddr addr); 112 uint32_t ldl_phys(AddressSpace *as, hwaddr addr); 113 uint64_t ldq_phys(AddressSpace *as, hwaddr addr); 114 void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val); 115 void stw_phys(AddressSpace *as, hwaddr addr, uint32_t val); 116 void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val); 117 void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val); 118 #endif 119 120 void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr, 121 const uint8_t *buf, int len); 122 void cpu_flush_icache_range(hwaddr start, int len); 123 124 extern struct MemoryRegion io_mem_rom; 125 extern struct MemoryRegion io_mem_notdirty; 126 127 typedef void (RAMBlockIterFunc)(void *host_addr, 128 ram_addr_t offset, ram_addr_t length, void *opaque); 129 130 void qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque); 131 132 #endif 133 134 #endif /* !CPU_COMMON_H */ 135