xref: /openbmc/qemu/include/exec/cpu-common.h (revision 07a32d6b)
1 #ifndef CPU_COMMON_H
2 #define CPU_COMMON_H 1
3 
4 /* CPU interfaces that are target independent.  */
5 
6 #ifndef CONFIG_USER_ONLY
7 #include "exec/hwaddr.h"
8 #endif
9 
10 #ifndef NEED_CPU_H
11 #include "exec/poison.h"
12 #endif
13 
14 #include "qemu/bswap.h"
15 #include "qemu/queue.h"
16 
17 /**
18  * CPUListState:
19  * @cpu_fprintf: Print function.
20  * @file: File to print to using @cpu_fprint.
21  *
22  * State commonly used for iterating over CPU models.
23  */
24 typedef struct CPUListState {
25     fprintf_function cpu_fprintf;
26     FILE *file;
27 } CPUListState;
28 
29 #if !defined(CONFIG_USER_ONLY)
30 
31 enum device_endian {
32     DEVICE_NATIVE_ENDIAN,
33     DEVICE_BIG_ENDIAN,
34     DEVICE_LITTLE_ENDIAN,
35 };
36 
37 /* address in the RAM (different from a physical address) */
38 #if defined(CONFIG_XEN_BACKEND)
39 typedef uint64_t ram_addr_t;
40 #  define RAM_ADDR_MAX UINT64_MAX
41 #  define RAM_ADDR_FMT "%" PRIx64
42 #else
43 typedef uintptr_t ram_addr_t;
44 #  define RAM_ADDR_MAX UINTPTR_MAX
45 #  define RAM_ADDR_FMT "%" PRIxPTR
46 #endif
47 
48 /* memory API */
49 
50 typedef void CPUWriteMemoryFunc(void *opaque, hwaddr addr, uint32_t value);
51 typedef uint32_t CPUReadMemoryFunc(void *opaque, hwaddr addr);
52 
53 void qemu_ram_remap(ram_addr_t addr, ram_addr_t length);
54 /* This should not be used by devices.  */
55 MemoryRegion *qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr);
56 void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev);
57 void qemu_ram_unset_idstr(ram_addr_t addr);
58 
59 void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
60                             int len, int is_write);
61 static inline void cpu_physical_memory_read(hwaddr addr,
62                                             void *buf, int len)
63 {
64     cpu_physical_memory_rw(addr, buf, len, 0);
65 }
66 static inline void cpu_physical_memory_write(hwaddr addr,
67                                              const void *buf, int len)
68 {
69     cpu_physical_memory_rw(addr, (void *)buf, len, 1);
70 }
71 void *cpu_physical_memory_map(hwaddr addr,
72                               hwaddr *plen,
73                               int is_write);
74 void cpu_physical_memory_unmap(void *buffer, hwaddr len,
75                                int is_write, hwaddr access_len);
76 void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque));
77 
78 bool cpu_physical_memory_is_io(hwaddr phys_addr);
79 
80 /* Coalesced MMIO regions are areas where write operations can be reordered.
81  * This usually implies that write operations are side-effect free.  This allows
82  * batching which can make a major impact on performance when using
83  * virtualization.
84  */
85 void qemu_flush_coalesced_mmio_buffer(void);
86 
87 uint32_t ldub_phys(AddressSpace *as, hwaddr addr);
88 uint32_t lduw_le_phys(AddressSpace *as, hwaddr addr);
89 uint32_t lduw_be_phys(AddressSpace *as, hwaddr addr);
90 uint32_t ldl_le_phys(AddressSpace *as, hwaddr addr);
91 uint32_t ldl_be_phys(AddressSpace *as, hwaddr addr);
92 uint64_t ldq_le_phys(AddressSpace *as, hwaddr addr);
93 uint64_t ldq_be_phys(AddressSpace *as, hwaddr addr);
94 void stb_phys(AddressSpace *as, hwaddr addr, uint32_t val);
95 void stw_le_phys(AddressSpace *as, hwaddr addr, uint32_t val);
96 void stw_be_phys(AddressSpace *as, hwaddr addr, uint32_t val);
97 void stl_le_phys(AddressSpace *as, hwaddr addr, uint32_t val);
98 void stl_be_phys(AddressSpace *as, hwaddr addr, uint32_t val);
99 void stq_le_phys(AddressSpace *as, hwaddr addr, uint64_t val);
100 void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val);
101 
102 #ifdef NEED_CPU_H
103 uint32_t lduw_phys(AddressSpace *as, hwaddr addr);
104 uint32_t ldl_phys(AddressSpace *as, hwaddr addr);
105 uint64_t ldq_phys(AddressSpace *as, hwaddr addr);
106 void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val);
107 void stw_phys(AddressSpace *as, hwaddr addr, uint32_t val);
108 void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val);
109 void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val);
110 #endif
111 
112 void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr,
113                                    const uint8_t *buf, int len);
114 void cpu_flush_icache_range(hwaddr start, int len);
115 
116 extern struct MemoryRegion io_mem_rom;
117 extern struct MemoryRegion io_mem_notdirty;
118 
119 typedef void (RAMBlockIterFunc)(void *host_addr,
120     ram_addr_t offset, ram_addr_t length, void *opaque);
121 
122 void qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque);
123 
124 #endif
125 
126 #endif /* !CPU_COMMON_H */
127