xref: /openbmc/qemu/include/elf.h (revision 8692aa29)
1 #ifndef _QEMU_ELF_H
2 #define _QEMU_ELF_H
3 
4 
5 /* 32-bit ELF base types. */
6 typedef uint32_t Elf32_Addr;
7 typedef uint16_t Elf32_Half;
8 typedef uint32_t Elf32_Off;
9 typedef int32_t  Elf32_Sword;
10 typedef uint32_t Elf32_Word;
11 
12 /* 64-bit ELF base types. */
13 typedef uint64_t Elf64_Addr;
14 typedef uint16_t Elf64_Half;
15 typedef int16_t	 Elf64_SHalf;
16 typedef uint64_t Elf64_Off;
17 typedef int32_t	 Elf64_Sword;
18 typedef uint32_t Elf64_Word;
19 typedef uint64_t Elf64_Xword;
20 typedef int64_t  Elf64_Sxword;
21 
22 /* These constants are for the segment types stored in the image headers */
23 #define PT_NULL    0
24 #define PT_LOAD    1
25 #define PT_DYNAMIC 2
26 #define PT_INTERP  3
27 #define PT_NOTE    4
28 #define PT_SHLIB   5
29 #define PT_PHDR    6
30 #define PT_LOPROC  0x70000000
31 #define PT_HIPROC  0x7fffffff
32 #define PT_MIPS_REGINFO		0x70000000
33 #define PT_MIPS_OPTIONS		0x70000001
34 
35 /* Flags in the e_flags field of the header */
36 /* MIPS architecture level. */
37 #define EF_MIPS_ARCH_1		0x00000000	/* -mips1 code.  */
38 #define EF_MIPS_ARCH_2		0x10000000	/* -mips2 code.  */
39 #define EF_MIPS_ARCH_3		0x20000000	/* -mips3 code.  */
40 #define EF_MIPS_ARCH_4		0x30000000	/* -mips4 code.  */
41 #define EF_MIPS_ARCH_5		0x40000000	/* -mips5 code.  */
42 #define EF_MIPS_ARCH_32		0x50000000	/* MIPS32 code.  */
43 #define EF_MIPS_ARCH_64		0x60000000	/* MIPS64 code.  */
44 
45 /* The ABI of a file. */
46 #define EF_MIPS_ABI_O32		0x00001000	/* O32 ABI.  */
47 #define EF_MIPS_ABI_O64		0x00002000	/* O32 extended for 64 bit.  */
48 
49 #define EF_MIPS_NOREORDER 0x00000001
50 #define EF_MIPS_PIC       0x00000002
51 #define EF_MIPS_CPIC      0x00000004
52 #define EF_MIPS_ABI2		0x00000020
53 #define EF_MIPS_OPTIONS_FIRST	0x00000080
54 #define EF_MIPS_32BITMODE	0x00000100
55 #define EF_MIPS_ABI		0x0000f000
56 #define EF_MIPS_FP64      0x00000200
57 #define EF_MIPS_NAN2008   0x00000400
58 #define EF_MIPS_ARCH      0xf0000000
59 
60 /* These constants define the different elf file types */
61 #define ET_NONE   0
62 #define ET_REL    1
63 #define ET_EXEC   2
64 #define ET_DYN    3
65 #define ET_CORE   4
66 #define ET_LOPROC 0xff00
67 #define ET_HIPROC 0xffff
68 
69 /* These constants define the various ELF target machines */
70 #define EM_NONE  0
71 #define EM_M32   1
72 #define EM_SPARC 2
73 #define EM_386   3
74 #define EM_68K   4
75 #define EM_88K   5
76 #define EM_486   6   /* Perhaps disused */
77 #define EM_860   7
78 
79 #define EM_MIPS		8	/* MIPS R3000 (officially, big-endian only) */
80 
81 #define EM_MIPS_RS4_BE 10	/* MIPS R4000 big-endian */
82 
83 #define EM_PARISC      15	/* HPPA */
84 
85 #define EM_SPARC32PLUS 18	/* Sun's "v8plus" */
86 
87 #define EM_PPC	       20	/* PowerPC */
88 #define EM_PPC64       21       /* PowerPC64 */
89 
90 #define EM_ARM		40		/* ARM */
91 
92 #define EM_SH	       42	/* SuperH */
93 
94 #define EM_SPARCV9     43	/* SPARC v9 64-bit */
95 
96 #define EM_TRICORE      44      /* Infineon TriCore */
97 
98 #define EM_IA_64	50	/* HP/Intel IA-64 */
99 
100 #define EM_X86_64	62	/* AMD x86-64 */
101 
102 #define EM_S390		22	/* IBM S/390 */
103 
104 #define EM_CRIS         76      /* Axis Communications 32-bit embedded processor */
105 
106 #define EM_V850		87	/* NEC v850 */
107 
108 #define EM_H8_300H      47      /* Hitachi H8/300H */
109 #define EM_H8S          48      /* Hitachi H8S     */
110 #define EM_LATTICEMICO32 138    /* LatticeMico32 */
111 
112 #define EM_OPENRISC     92        /* OpenCores OpenRISC */
113 
114 #define EM_UNICORE32    110     /* UniCore32 */
115 
116 /*
117  * This is an interim value that we will use until the committee comes
118  * up with a final number.
119  */
120 #define EM_ALPHA	0x9026
121 
122 /* Bogus old v850 magic number, used by old tools.  */
123 #define EM_CYGNUS_V850	0x9080
124 
125 /*
126  * This is the old interim value for S/390 architecture
127  */
128 #define EM_S390_OLD     0xA390
129 
130 #define EM_MICROBLAZE      189
131 #define EM_MICROBLAZE_OLD  0xBAAB
132 
133 #define EM_XTENSA   94      /* Tensilica Xtensa */
134 
135 #define EM_AARCH64  183
136 
137 #define EM_TILEGX   191 /* TILE-Gx */
138 
139 #define EM_MOXIE           223     /* Moxie processor family */
140 #define EM_MOXIE_OLD       0xFEED
141 
142 /* This is the info that is needed to parse the dynamic section of the file */
143 #define DT_NULL		0
144 #define DT_NEEDED	1
145 #define DT_PLTRELSZ	2
146 #define DT_PLTGOT	3
147 #define DT_HASH		4
148 #define DT_STRTAB	5
149 #define DT_SYMTAB	6
150 #define DT_RELA		7
151 #define DT_RELASZ	8
152 #define DT_RELAENT	9
153 #define DT_STRSZ	10
154 #define DT_SYMENT	11
155 #define DT_INIT		12
156 #define DT_FINI		13
157 #define DT_SONAME	14
158 #define DT_RPATH 	15
159 #define DT_SYMBOLIC	16
160 #define DT_REL	        17
161 #define DT_RELSZ	18
162 #define DT_RELENT	19
163 #define DT_PLTREL	20
164 #define DT_DEBUG	21
165 #define DT_TEXTREL	22
166 #define DT_JMPREL	23
167 #define DT_BINDNOW	24
168 #define DT_INIT_ARRAY	25
169 #define DT_FINI_ARRAY	26
170 #define DT_INIT_ARRAYSZ	27
171 #define DT_FINI_ARRAYSZ	28
172 #define DT_RUNPATH	29
173 #define DT_FLAGS	30
174 #define DT_LOOS		0x6000000d
175 #define DT_HIOS		0x6ffff000
176 #define DT_LOPROC	0x70000000
177 #define DT_HIPROC	0x7fffffff
178 
179 /* DT_ entries which fall between DT_VALRNGLO and DT_VALRNDHI use
180    the d_val field of the Elf*_Dyn structure.  I.e. they contain scalars.  */
181 #define DT_VALRNGLO	0x6ffffd00
182 #define DT_VALRNGHI	0x6ffffdff
183 
184 /* DT_ entries which fall between DT_ADDRRNGLO and DT_ADDRRNGHI use
185    the d_ptr field of the Elf*_Dyn structure.  I.e. they contain pointers.  */
186 #define DT_ADDRRNGLO	0x6ffffe00
187 #define DT_ADDRRNGHI	0x6ffffeff
188 
189 #define	DT_VERSYM	0x6ffffff0
190 #define DT_RELACOUNT	0x6ffffff9
191 #define DT_RELCOUNT	0x6ffffffa
192 #define DT_FLAGS_1	0x6ffffffb
193 #define DT_VERDEF	0x6ffffffc
194 #define DT_VERDEFNUM	0x6ffffffd
195 #define DT_VERNEED	0x6ffffffe
196 #define DT_VERNEEDNUM	0x6fffffff
197 
198 #define DT_MIPS_RLD_VERSION	0x70000001
199 #define DT_MIPS_TIME_STAMP	0x70000002
200 #define DT_MIPS_ICHECKSUM	0x70000003
201 #define DT_MIPS_IVERSION	0x70000004
202 #define DT_MIPS_FLAGS		0x70000005
203   #define RHF_NONE		  0
204   #define RHF_HARDWAY		  1
205   #define RHF_NOTPOT		  2
206 #define DT_MIPS_BASE_ADDRESS	0x70000006
207 #define DT_MIPS_CONFLICT	0x70000008
208 #define DT_MIPS_LIBLIST		0x70000009
209 #define DT_MIPS_LOCAL_GOTNO	0x7000000a
210 #define DT_MIPS_CONFLICTNO	0x7000000b
211 #define DT_MIPS_LIBLISTNO	0x70000010
212 #define DT_MIPS_SYMTABNO	0x70000011
213 #define DT_MIPS_UNREFEXTNO	0x70000012
214 #define DT_MIPS_GOTSYM		0x70000013
215 #define DT_MIPS_HIPAGENO	0x70000014
216 #define DT_MIPS_RLD_MAP		0x70000016
217 
218 /* This info is needed when parsing the symbol table */
219 #define STB_LOCAL  0
220 #define STB_GLOBAL 1
221 #define STB_WEAK   2
222 
223 #define STT_NOTYPE  0
224 #define STT_OBJECT  1
225 #define STT_FUNC    2
226 #define STT_SECTION 3
227 #define STT_FILE    4
228 
229 #define ELF_ST_BIND(x)		((x) >> 4)
230 #define ELF_ST_TYPE(x)		(((unsigned int) x) & 0xf)
231 #define ELF_ST_INFO(bind, type) (((bind) << 4) | ((type) & 0xf))
232 #define ELF32_ST_BIND(x)	ELF_ST_BIND(x)
233 #define ELF32_ST_TYPE(x)	ELF_ST_TYPE(x)
234 #define ELF64_ST_BIND(x)	ELF_ST_BIND(x)
235 #define ELF64_ST_TYPE(x)	ELF_ST_TYPE(x)
236 
237 /* Symbolic values for the entries in the auxiliary table
238    put on the initial stack */
239 #define AT_NULL   0	/* end of vector */
240 #define AT_IGNORE 1	/* entry should be ignored */
241 #define AT_EXECFD 2	/* file descriptor of program */
242 #define AT_PHDR   3	/* program headers for program */
243 #define AT_PHENT  4	/* size of program header entry */
244 #define AT_PHNUM  5	/* number of program headers */
245 #define AT_PAGESZ 6	/* system page size */
246 #define AT_BASE   7	/* base address of interpreter */
247 #define AT_FLAGS  8	/* flags */
248 #define AT_ENTRY  9	/* entry point of program */
249 #define AT_NOTELF 10	/* program is not ELF */
250 #define AT_UID    11	/* real uid */
251 #define AT_EUID   12	/* effective uid */
252 #define AT_GID    13	/* real gid */
253 #define AT_EGID   14	/* effective gid */
254 #define AT_PLATFORM 15  /* string identifying CPU for optimizations */
255 #define AT_HWCAP  16    /* arch dependent hints at CPU capabilities */
256 #define AT_CLKTCK 17	/* frequency at which times() increments */
257 #define AT_FPUCW  18	/* info about fpu initialization by kernel */
258 #define AT_DCACHEBSIZE	19	/* data cache block size */
259 #define AT_ICACHEBSIZE	20	/* instruction cache block size */
260 #define AT_UCACHEBSIZE	21	/* unified cache block size */
261 #define AT_IGNOREPPC	22	/* ppc only; entry should be ignored */
262 #define AT_SECURE	23	/* boolean, was exec suid-like? */
263 #define AT_BASE_PLATFORM 24	/* string identifying real platforms */
264 #define AT_RANDOM	25	/* address of 16 random bytes */
265 #define AT_HWCAP2       26      /* extension of AT_HWCAP */
266 #define AT_EXECFN	31	/* filename of the executable */
267 #define AT_SYSINFO	32	/* address of kernel entry point */
268 #define AT_SYSINFO_EHDR	33	/* address of kernel vdso */
269 #define AT_L1I_CACHESHAPE 34	/* shapes of the caches: */
270 #define AT_L1D_CACHESHAPE 35	/*   bits 0-3: cache associativity.  */
271 #define AT_L2_CACHESHAPE  36	/*   bits 4-7: log2 of line size.  */
272 #define AT_L3_CACHESHAPE  37	/*   val&~255: cache size.  */
273 
274 typedef struct dynamic{
275   Elf32_Sword d_tag;
276   union{
277     Elf32_Sword	d_val;
278     Elf32_Addr	d_ptr;
279   } d_un;
280 } Elf32_Dyn;
281 
282 typedef struct {
283   Elf64_Sxword d_tag;		/* entry tag value */
284   union {
285     Elf64_Xword d_val;
286     Elf64_Addr d_ptr;
287   } d_un;
288 } Elf64_Dyn;
289 
290 /* The following are used with relocations */
291 #define ELF32_R_SYM(x) ((x) >> 8)
292 #define ELF32_R_TYPE(x) ((x) & 0xff)
293 
294 #define ELF64_R_SYM(i)			((i) >> 32)
295 #define ELF64_R_TYPE(i)			((i) & 0xffffffff)
296 #define ELF64_R_TYPE_DATA(i)            (((ELF64_R_TYPE(i) >> 8) ^ 0x00800000) - 0x00800000)
297 
298 #define R_386_NONE	0
299 #define R_386_32	1
300 #define R_386_PC32	2
301 #define R_386_GOT32	3
302 #define R_386_PLT32	4
303 #define R_386_COPY	5
304 #define R_386_GLOB_DAT	6
305 #define R_386_JMP_SLOT	7
306 #define R_386_RELATIVE	8
307 #define R_386_GOTOFF	9
308 #define R_386_GOTPC	10
309 #define R_386_NUM	11
310 /* Not a dynamic reloc, so not included in R_386_NUM.  Used in TCG.  */
311 #define R_386_PC8	23
312 
313 #define R_MIPS_NONE		0
314 #define R_MIPS_16		1
315 #define R_MIPS_32		2
316 #define R_MIPS_REL32		3
317 #define R_MIPS_26		4
318 #define R_MIPS_HI16		5
319 #define R_MIPS_LO16		6
320 #define R_MIPS_GPREL16		7
321 #define R_MIPS_LITERAL		8
322 #define R_MIPS_GOT16		9
323 #define R_MIPS_PC16		10
324 #define R_MIPS_CALL16		11
325 #define R_MIPS_GPREL32		12
326 /* The remaining relocs are defined on Irix, although they are not
327    in the MIPS ELF ABI.  */
328 #define R_MIPS_UNUSED1		13
329 #define R_MIPS_UNUSED2		14
330 #define R_MIPS_UNUSED3		15
331 #define R_MIPS_SHIFT5		16
332 #define R_MIPS_SHIFT6		17
333 #define R_MIPS_64		18
334 #define R_MIPS_GOT_DISP		19
335 #define R_MIPS_GOT_PAGE		20
336 #define R_MIPS_GOT_OFST		21
337 /*
338  * The following two relocation types are specified in the MIPS ABI
339  * conformance guide version 1.2 but not yet in the psABI.
340  */
341 #define R_MIPS_GOTHI16		22
342 #define R_MIPS_GOTLO16		23
343 #define R_MIPS_SUB		24
344 #define R_MIPS_INSERT_A		25
345 #define R_MIPS_INSERT_B		26
346 #define R_MIPS_DELETE		27
347 #define R_MIPS_HIGHER		28
348 #define R_MIPS_HIGHEST		29
349 /*
350  * The following two relocation types are specified in the MIPS ABI
351  * conformance guide version 1.2 but not yet in the psABI.
352  */
353 #define R_MIPS_CALLHI16		30
354 #define R_MIPS_CALLLO16		31
355 /*
356  * This range is reserved for vendor specific relocations.
357  */
358 #define R_MIPS_LOVENDOR		100
359 #define R_MIPS_HIVENDOR		127
360 
361 
362 /* SUN SPARC specific definitions.  */
363 
364 /* Values for Elf64_Ehdr.e_flags.  */
365 
366 #define EF_SPARCV9_MM           3
367 #define EF_SPARCV9_TSO          0
368 #define EF_SPARCV9_PSO          1
369 #define EF_SPARCV9_RMO          2
370 #define EF_SPARC_LEDATA         0x800000 /* little endian data */
371 #define EF_SPARC_EXT_MASK       0xFFFF00
372 #define EF_SPARC_32PLUS         0x000100 /* generic V8+ features */
373 #define EF_SPARC_SUN_US1        0x000200 /* Sun UltraSPARC1 extensions */
374 #define EF_SPARC_HAL_R1         0x000400 /* HAL R1 extensions */
375 #define EF_SPARC_SUN_US3        0x000800 /* Sun UltraSPARCIII extensions */
376 
377 /*
378  * Sparc ELF relocation types
379  */
380 #define	R_SPARC_NONE		0
381 #define	R_SPARC_8		1
382 #define	R_SPARC_16		2
383 #define	R_SPARC_32		3
384 #define	R_SPARC_DISP8		4
385 #define	R_SPARC_DISP16		5
386 #define	R_SPARC_DISP32		6
387 #define	R_SPARC_WDISP30		7
388 #define	R_SPARC_WDISP22		8
389 #define	R_SPARC_HI22		9
390 #define	R_SPARC_22		10
391 #define	R_SPARC_13		11
392 #define	R_SPARC_LO10		12
393 #define	R_SPARC_GOT10		13
394 #define	R_SPARC_GOT13		14
395 #define	R_SPARC_GOT22		15
396 #define	R_SPARC_PC10		16
397 #define	R_SPARC_PC22		17
398 #define	R_SPARC_WPLT30		18
399 #define	R_SPARC_COPY		19
400 #define	R_SPARC_GLOB_DAT	20
401 #define	R_SPARC_JMP_SLOT	21
402 #define	R_SPARC_RELATIVE	22
403 #define	R_SPARC_UA32		23
404 #define R_SPARC_PLT32		24
405 #define R_SPARC_HIPLT22		25
406 #define R_SPARC_LOPLT10		26
407 #define R_SPARC_PCPLT32		27
408 #define R_SPARC_PCPLT22		28
409 #define R_SPARC_PCPLT10		29
410 #define R_SPARC_10		30
411 #define R_SPARC_11		31
412 #define R_SPARC_64		32
413 #define R_SPARC_OLO10           33
414 #define R_SPARC_HH22            34
415 #define R_SPARC_HM10            35
416 #define R_SPARC_LM22            36
417 #define R_SPARC_WDISP16		40
418 #define R_SPARC_WDISP19		41
419 #define R_SPARC_7		43
420 #define R_SPARC_5		44
421 #define R_SPARC_6		45
422 
423 /* Bits present in AT_HWCAP for ARM.  */
424 
425 #define HWCAP_ARM_SWP           (1 << 0)
426 #define HWCAP_ARM_HALF          (1 << 1)
427 #define HWCAP_ARM_THUMB         (1 << 2)
428 #define HWCAP_ARM_26BIT         (1 << 3)
429 #define HWCAP_ARM_FAST_MULT     (1 << 4)
430 #define HWCAP_ARM_FPA           (1 << 5)
431 #define HWCAP_ARM_VFP           (1 << 6)
432 #define HWCAP_ARM_EDSP          (1 << 7)
433 #define HWCAP_ARM_JAVA          (1 << 8)
434 #define HWCAP_ARM_IWMMXT        (1 << 9)
435 #define HWCAP_ARM_CRUNCH        (1 << 10)
436 #define HWCAP_ARM_THUMBEE       (1 << 11)
437 #define HWCAP_ARM_NEON          (1 << 12)
438 #define HWCAP_ARM_VFPv3         (1 << 13)
439 #define HWCAP_ARM_VFPv3D16      (1 << 14)       /* also set for VFPv4-D16 */
440 #define HWCAP_ARM_TLS           (1 << 15)
441 #define HWCAP_ARM_VFPv4         (1 << 16)
442 #define HWCAP_ARM_IDIVA         (1 << 17)
443 #define HWCAP_ARM_IDIVT         (1 << 18)
444 #define HWCAP_IDIV              (HWCAP_IDIVA | HWCAP_IDIVT)
445 #define HWCAP_VFPD32            (1 << 19)       /* set if VFP has 32 regs */
446 #define HWCAP_LPAE              (1 << 20)
447 
448 /* Bits present in AT_HWCAP for PowerPC.  */
449 
450 #define PPC_FEATURE_32                  0x80000000
451 #define PPC_FEATURE_64                  0x40000000
452 #define PPC_FEATURE_601_INSTR           0x20000000
453 #define PPC_FEATURE_HAS_ALTIVEC         0x10000000
454 #define PPC_FEATURE_HAS_FPU             0x08000000
455 #define PPC_FEATURE_HAS_MMU             0x04000000
456 #define PPC_FEATURE_HAS_4xxMAC          0x02000000
457 #define PPC_FEATURE_UNIFIED_CACHE       0x01000000
458 #define PPC_FEATURE_HAS_SPE             0x00800000
459 #define PPC_FEATURE_HAS_EFP_SINGLE      0x00400000
460 #define PPC_FEATURE_HAS_EFP_DOUBLE      0x00200000
461 #define PPC_FEATURE_NO_TB               0x00100000
462 #define PPC_FEATURE_POWER4              0x00080000
463 #define PPC_FEATURE_POWER5              0x00040000
464 #define PPC_FEATURE_POWER5_PLUS         0x00020000
465 #define PPC_FEATURE_CELL                0x00010000
466 #define PPC_FEATURE_BOOKE               0x00008000
467 #define PPC_FEATURE_SMT                 0x00004000
468 #define PPC_FEATURE_ICACHE_SNOOP        0x00002000
469 #define PPC_FEATURE_ARCH_2_05           0x00001000
470 #define PPC_FEATURE_PA6T                0x00000800
471 #define PPC_FEATURE_HAS_DFP             0x00000400
472 #define PPC_FEATURE_POWER6_EXT          0x00000200
473 #define PPC_FEATURE_ARCH_2_06           0x00000100
474 #define PPC_FEATURE_HAS_VSX             0x00000080
475 
476 #define PPC_FEATURE_PSERIES_PERFMON_COMPAT \
477                                         0x00000040
478 
479 #define PPC_FEATURE_TRUE_LE             0x00000002
480 #define PPC_FEATURE_PPC_LE              0x00000001
481 
482 /* Bits present in AT_HWCAP2 for PowerPC.  */
483 
484 #define PPC_FEATURE2_ARCH_2_07          0x80000000
485 #define PPC_FEATURE2_HAS_HTM            0x40000000
486 #define PPC_FEATURE2_HAS_DSCR           0x20000000
487 #define PPC_FEATURE2_HAS_EBB            0x10000000
488 #define PPC_FEATURE2_HAS_ISEL           0x08000000
489 #define PPC_FEATURE2_HAS_TAR            0x04000000
490 #define PPC_FEATURE2_HAS_VEC_CRYPTO     0x02000000
491 #define PPC_FEATURE2_HTM_NOSC           0x01000000
492 #define PPC_FEATURE2_ARCH_3_00          0x00800000
493 #define PPC_FEATURE2_HAS_IEEE128        0x00400000
494 
495 /* Bits present in AT_HWCAP for Sparc.  */
496 
497 #define HWCAP_SPARC_FLUSH               0x00000001
498 #define HWCAP_SPARC_STBAR               0x00000002
499 #define HWCAP_SPARC_SWAP                0x00000004
500 #define HWCAP_SPARC_MULDIV              0x00000008
501 #define HWCAP_SPARC_V9                  0x00000010
502 #define HWCAP_SPARC_ULTRA3              0x00000020
503 #define HWCAP_SPARC_BLKINIT             0x00000040
504 #define HWCAP_SPARC_N2                  0x00000080
505 #define HWCAP_SPARC_MUL32               0x00000100
506 #define HWCAP_SPARC_DIV32               0x00000200
507 #define HWCAP_SPARC_FSMULD              0x00000400
508 #define HWCAP_SPARC_V8PLUS              0x00000800
509 #define HWCAP_SPARC_POPC                0x00001000
510 #define HWCAP_SPARC_VIS                 0x00002000
511 #define HWCAP_SPARC_VIS2                0x00004000
512 #define HWCAP_SPARC_ASI_BLK_INIT        0x00008000
513 #define HWCAP_SPARC_FMAF                0x00010000
514 #define HWCAP_SPARC_VIS3                0x00020000
515 #define HWCAP_SPARC_HPC                 0x00040000
516 #define HWCAP_SPARC_RANDOM              0x00080000
517 #define HWCAP_SPARC_TRANS               0x00100000
518 #define HWCAP_SPARC_FJFMAU              0x00200000
519 #define HWCAP_SPARC_IMA                 0x00400000
520 #define HWCAP_SPARC_ASI_CACHE_SPARING   0x00800000
521 #define HWCAP_SPARC_PAUSE               0x01000000
522 #define HWCAP_SPARC_CBCOND              0x02000000
523 #define HWCAP_SPARC_CRYPTO              0x04000000
524 
525 /* Bits present in AT_HWCAP for s390.  */
526 
527 #define HWCAP_S390_ESAN3        1
528 #define HWCAP_S390_ZARCH        2
529 #define HWCAP_S390_STFLE        4
530 #define HWCAP_S390_MSA          8
531 #define HWCAP_S390_LDISP        16
532 #define HWCAP_S390_EIMM         32
533 #define HWCAP_S390_DFP          64
534 #define HWCAP_S390_HPAGE        128
535 #define HWCAP_S390_ETF3EH       256
536 #define HWCAP_S390_HIGH_GPRS    512
537 #define HWCAP_S390_TE           1024
538 
539 /*
540  * 68k ELF relocation types
541  */
542 #define R_68K_NONE	0
543 #define R_68K_32	1
544 #define R_68K_16	2
545 #define R_68K_8		3
546 #define R_68K_PC32	4
547 #define R_68K_PC16	5
548 #define R_68K_PC8	6
549 #define R_68K_GOT32	7
550 #define R_68K_GOT16	8
551 #define R_68K_GOT8	9
552 #define R_68K_GOT32O	10
553 #define R_68K_GOT16O	11
554 #define R_68K_GOT8O	12
555 #define R_68K_PLT32	13
556 #define R_68K_PLT16	14
557 #define R_68K_PLT8	15
558 #define R_68K_PLT32O	16
559 #define R_68K_PLT16O	17
560 #define R_68K_PLT8O	18
561 #define R_68K_COPY	19
562 #define R_68K_GLOB_DAT	20
563 #define R_68K_JMP_SLOT	21
564 #define R_68K_RELATIVE	22
565 
566 /*
567  * Alpha ELF relocation types
568  */
569 #define R_ALPHA_NONE            0       /* No reloc */
570 #define R_ALPHA_REFLONG         1       /* Direct 32 bit */
571 #define R_ALPHA_REFQUAD         2       /* Direct 64 bit */
572 #define R_ALPHA_GPREL32         3       /* GP relative 32 bit */
573 #define R_ALPHA_LITERAL         4       /* GP relative 16 bit w/optimization */
574 #define R_ALPHA_LITUSE          5       /* Optimization hint for LITERAL */
575 #define R_ALPHA_GPDISP          6       /* Add displacement to GP */
576 #define R_ALPHA_BRADDR          7       /* PC+4 relative 23 bit shifted */
577 #define R_ALPHA_HINT            8       /* PC+4 relative 16 bit shifted */
578 #define R_ALPHA_SREL16          9       /* PC relative 16 bit */
579 #define R_ALPHA_SREL32          10      /* PC relative 32 bit */
580 #define R_ALPHA_SREL64          11      /* PC relative 64 bit */
581 #define R_ALPHA_GPRELHIGH       17      /* GP relative 32 bit, high 16 bits */
582 #define R_ALPHA_GPRELLOW        18      /* GP relative 32 bit, low 16 bits */
583 #define R_ALPHA_GPREL16         19      /* GP relative 16 bit */
584 #define R_ALPHA_COPY            24      /* Copy symbol at runtime */
585 #define R_ALPHA_GLOB_DAT        25      /* Create GOT entry */
586 #define R_ALPHA_JMP_SLOT        26      /* Create PLT entry */
587 #define R_ALPHA_RELATIVE        27      /* Adjust by program base */
588 #define R_ALPHA_BRSGP		28
589 #define R_ALPHA_TLSGD           29
590 #define R_ALPHA_TLS_LDM         30
591 #define R_ALPHA_DTPMOD64        31
592 #define R_ALPHA_GOTDTPREL       32
593 #define R_ALPHA_DTPREL64        33
594 #define R_ALPHA_DTPRELHI        34
595 #define R_ALPHA_DTPRELLO        35
596 #define R_ALPHA_DTPREL16        36
597 #define R_ALPHA_GOTTPREL        37
598 #define R_ALPHA_TPREL64         38
599 #define R_ALPHA_TPRELHI         39
600 #define R_ALPHA_TPRELLO         40
601 #define R_ALPHA_TPREL16         41
602 
603 #define SHF_ALPHA_GPREL		0x10000000
604 
605 
606 /* PowerPC specific definitions.  */
607 
608 /* Processor specific flags for the ELF header e_flags field.  */
609 #define EF_PPC64_ABI           0x3
610 
611 /* PowerPC relocations defined by the ABIs */
612 #define R_PPC_NONE		0
613 #define R_PPC_ADDR32		1	/* 32bit absolute address */
614 #define R_PPC_ADDR24		2	/* 26bit address, 2 bits ignored.  */
615 #define R_PPC_ADDR16		3	/* 16bit absolute address */
616 #define R_PPC_ADDR16_LO		4	/* lower 16bit of absolute address */
617 #define R_PPC_ADDR16_HI		5	/* high 16bit of absolute address */
618 #define R_PPC_ADDR16_HA		6	/* adjusted high 16bit */
619 #define R_PPC_ADDR14		7	/* 16bit address, 2 bits ignored */
620 #define R_PPC_ADDR14_BRTAKEN	8
621 #define R_PPC_ADDR14_BRNTAKEN	9
622 #define R_PPC_REL24		10	/* PC relative 26 bit */
623 #define R_PPC_REL14		11	/* PC relative 16 bit */
624 #define R_PPC_REL14_BRTAKEN	12
625 #define R_PPC_REL14_BRNTAKEN	13
626 #define R_PPC_GOT16		14
627 #define R_PPC_GOT16_LO		15
628 #define R_PPC_GOT16_HI		16
629 #define R_PPC_GOT16_HA		17
630 #define R_PPC_PLTREL24		18
631 #define R_PPC_COPY		19
632 #define R_PPC_GLOB_DAT		20
633 #define R_PPC_JMP_SLOT		21
634 #define R_PPC_RELATIVE		22
635 #define R_PPC_LOCAL24PC		23
636 #define R_PPC_UADDR32		24
637 #define R_PPC_UADDR16		25
638 #define R_PPC_REL32		26
639 #define R_PPC_PLT32		27
640 #define R_PPC_PLTREL32		28
641 #define R_PPC_PLT16_LO		29
642 #define R_PPC_PLT16_HI		30
643 #define R_PPC_PLT16_HA		31
644 #define R_PPC_SDAREL16		32
645 #define R_PPC_SECTOFF		33
646 #define R_PPC_SECTOFF_LO	34
647 #define R_PPC_SECTOFF_HI	35
648 #define R_PPC_SECTOFF_HA	36
649 /* Keep this the last entry.  */
650 #ifndef R_PPC_NUM
651 #define R_PPC_NUM		37
652 #endif
653 
654 /* ARM specific declarations */
655 
656 /* Processor specific flags for the ELF header e_flags field.  */
657 #define EF_ARM_RELEXEC     0x01
658 #define EF_ARM_HASENTRY    0x02
659 #define EF_ARM_INTERWORK   0x04
660 #define EF_ARM_APCS_26     0x08
661 #define EF_ARM_APCS_FLOAT  0x10
662 #define EF_ARM_PIC         0x20
663 #define EF_ALIGN8          0x40		/* 8-bit structure alignment is in use */
664 #define EF_NEW_ABI         0x80
665 #define EF_OLD_ABI         0x100
666 #define EF_ARM_SOFT_FLOAT  0x200
667 #define EF_ARM_VFP_FLOAT   0x400
668 #define EF_ARM_MAVERICK_FLOAT 0x800
669 
670 /* Other constants defined in the ARM ELF spec. version B-01.  */
671 #define EF_ARM_SYMSARESORTED 0x04       /* NB conflicts with EF_INTERWORK */
672 #define EF_ARM_DYNSYMSUSESEGIDX 0x08    /* NB conflicts with EF_APCS26 */
673 #define EF_ARM_MAPSYMSFIRST 0x10        /* NB conflicts with EF_APCS_FLOAT */
674 #define EF_ARM_EABIMASK      0xFF000000
675 
676 /* Constants defined in AAELF.  */
677 #define EF_ARM_BE8          0x00800000
678 #define EF_ARM_LE8          0x00400000
679 
680 #define EF_ARM_EABI_VERSION(flags) ((flags) & EF_ARM_EABIMASK)
681 #define EF_ARM_EABI_UNKNOWN  0x00000000
682 #define EF_ARM_EABI_VER1     0x01000000
683 #define EF_ARM_EABI_VER2     0x02000000
684 #define EF_ARM_EABI_VER3     0x03000000
685 #define EF_ARM_EABI_VER4     0x04000000
686 #define EF_ARM_EABI_VER5     0x05000000
687 
688 /* Additional symbol types for Thumb */
689 #define STT_ARM_TFUNC      0xd
690 
691 /* ARM-specific values for sh_flags */
692 #define SHF_ARM_ENTRYSECT  0x10000000   /* Section contains an entry point */
693 #define SHF_ARM_COMDEF     0x80000000   /* Section may be multiply defined
694 					   in the input to a link step */
695 
696 /* ARM-specific program header flags */
697 #define PF_ARM_SB          0x10000000   /* Segment contains the location
698 					   addressed by the static base */
699 
700 /* ARM relocs.  */
701 #define R_ARM_NONE		0	/* No reloc */
702 #define R_ARM_PC24		1	/* PC relative 26 bit branch */
703 #define R_ARM_ABS32		2	/* Direct 32 bit  */
704 #define R_ARM_REL32		3	/* PC relative 32 bit */
705 #define R_ARM_PC13		4
706 #define R_ARM_ABS16		5	/* Direct 16 bit */
707 #define R_ARM_ABS12		6	/* Direct 12 bit */
708 #define R_ARM_THM_ABS5		7
709 #define R_ARM_ABS8		8	/* Direct 8 bit */
710 #define R_ARM_SBREL32		9
711 #define R_ARM_THM_PC22		10
712 #define R_ARM_THM_PC8		11
713 #define R_ARM_AMP_VCALL9	12
714 #define R_ARM_SWI24		13
715 #define R_ARM_THM_SWI8		14
716 #define R_ARM_XPC25		15
717 #define R_ARM_THM_XPC22		16
718 #define R_ARM_COPY		20	/* Copy symbol at runtime */
719 #define R_ARM_GLOB_DAT		21	/* Create GOT entry */
720 #define R_ARM_JUMP_SLOT		22	/* Create PLT entry */
721 #define R_ARM_RELATIVE		23	/* Adjust by program base */
722 #define R_ARM_GOTOFF		24	/* 32 bit offset to GOT */
723 #define R_ARM_GOTPC		25	/* 32 bit PC relative offset to GOT */
724 #define R_ARM_GOT32		26	/* 32 bit GOT entry */
725 #define R_ARM_PLT32		27	/* 32 bit PLT address */
726 #define R_ARM_CALL              28
727 #define R_ARM_JUMP24            29
728 #define R_ARM_GNU_VTENTRY	100
729 #define R_ARM_GNU_VTINHERIT	101
730 #define R_ARM_THM_PC11		102	/* thumb unconditional branch */
731 #define R_ARM_THM_PC9		103	/* thumb conditional branch */
732 #define R_ARM_RXPC25		249
733 #define R_ARM_RSBREL32		250
734 #define R_ARM_THM_RPC22		251
735 #define R_ARM_RREL32		252
736 #define R_ARM_RABS22		253
737 #define R_ARM_RPC24		254
738 #define R_ARM_RBASE		255
739 /* Keep this the last entry.  */
740 #define R_ARM_NUM		256
741 
742 /* ARM Aarch64 relocation types */
743 #define R_AARCH64_NONE                256 /* also accepts R_ARM_NONE (0) */
744 /* static data relocations */
745 #define R_AARCH64_ABS64               257
746 #define R_AARCH64_ABS32               258
747 #define R_AARCH64_ABS16               259
748 #define R_AARCH64_PREL64              260
749 #define R_AARCH64_PREL32              261
750 #define R_AARCH64_PREL16              262
751 /* static aarch64 group relocations */
752 /* group relocs to create unsigned data value or address inline */
753 #define R_AARCH64_MOVW_UABS_G0        263
754 #define R_AARCH64_MOVW_UABS_G0_NC     264
755 #define R_AARCH64_MOVW_UABS_G1        265
756 #define R_AARCH64_MOVW_UABS_G1_NC     266
757 #define R_AARCH64_MOVW_UABS_G2        267
758 #define R_AARCH64_MOVW_UABS_G2_NC     268
759 #define R_AARCH64_MOVW_UABS_G3        269
760 /* group relocs to create signed data or offset value inline */
761 #define R_AARCH64_MOVW_SABS_G0        270
762 #define R_AARCH64_MOVW_SABS_G1        271
763 #define R_AARCH64_MOVW_SABS_G2        272
764 /* relocs to generate 19, 21, and 33 bit PC-relative addresses */
765 #define R_AARCH64_LD_PREL_LO19        273
766 #define R_AARCH64_ADR_PREL_LO21       274
767 #define R_AARCH64_ADR_PREL_PG_HI21    275
768 #define R_AARCH64_ADR_PREL_PG_HI21_NC 276
769 #define R_AARCH64_ADD_ABS_LO12_NC     277
770 #define R_AARCH64_LDST8_ABS_LO12_NC   278
771 #define R_AARCH64_LDST16_ABS_LO12_NC  284
772 #define R_AARCH64_LDST32_ABS_LO12_NC  285
773 #define R_AARCH64_LDST64_ABS_LO12_NC  286
774 #define R_AARCH64_LDST128_ABS_LO12_NC 299
775 /* relocs for control-flow - all offsets as multiple of 4 */
776 #define R_AARCH64_TSTBR14             279
777 #define R_AARCH64_CONDBR19            280
778 #define R_AARCH64_JUMP26              282
779 #define R_AARCH64_CALL26              283
780 /* group relocs to create pc-relative offset inline */
781 #define R_AARCH64_MOVW_PREL_G0        287
782 #define R_AARCH64_MOVW_PREL_G0_NC     288
783 #define R_AARCH64_MOVW_PREL_G1        289
784 #define R_AARCH64_MOVW_PREL_G1_NC     290
785 #define R_AARCH64_MOVW_PREL_G2        291
786 #define R_AARCH64_MOVW_PREL_G2_NC     292
787 #define R_AARCH64_MOVW_PREL_G3        293
788 /* group relocs to create a GOT-relative offset inline */
789 #define R_AARCH64_MOVW_GOTOFF_G0      300
790 #define R_AARCH64_MOVW_GOTOFF_G0_NC   301
791 #define R_AARCH64_MOVW_GOTOFF_G1      302
792 #define R_AARCH64_MOVW_GOTOFF_G1_NC   303
793 #define R_AARCH64_MOVW_GOTOFF_G2      304
794 #define R_AARCH64_MOVW_GOTOFF_G2_NC   305
795 #define R_AARCH64_MOVW_GOTOFF_G3      306
796 /* GOT-relative data relocs */
797 #define R_AARCH64_GOTREL64            307
798 #define R_AARCH64_GOTREL32            308
799 /* GOT-relative instr relocs */
800 #define R_AARCH64_GOT_LD_PREL19       309
801 #define R_AARCH64_LD64_GOTOFF_LO15    310
802 #define R_AARCH64_ADR_GOT_PAGE        311
803 #define R_AARCH64_LD64_GOT_LO12_NC    312
804 #define R_AARCH64_LD64_GOTPAGE_LO15   313
805 /* General Dynamic TLS relocations */
806 #define R_AARCH64_TLSGD_ADR_PREL21            512
807 #define R_AARCH64_TLSGD_ADR_PAGE21            513
808 #define R_AARCH64_TLSGD_ADD_LO12_NC           514
809 #define R_AARCH64_TLSGD_MOVW_G1               515
810 #define R_AARCH64_TLSGD_MOVW_G0_NC            516
811 /* Local Dynamic TLS relocations */
812 #define R_AARCH64_TLSLD_ADR_PREL21            517
813 #define R_AARCH64_TLSLD_ADR_PAGE21            518
814 #define R_AARCH64_TLSLD_ADD_LO12_NC           519
815 #define R_AARCH64_TLSLD_MOVW_G1               520
816 #define R_AARCH64_TLSLD_MOVW_G0_NC            521
817 #define R_AARCH64_TLSLD_LD_PREL19             522
818 #define R_AARCH64_TLSLD_MOVW_DTPREL_G2        523
819 #define R_AARCH64_TLSLD_MOVW_DTPREL_G1        524
820 #define R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC     525
821 #define R_AARCH64_TLSLD_MOVW_DTPREL_G0        526
822 #define R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC     527
823 #define R_AARCH64_TLSLD_ADD_DTPREL_HI12       528
824 #define R_AARCH64_TLSLD_ADD_DTPREL_LO12       529
825 #define R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC    530
826 #define R_AARCH64_TLSLD_LDST8_DTPREL_LO12     531
827 #define R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC  532
828 #define R_AARCH64_TLSLD_LDST16_DTPREL_LO12    533
829 #define R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC 534
830 #define R_AARCH64_TLSLD_LDST32_DTPREL_LO12    535
831 #define R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC 536
832 #define R_AARCH64_TLSLD_LDST64_DTPREL_LO12    537
833 #define R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC 538
834 /* initial exec TLS relocations */
835 #define R_AARCH64_TLSIE_MOVW_GOTTPREL_G1      539
836 #define R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC   540
837 #define R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21   541
838 #define R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC 542
839 #define R_AARCH64_TLSIE_LD_GOTTPREL_PREL19    543
840 /* local exec TLS relocations */
841 #define R_AARCH64_TLSLE_MOVW_TPREL_G2         544
842 #define R_AARCH64_TLSLE_MOVW_TPREL_G1         545
843 #define R_AARCH64_TLSLE_MOVW_TPREL_G1_NC      546
844 #define R_AARCH64_TLSLE_MOVW_TPREL_G0         547
845 #define R_AARCH64_TLSLE_MOVW_TPREL_G0_NC      548
846 #define R_AARCH64_TLSLE_ADD_TPREL_HI12        549
847 #define R_AARCH64_TLSLE_ADD_TPREL_LO12        550
848 #define R_AARCH64_TLSLE_ADD_TPREL_LO12_NC     551
849 #define R_AARCH64_TLSLE_LDST8_TPREL_LO12      552
850 #define R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC   553
851 #define R_AARCH64_TLSLE_LDST16_TPREL_LO12     554
852 #define R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC  555
853 #define R_AARCH64_TLSLE_LDST32_TPREL_LO12     556
854 #define R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC  557
855 #define R_AARCH64_TLSLE_LDST64_TPREL_LO12     558
856 #define R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC  559
857 /* Dynamic Relocations */
858 #define R_AARCH64_COPY         1024
859 #define R_AARCH64_GLOB_DAT     1025
860 #define R_AARCH64_JUMP_SLOT    1026
861 #define R_AARCH64_RELATIVE     1027
862 #define R_AARCH64_TLS_DTPREL64 1028
863 #define R_AARCH64_TLS_DTPMOD64 1029
864 #define R_AARCH64_TLS_TPREL64  1030
865 #define R_AARCH64_TLS_DTPREL32 1031
866 #define R_AARCH64_TLS_DTPMOD32 1032
867 #define R_AARCH64_TLS_TPREL32  1033
868 
869 /* s390 relocations defined by the ABIs */
870 #define R_390_NONE		0	/* No reloc.  */
871 #define R_390_8			1	/* Direct 8 bit.  */
872 #define R_390_12		2	/* Direct 12 bit.  */
873 #define R_390_16		3	/* Direct 16 bit.  */
874 #define R_390_32		4	/* Direct 32 bit.  */
875 #define R_390_PC32		5	/* PC relative 32 bit.	*/
876 #define R_390_GOT12		6	/* 12 bit GOT offset.  */
877 #define R_390_GOT32		7	/* 32 bit GOT offset.  */
878 #define R_390_PLT32		8	/* 32 bit PC relative PLT address.  */
879 #define R_390_COPY		9	/* Copy symbol at runtime.  */
880 #define R_390_GLOB_DAT		10	/* Create GOT entry.  */
881 #define R_390_JMP_SLOT		11	/* Create PLT entry.  */
882 #define R_390_RELATIVE		12	/* Adjust by program base.  */
883 #define R_390_GOTOFF32		13	/* 32 bit offset to GOT.	 */
884 #define R_390_GOTPC		14	/* 32 bit PC rel. offset to GOT.  */
885 #define R_390_GOT16		15	/* 16 bit GOT offset.  */
886 #define R_390_PC16		16	/* PC relative 16 bit.	*/
887 #define R_390_PC16DBL		17	/* PC relative 16 bit shifted by 1.  */
888 #define R_390_PLT16DBL		18	/* 16 bit PC rel. PLT shifted by 1.  */
889 #define R_390_PC32DBL		19	/* PC relative 32 bit shifted by 1.  */
890 #define R_390_PLT32DBL		20	/* 32 bit PC rel. PLT shifted by 1.  */
891 #define R_390_GOTPCDBL		21	/* 32 bit PC rel. GOT shifted by 1.  */
892 #define R_390_64		22	/* Direct 64 bit.  */
893 #define R_390_PC64		23	/* PC relative 64 bit.	*/
894 #define R_390_GOT64		24	/* 64 bit GOT offset.  */
895 #define R_390_PLT64		25	/* 64 bit PC relative PLT address.  */
896 #define R_390_GOTENT		26	/* 32 bit PC rel. to GOT entry >> 1. */
897 #define R_390_GOTOFF16		27	/* 16 bit offset to GOT. */
898 #define R_390_GOTOFF64		28	/* 64 bit offset to GOT. */
899 #define R_390_GOTPLT12		29	/* 12 bit offset to jump slot.	*/
900 #define R_390_GOTPLT16		30	/* 16 bit offset to jump slot.	*/
901 #define R_390_GOTPLT32		31	/* 32 bit offset to jump slot.	*/
902 #define R_390_GOTPLT64		32	/* 64 bit offset to jump slot.	*/
903 #define R_390_GOTPLTENT		33	/* 32 bit rel. offset to jump slot.  */
904 #define R_390_PLTOFF16		34	/* 16 bit offset from GOT to PLT. */
905 #define R_390_PLTOFF32		35	/* 32 bit offset from GOT to PLT. */
906 #define R_390_PLTOFF64		36	/* 16 bit offset from GOT to PLT. */
907 #define R_390_TLS_LOAD		37	/* Tag for load insn in TLS code. */
908 #define R_390_TLS_GDCALL	38	/* Tag for function call in general
909                                            dynamic TLS code.  */
910 #define R_390_TLS_LDCALL	39	/* Tag for function call in local
911                                            dynamic TLS code.  */
912 #define R_390_TLS_GD32		40	/* Direct 32 bit for general dynamic
913                                            thread local data.  */
914 #define R_390_TLS_GD64		41	/* Direct 64 bit for general dynamic
915                                            thread local data.  */
916 #define R_390_TLS_GOTIE12	42	/* 12 bit GOT offset for static TLS
917                                            block offset.  */
918 #define R_390_TLS_GOTIE32	43	/* 32 bit GOT offset for static TLS
919                                            block offset.  */
920 #define R_390_TLS_GOTIE64	44	/* 64 bit GOT offset for static TLS
921                                            block offset.  */
922 #define R_390_TLS_LDM32		45	/* Direct 32 bit for local dynamic
923                                            thread local data in LD code.  */
924 #define R_390_TLS_LDM64		46	/* Direct 64 bit for local dynamic
925                                            thread local data in LD code.  */
926 #define R_390_TLS_IE32		47	/* 32 bit address of GOT entry for
927                                            negated static TLS block offset.  */
928 #define R_390_TLS_IE64		48	/* 64 bit address of GOT entry for
929                                            negated static TLS block offset.  */
930 #define R_390_TLS_IEENT		49	/* 32 bit rel. offset to GOT entry for
931                                            negated static TLS block offset.  */
932 #define R_390_TLS_LE32		50	/* 32 bit negated offset relative to
933                                            static TLS block.  */
934 #define R_390_TLS_LE64		51	/* 64 bit negated offset relative to
935                                            static TLS block.  */
936 #define R_390_TLS_LDO32		52	/* 32 bit offset relative to TLS
937                                            block.  */
938 #define R_390_TLS_LDO64		53	/* 64 bit offset relative to TLS
939                                            block.  */
940 #define R_390_TLS_DTPMOD	54	/* ID of module containing symbol.  */
941 #define R_390_TLS_DTPOFF	55	/* Offset in TLS block.  */
942 #define R_390_TLS_TPOFF		56	/* Negate offset in static TLS
943                                            block.  */
944 /* Keep this the last entry.  */
945 #define R_390_NUM	57
946 
947 /* x86-64 relocation types */
948 #define R_X86_64_NONE		0	/* No reloc */
949 #define R_X86_64_64		1	/* Direct 64 bit  */
950 #define R_X86_64_PC32		2	/* PC relative 32 bit signed */
951 #define R_X86_64_GOT32		3	/* 32 bit GOT entry */
952 #define R_X86_64_PLT32		4	/* 32 bit PLT address */
953 #define R_X86_64_COPY		5	/* Copy symbol at runtime */
954 #define R_X86_64_GLOB_DAT	6	/* Create GOT entry */
955 #define R_X86_64_JUMP_SLOT	7	/* Create PLT entry */
956 #define R_X86_64_RELATIVE	8	/* Adjust by program base */
957 #define R_X86_64_GOTPCREL	9	/* 32 bit signed pc relative
958 					   offset to GOT */
959 #define R_X86_64_32		10	/* Direct 32 bit zero extended */
960 #define R_X86_64_32S		11	/* Direct 32 bit sign extended */
961 #define R_X86_64_16		12	/* Direct 16 bit zero extended */
962 #define R_X86_64_PC16		13	/* 16 bit sign extended pc relative */
963 #define R_X86_64_8		14	/* Direct 8 bit sign extended  */
964 #define R_X86_64_PC8		15	/* 8 bit sign extended pc relative */
965 
966 #define R_X86_64_NUM		16
967 
968 /* Legal values for e_flags field of Elf64_Ehdr.  */
969 
970 #define EF_ALPHA_32BIT		1	/* All addresses are below 2GB */
971 
972 /* HPPA specific definitions.  */
973 
974 /* Legal values for e_flags field of Elf32_Ehdr.  */
975 
976 #define EF_PARISC_TRAPNIL	0x00010000 /* Trap nil pointer dereference.  */
977 #define EF_PARISC_EXT		0x00020000 /* Program uses arch. extensions. */
978 #define EF_PARISC_LSB		0x00040000 /* Program expects little endian. */
979 #define EF_PARISC_WIDE		0x00080000 /* Program expects wide mode.  */
980 #define EF_PARISC_NO_KABP	0x00100000 /* No kernel assisted branch
981 					      prediction.  */
982 #define EF_PARISC_LAZYSWAP	0x00400000 /* Allow lazy swapping.  */
983 #define EF_PARISC_ARCH		0x0000ffff /* Architecture version.  */
984 
985 /* Defined values for `e_flags & EF_PARISC_ARCH' are:  */
986 
987 #define EFA_PARISC_1_0		    0x020b /* PA-RISC 1.0 big-endian.  */
988 #define EFA_PARISC_1_1		    0x0210 /* PA-RISC 1.1 big-endian.  */
989 #define EFA_PARISC_2_0		    0x0214 /* PA-RISC 2.0 big-endian.  */
990 
991 /* Additional section indeces.  */
992 
993 #define SHN_PARISC_ANSI_COMMON	0xff00	   /* Section for tenatively declared
994 					      symbols in ANSI C.  */
995 #define SHN_PARISC_HUGE_COMMON	0xff01	   /* Common blocks in huge model.  */
996 
997 /* Legal values for sh_type field of Elf32_Shdr.  */
998 
999 #define SHT_PARISC_EXT		0x70000000 /* Contains product specific ext. */
1000 #define SHT_PARISC_UNWIND	0x70000001 /* Unwind information.  */
1001 #define SHT_PARISC_DOC		0x70000002 /* Debug info for optimized code. */
1002 
1003 /* Legal values for sh_flags field of Elf32_Shdr.  */
1004 
1005 #define SHF_PARISC_SHORT	0x20000000 /* Section with short addressing. */
1006 #define SHF_PARISC_HUGE		0x40000000 /* Section far from gp.  */
1007 #define SHF_PARISC_SBP		0x80000000 /* Static branch prediction code. */
1008 
1009 /* Legal values for ST_TYPE subfield of st_info (symbol type).  */
1010 
1011 #define STT_PARISC_MILLICODE	13	/* Millicode function entry point.  */
1012 
1013 #define STT_HP_OPAQUE		(STT_LOOS + 0x1)
1014 #define STT_HP_STUB		(STT_LOOS + 0x2)
1015 
1016 /* HPPA relocs.  */
1017 
1018 #define R_PARISC_NONE		0	/* No reloc.  */
1019 #define R_PARISC_DIR32		1	/* Direct 32-bit reference.  */
1020 #define R_PARISC_DIR21L		2	/* Left 21 bits of eff. address.  */
1021 #define R_PARISC_DIR17R		3	/* Right 17 bits of eff. address.  */
1022 #define R_PARISC_DIR17F		4	/* 17 bits of eff. address.  */
1023 #define R_PARISC_DIR14R		6	/* Right 14 bits of eff. address.  */
1024 #define R_PARISC_PCREL32	9	/* 32-bit rel. address.  */
1025 #define R_PARISC_PCREL21L	10	/* Left 21 bits of rel. address.  */
1026 #define R_PARISC_PCREL17R	11	/* Right 17 bits of rel. address.  */
1027 #define R_PARISC_PCREL17F	12	/* 17 bits of rel. address.  */
1028 #define R_PARISC_PCREL14R	14	/* Right 14 bits of rel. address.  */
1029 #define R_PARISC_DPREL21L	18	/* Left 21 bits of rel. address.  */
1030 #define R_PARISC_DPREL14R	22	/* Right 14 bits of rel. address.  */
1031 #define R_PARISC_GPREL21L	26	/* GP-relative, left 21 bits.  */
1032 #define R_PARISC_GPREL14R	30	/* GP-relative, right 14 bits.  */
1033 #define R_PARISC_LTOFF21L	34	/* LT-relative, left 21 bits.  */
1034 #define R_PARISC_LTOFF14R	38	/* LT-relative, right 14 bits.  */
1035 #define R_PARISC_SECREL32	41	/* 32 bits section rel. address.  */
1036 #define R_PARISC_SEGBASE	48	/* No relocation, set segment base.  */
1037 #define R_PARISC_SEGREL32	49	/* 32 bits segment rel. address.  */
1038 #define R_PARISC_PLTOFF21L	50	/* PLT rel. address, left 21 bits.  */
1039 #define R_PARISC_PLTOFF14R	54	/* PLT rel. address, right 14 bits.  */
1040 #define R_PARISC_LTOFF_FPTR32	57	/* 32 bits LT-rel. function pointer. */
1041 #define R_PARISC_LTOFF_FPTR21L	58	/* LT-rel. fct ptr, left 21 bits. */
1042 #define R_PARISC_LTOFF_FPTR14R	62	/* LT-rel. fct ptr, right 14 bits. */
1043 #define R_PARISC_FPTR64		64	/* 64 bits function address.  */
1044 #define R_PARISC_PLABEL32	65	/* 32 bits function address.  */
1045 #define R_PARISC_PCREL64	72	/* 64 bits PC-rel. address.  */
1046 #define R_PARISC_PCREL22F	74	/* 22 bits PC-rel. address.  */
1047 #define R_PARISC_PCREL14WR	75	/* PC-rel. address, right 14 bits.  */
1048 #define R_PARISC_PCREL14DR	76	/* PC rel. address, right 14 bits.  */
1049 #define R_PARISC_PCREL16F	77	/* 16 bits PC-rel. address.  */
1050 #define R_PARISC_PCREL16WF	78	/* 16 bits PC-rel. address.  */
1051 #define R_PARISC_PCREL16DF	79	/* 16 bits PC-rel. address.  */
1052 #define R_PARISC_DIR64		80	/* 64 bits of eff. address.  */
1053 #define R_PARISC_DIR14WR	83	/* 14 bits of eff. address.  */
1054 #define R_PARISC_DIR14DR	84	/* 14 bits of eff. address.  */
1055 #define R_PARISC_DIR16F		85	/* 16 bits of eff. address.  */
1056 #define R_PARISC_DIR16WF	86	/* 16 bits of eff. address.  */
1057 #define R_PARISC_DIR16DF	87	/* 16 bits of eff. address.  */
1058 #define R_PARISC_GPREL64	88	/* 64 bits of GP-rel. address.  */
1059 #define R_PARISC_GPREL14WR	91	/* GP-rel. address, right 14 bits.  */
1060 #define R_PARISC_GPREL14DR	92	/* GP-rel. address, right 14 bits.  */
1061 #define R_PARISC_GPREL16F	93	/* 16 bits GP-rel. address.  */
1062 #define R_PARISC_GPREL16WF	94	/* 16 bits GP-rel. address.  */
1063 #define R_PARISC_GPREL16DF	95	/* 16 bits GP-rel. address.  */
1064 #define R_PARISC_LTOFF64	96	/* 64 bits LT-rel. address.  */
1065 #define R_PARISC_LTOFF14WR	99	/* LT-rel. address, right 14 bits.  */
1066 #define R_PARISC_LTOFF14DR	100	/* LT-rel. address, right 14 bits.  */
1067 #define R_PARISC_LTOFF16F	101	/* 16 bits LT-rel. address.  */
1068 #define R_PARISC_LTOFF16WF	102	/* 16 bits LT-rel. address.  */
1069 #define R_PARISC_LTOFF16DF	103	/* 16 bits LT-rel. address.  */
1070 #define R_PARISC_SECREL64	104	/* 64 bits section rel. address.  */
1071 #define R_PARISC_SEGREL64	112	/* 64 bits segment rel. address.  */
1072 #define R_PARISC_PLTOFF14WR	115	/* PLT-rel. address, right 14 bits.  */
1073 #define R_PARISC_PLTOFF14DR	116	/* PLT-rel. address, right 14 bits.  */
1074 #define R_PARISC_PLTOFF16F	117	/* 16 bits LT-rel. address.  */
1075 #define R_PARISC_PLTOFF16WF	118	/* 16 bits PLT-rel. address.  */
1076 #define R_PARISC_PLTOFF16DF	119	/* 16 bits PLT-rel. address.  */
1077 #define R_PARISC_LTOFF_FPTR64	120	/* 64 bits LT-rel. function ptr.  */
1078 #define R_PARISC_LTOFF_FPTR14WR	123	/* LT-rel. fct. ptr., right 14 bits. */
1079 #define R_PARISC_LTOFF_FPTR14DR	124	/* LT-rel. fct. ptr., right 14 bits. */
1080 #define R_PARISC_LTOFF_FPTR16F	125	/* 16 bits LT-rel. function ptr.  */
1081 #define R_PARISC_LTOFF_FPTR16WF	126	/* 16 bits LT-rel. function ptr.  */
1082 #define R_PARISC_LTOFF_FPTR16DF	127	/* 16 bits LT-rel. function ptr.  */
1083 #define R_PARISC_LORESERVE	128
1084 #define R_PARISC_COPY		128	/* Copy relocation.  */
1085 #define R_PARISC_IPLT		129	/* Dynamic reloc, imported PLT */
1086 #define R_PARISC_EPLT		130	/* Dynamic reloc, exported PLT */
1087 #define R_PARISC_TPREL32	153	/* 32 bits TP-rel. address.  */
1088 #define R_PARISC_TPREL21L	154	/* TP-rel. address, left 21 bits.  */
1089 #define R_PARISC_TPREL14R	158	/* TP-rel. address, right 14 bits.  */
1090 #define R_PARISC_LTOFF_TP21L	162	/* LT-TP-rel. address, left 21 bits. */
1091 #define R_PARISC_LTOFF_TP14R	166	/* LT-TP-rel. address, right 14 bits.*/
1092 #define R_PARISC_LTOFF_TP14F	167	/* 14 bits LT-TP-rel. address.  */
1093 #define R_PARISC_TPREL64	216	/* 64 bits TP-rel. address.  */
1094 #define R_PARISC_TPREL14WR	219	/* TP-rel. address, right 14 bits.  */
1095 #define R_PARISC_TPREL14DR	220	/* TP-rel. address, right 14 bits.  */
1096 #define R_PARISC_TPREL16F	221	/* 16 bits TP-rel. address.  */
1097 #define R_PARISC_TPREL16WF	222	/* 16 bits TP-rel. address.  */
1098 #define R_PARISC_TPREL16DF	223	/* 16 bits TP-rel. address.  */
1099 #define R_PARISC_LTOFF_TP64	224	/* 64 bits LT-TP-rel. address.  */
1100 #define R_PARISC_LTOFF_TP14WR	227	/* LT-TP-rel. address, right 14 bits.*/
1101 #define R_PARISC_LTOFF_TP14DR	228	/* LT-TP-rel. address, right 14 bits.*/
1102 #define R_PARISC_LTOFF_TP16F	229	/* 16 bits LT-TP-rel. address.  */
1103 #define R_PARISC_LTOFF_TP16WF	230	/* 16 bits LT-TP-rel. address.  */
1104 #define R_PARISC_LTOFF_TP16DF	231	/* 16 bits LT-TP-rel. address.  */
1105 #define R_PARISC_HIRESERVE	255
1106 
1107 /* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr.  */
1108 
1109 #define PT_HP_TLS		(PT_LOOS + 0x0)
1110 #define PT_HP_CORE_NONE		(PT_LOOS + 0x1)
1111 #define PT_HP_CORE_VERSION	(PT_LOOS + 0x2)
1112 #define PT_HP_CORE_KERNEL	(PT_LOOS + 0x3)
1113 #define PT_HP_CORE_COMM		(PT_LOOS + 0x4)
1114 #define PT_HP_CORE_PROC		(PT_LOOS + 0x5)
1115 #define PT_HP_CORE_LOADABLE	(PT_LOOS + 0x6)
1116 #define PT_HP_CORE_STACK	(PT_LOOS + 0x7)
1117 #define PT_HP_CORE_SHM		(PT_LOOS + 0x8)
1118 #define PT_HP_CORE_MMF		(PT_LOOS + 0x9)
1119 #define PT_HP_PARALLEL		(PT_LOOS + 0x10)
1120 #define PT_HP_FASTBIND		(PT_LOOS + 0x11)
1121 #define PT_HP_OPT_ANNOT		(PT_LOOS + 0x12)
1122 #define PT_HP_HSL_ANNOT		(PT_LOOS + 0x13)
1123 #define PT_HP_STACK		(PT_LOOS + 0x14)
1124 
1125 #define PT_PARISC_ARCHEXT	0x70000000
1126 #define PT_PARISC_UNWIND	0x70000001
1127 
1128 /* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr.  */
1129 
1130 #define PF_PARISC_SBP		0x08000000
1131 
1132 #define PF_HP_PAGE_SIZE		0x00100000
1133 #define PF_HP_FAR_SHARED	0x00200000
1134 #define PF_HP_NEAR_SHARED	0x00400000
1135 #define PF_HP_CODE		0x01000000
1136 #define PF_HP_MODIFY		0x02000000
1137 #define PF_HP_LAZYSWAP		0x04000000
1138 #define PF_HP_SBP		0x08000000
1139 
1140 /* IA-64 specific declarations.  */
1141 
1142 /* Processor specific flags for the Ehdr e_flags field.  */
1143 #define EF_IA_64_MASKOS		0x0000000f	/* os-specific flags */
1144 #define EF_IA_64_ABI64		0x00000010	/* 64-bit ABI */
1145 #define EF_IA_64_ARCH		0xff000000	/* arch. version mask */
1146 
1147 /* Processor specific values for the Phdr p_type field.  */
1148 #define PT_IA_64_ARCHEXT	(PT_LOPROC + 0)	/* arch extension bits */
1149 #define PT_IA_64_UNWIND		(PT_LOPROC + 1)	/* ia64 unwind bits */
1150 
1151 /* Processor specific flags for the Phdr p_flags field.  */
1152 #define PF_IA_64_NORECOV	0x80000000	/* spec insns w/o recovery */
1153 
1154 /* Processor specific values for the Shdr sh_type field.  */
1155 #define SHT_IA_64_EXT		(SHT_LOPROC + 0) /* extension bits */
1156 #define SHT_IA_64_UNWIND	(SHT_LOPROC + 1) /* unwind bits */
1157 
1158 /* Processor specific flags for the Shdr sh_flags field.  */
1159 #define SHF_IA_64_SHORT		0x10000000	/* section near gp */
1160 #define SHF_IA_64_NORECOV	0x20000000	/* spec insns w/o recovery */
1161 
1162 /* Processor specific values for the Dyn d_tag field.  */
1163 #define DT_IA_64_PLT_RESERVE	(DT_LOPROC + 0)
1164 #define DT_IA_64_NUM		1
1165 
1166 /* IA-64 relocations.  */
1167 #define R_IA64_NONE		0x00	/* none */
1168 #define R_IA64_IMM14		0x21	/* symbol + addend, add imm14 */
1169 #define R_IA64_IMM22		0x22	/* symbol + addend, add imm22 */
1170 #define R_IA64_IMM64		0x23	/* symbol + addend, mov imm64 */
1171 #define R_IA64_DIR32MSB		0x24	/* symbol + addend, data4 MSB */
1172 #define R_IA64_DIR32LSB		0x25	/* symbol + addend, data4 LSB */
1173 #define R_IA64_DIR64MSB		0x26	/* symbol + addend, data8 MSB */
1174 #define R_IA64_DIR64LSB		0x27	/* symbol + addend, data8 LSB */
1175 #define R_IA64_GPREL22		0x2a	/* @gprel(sym + add), add imm22 */
1176 #define R_IA64_GPREL64I		0x2b	/* @gprel(sym + add), mov imm64 */
1177 #define R_IA64_GPREL32MSB	0x2c	/* @gprel(sym + add), data4 MSB */
1178 #define R_IA64_GPREL32LSB	0x2d	/* @gprel(sym + add), data4 LSB */
1179 #define R_IA64_GPREL64MSB	0x2e	/* @gprel(sym + add), data8 MSB */
1180 #define R_IA64_GPREL64LSB	0x2f	/* @gprel(sym + add), data8 LSB */
1181 #define R_IA64_LTOFF22		0x32	/* @ltoff(sym + add), add imm22 */
1182 #define R_IA64_LTOFF64I		0x33	/* @ltoff(sym + add), mov imm64 */
1183 #define R_IA64_PLTOFF22		0x3a	/* @pltoff(sym + add), add imm22 */
1184 #define R_IA64_PLTOFF64I	0x3b	/* @pltoff(sym + add), mov imm64 */
1185 #define R_IA64_PLTOFF64MSB	0x3e	/* @pltoff(sym + add), data8 MSB */
1186 #define R_IA64_PLTOFF64LSB	0x3f	/* @pltoff(sym + add), data8 LSB */
1187 #define R_IA64_FPTR64I		0x43	/* @fptr(sym + add), mov imm64 */
1188 #define R_IA64_FPTR32MSB	0x44	/* @fptr(sym + add), data4 MSB */
1189 #define R_IA64_FPTR32LSB	0x45	/* @fptr(sym + add), data4 LSB */
1190 #define R_IA64_FPTR64MSB	0x46	/* @fptr(sym + add), data8 MSB */
1191 #define R_IA64_FPTR64LSB	0x47	/* @fptr(sym + add), data8 LSB */
1192 #define R_IA64_PCREL60B		0x48	/* @pcrel(sym + add), brl */
1193 #define R_IA64_PCREL21B		0x49	/* @pcrel(sym + add), ptb, call */
1194 #define R_IA64_PCREL21M		0x4a	/* @pcrel(sym + add), chk.s */
1195 #define R_IA64_PCREL21F		0x4b	/* @pcrel(sym + add), fchkf */
1196 #define R_IA64_PCREL32MSB	0x4c	/* @pcrel(sym + add), data4 MSB */
1197 #define R_IA64_PCREL32LSB	0x4d	/* @pcrel(sym + add), data4 LSB */
1198 #define R_IA64_PCREL64MSB	0x4e	/* @pcrel(sym + add), data8 MSB */
1199 #define R_IA64_PCREL64LSB	0x4f	/* @pcrel(sym + add), data8 LSB */
1200 #define R_IA64_LTOFF_FPTR22	0x52	/* @ltoff(@fptr(s+a)), imm22 */
1201 #define R_IA64_LTOFF_FPTR64I	0x53	/* @ltoff(@fptr(s+a)), imm64 */
1202 #define R_IA64_LTOFF_FPTR32MSB	0x54	/* @ltoff(@fptr(s+a)), data4 MSB */
1203 #define R_IA64_LTOFF_FPTR32LSB	0x55	/* @ltoff(@fptr(s+a)), data4 LSB */
1204 #define R_IA64_LTOFF_FPTR64MSB	0x56	/* @ltoff(@fptr(s+a)), data8 MSB */
1205 #define R_IA64_LTOFF_FPTR64LSB	0x57	/* @ltoff(@fptr(s+a)), data8 LSB */
1206 #define R_IA64_SEGREL32MSB	0x5c	/* @segrel(sym + add), data4 MSB */
1207 #define R_IA64_SEGREL32LSB	0x5d	/* @segrel(sym + add), data4 LSB */
1208 #define R_IA64_SEGREL64MSB	0x5e	/* @segrel(sym + add), data8 MSB */
1209 #define R_IA64_SEGREL64LSB	0x5f	/* @segrel(sym + add), data8 LSB */
1210 #define R_IA64_SECREL32MSB	0x64	/* @secrel(sym + add), data4 MSB */
1211 #define R_IA64_SECREL32LSB	0x65	/* @secrel(sym + add), data4 LSB */
1212 #define R_IA64_SECREL64MSB	0x66	/* @secrel(sym + add), data8 MSB */
1213 #define R_IA64_SECREL64LSB	0x67	/* @secrel(sym + add), data8 LSB */
1214 #define R_IA64_REL32MSB		0x6c	/* data 4 + REL */
1215 #define R_IA64_REL32LSB		0x6d	/* data 4 + REL */
1216 #define R_IA64_REL64MSB		0x6e	/* data 8 + REL */
1217 #define R_IA64_REL64LSB		0x6f	/* data 8 + REL */
1218 #define R_IA64_LTV32MSB		0x74	/* symbol + addend, data4 MSB */
1219 #define R_IA64_LTV32LSB		0x75	/* symbol + addend, data4 LSB */
1220 #define R_IA64_LTV64MSB		0x76	/* symbol + addend, data8 MSB */
1221 #define R_IA64_LTV64LSB		0x77	/* symbol + addend, data8 LSB */
1222 #define R_IA64_PCREL21BI	0x79	/* @pcrel(sym + add), 21bit inst */
1223 #define R_IA64_PCREL22		0x7a	/* @pcrel(sym + add), 22bit inst */
1224 #define R_IA64_PCREL64I		0x7b	/* @pcrel(sym + add), 64bit inst */
1225 #define R_IA64_IPLTMSB		0x80	/* dynamic reloc, imported PLT, MSB */
1226 #define R_IA64_IPLTLSB		0x81	/* dynamic reloc, imported PLT, LSB */
1227 #define R_IA64_COPY		0x84	/* copy relocation */
1228 #define R_IA64_SUB		0x85	/* Addend and symbol difference */
1229 #define R_IA64_LTOFF22X		0x86	/* LTOFF22, relaxable.  */
1230 #define R_IA64_LDXMOV		0x87	/* Use of LTOFF22X.  */
1231 #define R_IA64_TPREL14		0x91	/* @tprel(sym + add), imm14 */
1232 #define R_IA64_TPREL22		0x92	/* @tprel(sym + add), imm22 */
1233 #define R_IA64_TPREL64I		0x93	/* @tprel(sym + add), imm64 */
1234 #define R_IA64_TPREL64MSB	0x96	/* @tprel(sym + add), data8 MSB */
1235 #define R_IA64_TPREL64LSB	0x97	/* @tprel(sym + add), data8 LSB */
1236 #define R_IA64_LTOFF_TPREL22	0x9a	/* @ltoff(@tprel(s+a)), imm2 */
1237 #define R_IA64_DTPMOD64MSB	0xa6	/* @dtpmod(sym + add), data8 MSB */
1238 #define R_IA64_DTPMOD64LSB	0xa7	/* @dtpmod(sym + add), data8 LSB */
1239 #define R_IA64_LTOFF_DTPMOD22	0xaa	/* @ltoff(@dtpmod(sym + add)), imm22 */
1240 #define R_IA64_DTPREL14		0xb1	/* @dtprel(sym + add), imm14 */
1241 #define R_IA64_DTPREL22		0xb2	/* @dtprel(sym + add), imm22 */
1242 #define R_IA64_DTPREL64I	0xb3	/* @dtprel(sym + add), imm64 */
1243 #define R_IA64_DTPREL32MSB	0xb4	/* @dtprel(sym + add), data4 MSB */
1244 #define R_IA64_DTPREL32LSB	0xb5	/* @dtprel(sym + add), data4 LSB */
1245 #define R_IA64_DTPREL64MSB	0xb6	/* @dtprel(sym + add), data8 MSB */
1246 #define R_IA64_DTPREL64LSB	0xb7	/* @dtprel(sym + add), data8 LSB */
1247 #define R_IA64_LTOFF_DTPREL22	0xba	/* @ltoff(@dtprel(s+a)), imm22 */
1248 
1249 typedef struct elf32_rel {
1250   Elf32_Addr	r_offset;
1251   Elf32_Word	r_info;
1252 } Elf32_Rel;
1253 
1254 typedef struct elf64_rel {
1255   Elf64_Addr r_offset;	/* Location at which to apply the action */
1256   Elf64_Xword r_info;	/* index and type of relocation */
1257 } Elf64_Rel;
1258 
1259 typedef struct elf32_rela{
1260   Elf32_Addr	r_offset;
1261   Elf32_Word	r_info;
1262   Elf32_Sword	r_addend;
1263 } Elf32_Rela;
1264 
1265 typedef struct elf64_rela {
1266   Elf64_Addr r_offset;	/* Location at which to apply the action */
1267   Elf64_Xword r_info;	/* index and type of relocation */
1268   Elf64_Sxword r_addend;	/* Constant addend used to compute value */
1269 } Elf64_Rela;
1270 
1271 typedef struct elf32_sym{
1272   Elf32_Word	st_name;
1273   Elf32_Addr	st_value;
1274   Elf32_Word	st_size;
1275   unsigned char	st_info;
1276   unsigned char	st_other;
1277   Elf32_Half	st_shndx;
1278 } Elf32_Sym;
1279 
1280 typedef struct elf64_sym {
1281   Elf64_Word st_name;		/* Symbol name, index in string tbl */
1282   unsigned char	st_info;	/* Type and binding attributes */
1283   unsigned char	st_other;	/* No defined meaning, 0 */
1284   Elf64_Half st_shndx;		/* Associated section index */
1285   Elf64_Addr st_value;		/* Value of the symbol */
1286   Elf64_Xword st_size;		/* Associated symbol size */
1287 } Elf64_Sym;
1288 
1289 
1290 #define EI_NIDENT	16
1291 
1292 /* Special value for e_phnum.  This indicates that the real number of
1293    program headers is too large to fit into e_phnum.  Instead the real
1294    value is in the field sh_info of section 0.  */
1295 #define PN_XNUM         0xffff
1296 
1297 typedef struct elf32_hdr{
1298   unsigned char	e_ident[EI_NIDENT];
1299   Elf32_Half	e_type;
1300   Elf32_Half	e_machine;
1301   Elf32_Word	e_version;
1302   Elf32_Addr	e_entry;  /* Entry point */
1303   Elf32_Off	e_phoff;
1304   Elf32_Off	e_shoff;
1305   Elf32_Word	e_flags;
1306   Elf32_Half	e_ehsize;
1307   Elf32_Half	e_phentsize;
1308   Elf32_Half	e_phnum;
1309   Elf32_Half	e_shentsize;
1310   Elf32_Half	e_shnum;
1311   Elf32_Half	e_shstrndx;
1312 } Elf32_Ehdr;
1313 
1314 typedef struct elf64_hdr {
1315   unsigned char	e_ident[16];		/* ELF "magic number" */
1316   Elf64_Half e_type;
1317   Elf64_Half e_machine;
1318   Elf64_Word e_version;
1319   Elf64_Addr e_entry;		/* Entry point virtual address */
1320   Elf64_Off e_phoff;		/* Program header table file offset */
1321   Elf64_Off e_shoff;		/* Section header table file offset */
1322   Elf64_Word e_flags;
1323   Elf64_Half e_ehsize;
1324   Elf64_Half e_phentsize;
1325   Elf64_Half e_phnum;
1326   Elf64_Half e_shentsize;
1327   Elf64_Half e_shnum;
1328   Elf64_Half e_shstrndx;
1329 } Elf64_Ehdr;
1330 
1331 /* These constants define the permissions on sections in the program
1332    header, p_flags. */
1333 #define PF_R		0x4
1334 #define PF_W		0x2
1335 #define PF_X		0x1
1336 
1337 typedef struct elf32_phdr{
1338   Elf32_Word	p_type;
1339   Elf32_Off	p_offset;
1340   Elf32_Addr	p_vaddr;
1341   Elf32_Addr	p_paddr;
1342   Elf32_Word	p_filesz;
1343   Elf32_Word	p_memsz;
1344   Elf32_Word	p_flags;
1345   Elf32_Word	p_align;
1346 } Elf32_Phdr;
1347 
1348 typedef struct elf64_phdr {
1349   Elf64_Word p_type;
1350   Elf64_Word p_flags;
1351   Elf64_Off p_offset;		/* Segment file offset */
1352   Elf64_Addr p_vaddr;		/* Segment virtual address */
1353   Elf64_Addr p_paddr;		/* Segment physical address */
1354   Elf64_Xword p_filesz;		/* Segment size in file */
1355   Elf64_Xword p_memsz;		/* Segment size in memory */
1356   Elf64_Xword p_align;		/* Segment alignment, file & memory */
1357 } Elf64_Phdr;
1358 
1359 /* sh_type */
1360 #define SHT_NULL	0
1361 #define SHT_PROGBITS	1
1362 #define SHT_SYMTAB	2
1363 #define SHT_STRTAB	3
1364 #define SHT_RELA	4
1365 #define SHT_HASH	5
1366 #define SHT_DYNAMIC	6
1367 #define SHT_NOTE	7
1368 #define SHT_NOBITS	8
1369 #define SHT_REL		9
1370 #define SHT_SHLIB	10
1371 #define SHT_DYNSYM	11
1372 #define SHT_NUM		12
1373 #define SHT_LOPROC	0x70000000
1374 #define SHT_HIPROC	0x7fffffff
1375 #define SHT_LOUSER	0x80000000
1376 #define SHT_HIUSER	0xffffffff
1377 #define SHT_MIPS_LIST		0x70000000
1378 #define SHT_MIPS_CONFLICT	0x70000002
1379 #define SHT_MIPS_GPTAB		0x70000003
1380 #define SHT_MIPS_UCODE		0x70000004
1381 
1382 /* sh_flags */
1383 #define SHF_WRITE	0x1
1384 #define SHF_ALLOC	0x2
1385 #define SHF_EXECINSTR	0x4
1386 #define SHF_MASKPROC	0xf0000000
1387 #define SHF_MIPS_GPREL	0x10000000
1388 
1389 /* special section indexes */
1390 #define SHN_UNDEF	0
1391 #define SHN_LORESERVE	0xff00
1392 #define SHN_LOPROC	0xff00
1393 #define SHN_HIPROC	0xff1f
1394 #define SHN_ABS		0xfff1
1395 #define SHN_COMMON	0xfff2
1396 #define SHN_HIRESERVE	0xffff
1397 #define SHN_MIPS_ACCOMON	0xff00
1398 
1399 typedef struct elf32_shdr {
1400   Elf32_Word	sh_name;
1401   Elf32_Word	sh_type;
1402   Elf32_Word	sh_flags;
1403   Elf32_Addr	sh_addr;
1404   Elf32_Off	sh_offset;
1405   Elf32_Word	sh_size;
1406   Elf32_Word	sh_link;
1407   Elf32_Word	sh_info;
1408   Elf32_Word	sh_addralign;
1409   Elf32_Word	sh_entsize;
1410 } Elf32_Shdr;
1411 
1412 typedef struct elf64_shdr {
1413   Elf64_Word sh_name;		/* Section name, index in string tbl */
1414   Elf64_Word sh_type;		/* Type of section */
1415   Elf64_Xword sh_flags;		/* Miscellaneous section attributes */
1416   Elf64_Addr sh_addr;		/* Section virtual addr at execution */
1417   Elf64_Off sh_offset;		/* Section file offset */
1418   Elf64_Xword sh_size;		/* Size of section in bytes */
1419   Elf64_Word sh_link;		/* Index of another section */
1420   Elf64_Word sh_info;		/* Additional section information */
1421   Elf64_Xword sh_addralign;	/* Section alignment */
1422   Elf64_Xword sh_entsize;	/* Entry size if section holds table */
1423 } Elf64_Shdr;
1424 
1425 #define	EI_MAG0		0		/* e_ident[] indexes */
1426 #define	EI_MAG1		1
1427 #define	EI_MAG2		2
1428 #define	EI_MAG3		3
1429 #define	EI_CLASS	4
1430 #define	EI_DATA		5
1431 #define	EI_VERSION	6
1432 #define	EI_OSABI	7
1433 #define	EI_PAD		8
1434 
1435 #define ELFOSABI_NONE           0       /* UNIX System V ABI */
1436 #define ELFOSABI_SYSV           0       /* Alias.  */
1437 #define ELFOSABI_HPUX           1       /* HP-UX */
1438 #define ELFOSABI_NETBSD         2       /* NetBSD.  */
1439 #define ELFOSABI_LINUX          3       /* Linux.  */
1440 #define ELFOSABI_SOLARIS        6       /* Sun Solaris.  */
1441 #define ELFOSABI_AIX            7       /* IBM AIX.  */
1442 #define ELFOSABI_IRIX           8       /* SGI Irix.  */
1443 #define ELFOSABI_FREEBSD        9       /* FreeBSD.  */
1444 #define ELFOSABI_TRU64          10      /* Compaq TRU64 UNIX.  */
1445 #define ELFOSABI_MODESTO        11      /* Novell Modesto.  */
1446 #define ELFOSABI_OPENBSD        12      /* OpenBSD.  */
1447 #define ELFOSABI_ARM            97      /* ARM */
1448 #define ELFOSABI_STANDALONE     255     /* Standalone (embedded) application */
1449 
1450 #define	ELFMAG0		0x7f		/* EI_MAG */
1451 #define	ELFMAG1		'E'
1452 #define	ELFMAG2		'L'
1453 #define	ELFMAG3		'F'
1454 #define	ELFMAG		"\177ELF"
1455 #define	SELFMAG		4
1456 
1457 #define	ELFCLASSNONE	0		/* EI_CLASS */
1458 #define	ELFCLASS32	1
1459 #define	ELFCLASS64	2
1460 #define	ELFCLASSNUM	3
1461 
1462 #define ELFDATANONE	0		/* e_ident[EI_DATA] */
1463 #define ELFDATA2LSB	1
1464 #define ELFDATA2MSB	2
1465 
1466 #define EV_NONE		0		/* e_version, EI_VERSION */
1467 #define EV_CURRENT	1
1468 #define EV_NUM		2
1469 
1470 /* Notes used in ET_CORE */
1471 #define NT_PRSTATUS	1
1472 #define NT_FPREGSET     2
1473 #define NT_PRFPREG	2
1474 #define NT_PRPSINFO	3
1475 #define NT_TASKSTRUCT	4
1476 #define NT_AUXV		6
1477 #define NT_PRXFPREG     0x46e62b7f      /* copied from gdb5.1/include/elf/common.h */
1478 #define NT_S390_VXRS_HIGH 0x30a         /* s390 vector registers 16-31 */
1479 #define NT_S390_VXRS_LOW  0x309         /* s390 vector registers 0-15 (lower half) */
1480 #define NT_S390_PREFIX  0x305           /* s390 prefix register */
1481 #define NT_S390_CTRS    0x304           /* s390 control registers */
1482 #define NT_S390_TODPREG 0x303           /* s390 TOD programmable register */
1483 #define NT_S390_TODCMP  0x302           /* s390 TOD clock comparator register */
1484 #define NT_S390_TIMER   0x301           /* s390 timer register */
1485 #define NT_PPC_VMX       0x100          /* PowerPC Altivec/VMX registers */
1486 #define NT_PPC_SPE       0x101          /* PowerPC SPE/EVR registers */
1487 #define NT_PPC_VSX       0x102          /* PowerPC VSX registers */
1488 #define NT_ARM_VFP      0x400           /* ARM VFP/NEON registers */
1489 #define NT_ARM_TLS      0x401           /* ARM TLS register */
1490 #define NT_ARM_HW_BREAK 0x402           /* ARM hardware breakpoint registers */
1491 #define NT_ARM_HW_WATCH 0x403           /* ARM hardware watchpoint registers */
1492 #define NT_ARM_SYSTEM_CALL      0x404   /* ARM system call number */
1493 
1494 
1495 /* Note header in a PT_NOTE section */
1496 typedef struct elf32_note {
1497   Elf32_Word	n_namesz;	/* Name size */
1498   Elf32_Word	n_descsz;	/* Content size */
1499   Elf32_Word	n_type;		/* Content type */
1500 } Elf32_Nhdr;
1501 
1502 /* Note header in a PT_NOTE section */
1503 typedef struct elf64_note {
1504   Elf64_Word n_namesz;	/* Name size */
1505   Elf64_Word n_descsz;	/* Content size */
1506   Elf64_Word n_type;	/* Content type */
1507 } Elf64_Nhdr;
1508 
1509 
1510 /* This data structure represents a PT_LOAD segment.  */
1511 struct elf32_fdpic_loadseg {
1512   /* Core address to which the segment is mapped.  */
1513   Elf32_Addr addr;
1514   /* VMA recorded in the program header.  */
1515   Elf32_Addr p_vaddr;
1516   /* Size of this segment in memory.  */
1517   Elf32_Word p_memsz;
1518 };
1519 struct elf32_fdpic_loadmap {
1520   /* Protocol version number, must be zero.  */
1521   Elf32_Half version;
1522   /* Number of segments in this map.  */
1523   Elf32_Half nsegs;
1524   /* The actual memory map.  */
1525   struct elf32_fdpic_loadseg segs[/*nsegs*/];
1526 };
1527 
1528 #ifdef ELF_CLASS
1529 #if ELF_CLASS == ELFCLASS32
1530 
1531 #define elfhdr		elf32_hdr
1532 #define elf_phdr	elf32_phdr
1533 #define elf_note	elf32_note
1534 #define elf_shdr	elf32_shdr
1535 #define elf_sym		elf32_sym
1536 #define elf_addr_t	Elf32_Off
1537 #define elf_rela  elf32_rela
1538 
1539 #ifdef ELF_USES_RELOCA
1540 # define ELF_RELOC      Elf32_Rela
1541 #else
1542 # define ELF_RELOC      Elf32_Rel
1543 #endif
1544 
1545 #else
1546 
1547 #define elfhdr		elf64_hdr
1548 #define elf_phdr	elf64_phdr
1549 #define elf_note	elf64_note
1550 #define elf_shdr	elf64_shdr
1551 #define elf_sym		elf64_sym
1552 #define elf_addr_t	Elf64_Off
1553 #define elf_rela  elf64_rela
1554 
1555 #ifdef ELF_USES_RELOCA
1556 # define ELF_RELOC      Elf64_Rela
1557 #else
1558 # define ELF_RELOC      Elf64_Rel
1559 #endif
1560 
1561 #endif /* ELF_CLASS */
1562 
1563 #ifndef ElfW
1564 # if ELF_CLASS == ELFCLASS32
1565 #  define ElfW(x)  Elf32_ ## x
1566 #  define ELFW(x)  ELF32_ ## x
1567 # else
1568 #  define ElfW(x)  Elf64_ ## x
1569 #  define ELFW(x)  ELF64_ ## x
1570 # endif
1571 #endif
1572 
1573 #endif /* ELF_CLASS */
1574 
1575 
1576 #endif /* _QEMU_ELF_H */
1577