1 /* 2 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * * Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * * Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * * Neither the name of the Open Source and Linux Lab nor the 13 * names of its contributors may be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include "sysemu/sysemu.h" 29 #include "hw/boards.h" 30 #include "hw/loader.h" 31 #include "elf.h" 32 #include "exec/memory.h" 33 #include "exec/address-spaces.h" 34 #include "hw/char/serial.h" 35 #include "net/net.h" 36 #include "hw/sysbus.h" 37 #include "hw/block/flash.h" 38 #include "sysemu/blockdev.h" 39 #include "sysemu/char.h" 40 #include "sysemu/device_tree.h" 41 #include "qemu/error-report.h" 42 #include "bootparam.h" 43 44 typedef struct LxBoardDesc { 45 hwaddr flash_base; 46 size_t flash_size; 47 size_t flash_boot_base; 48 size_t flash_sector_size; 49 size_t sram_size; 50 } LxBoardDesc; 51 52 typedef struct Lx60FpgaState { 53 MemoryRegion iomem; 54 uint32_t leds; 55 uint32_t switches; 56 } Lx60FpgaState; 57 58 static void lx60_fpga_reset(void *opaque) 59 { 60 Lx60FpgaState *s = opaque; 61 62 s->leds = 0; 63 s->switches = 0; 64 } 65 66 static uint64_t lx60_fpga_read(void *opaque, hwaddr addr, 67 unsigned size) 68 { 69 Lx60FpgaState *s = opaque; 70 71 switch (addr) { 72 case 0x0: /*build date code*/ 73 return 0x09272011; 74 75 case 0x4: /*processor clock frequency, Hz*/ 76 return 10000000; 77 78 case 0x8: /*LEDs (off = 0, on = 1)*/ 79 return s->leds; 80 81 case 0xc: /*DIP switches (off = 0, on = 1)*/ 82 return s->switches; 83 } 84 return 0; 85 } 86 87 static void lx60_fpga_write(void *opaque, hwaddr addr, 88 uint64_t val, unsigned size) 89 { 90 Lx60FpgaState *s = opaque; 91 92 switch (addr) { 93 case 0x8: /*LEDs (off = 0, on = 1)*/ 94 s->leds = val; 95 break; 96 97 case 0x10: /*board reset*/ 98 if (val == 0xdead) { 99 qemu_system_reset_request(); 100 } 101 break; 102 } 103 } 104 105 static const MemoryRegionOps lx60_fpga_ops = { 106 .read = lx60_fpga_read, 107 .write = lx60_fpga_write, 108 .endianness = DEVICE_NATIVE_ENDIAN, 109 }; 110 111 static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space, 112 hwaddr base) 113 { 114 Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState)); 115 116 memory_region_init_io(&s->iomem, NULL, &lx60_fpga_ops, s, 117 "lx60.fpga", 0x10000); 118 memory_region_add_subregion(address_space, base, &s->iomem); 119 lx60_fpga_reset(s); 120 qemu_register_reset(lx60_fpga_reset, s); 121 return s; 122 } 123 124 static void lx60_net_init(MemoryRegion *address_space, 125 hwaddr base, 126 hwaddr descriptors, 127 hwaddr buffers, 128 qemu_irq irq, NICInfo *nd) 129 { 130 DeviceState *dev; 131 SysBusDevice *s; 132 MemoryRegion *ram; 133 134 dev = qdev_create(NULL, "open_eth"); 135 qdev_set_nic_properties(dev, nd); 136 qdev_init_nofail(dev); 137 138 s = SYS_BUS_DEVICE(dev); 139 sysbus_connect_irq(s, 0, irq); 140 memory_region_add_subregion(address_space, base, 141 sysbus_mmio_get_region(s, 0)); 142 memory_region_add_subregion(address_space, descriptors, 143 sysbus_mmio_get_region(s, 1)); 144 145 ram = g_malloc(sizeof(*ram)); 146 memory_region_init_ram(ram, OBJECT(s), "open_eth.ram", 16384); 147 vmstate_register_ram_global(ram); 148 memory_region_add_subregion(address_space, buffers, ram); 149 } 150 151 static uint64_t translate_phys_addr(void *opaque, uint64_t addr) 152 { 153 XtensaCPU *cpu = opaque; 154 155 return cpu_get_phys_page_debug(CPU(cpu), addr); 156 } 157 158 static void lx60_reset(void *opaque) 159 { 160 XtensaCPU *cpu = opaque; 161 162 cpu_reset(CPU(cpu)); 163 } 164 165 static void lx_init(const LxBoardDesc *board, MachineState *machine) 166 { 167 #ifdef TARGET_WORDS_BIGENDIAN 168 int be = 1; 169 #else 170 int be = 0; 171 #endif 172 MemoryRegion *system_memory = get_system_memory(); 173 XtensaCPU *cpu = NULL; 174 CPUXtensaState *env = NULL; 175 MemoryRegion *ram, *rom, *system_io; 176 DriveInfo *dinfo; 177 pflash_t *flash = NULL; 178 QemuOpts *machine_opts = qemu_get_machine_opts(); 179 const char *cpu_model = machine->cpu_model; 180 const char *kernel_filename = qemu_opt_get(machine_opts, "kernel"); 181 const char *kernel_cmdline = qemu_opt_get(machine_opts, "append"); 182 const char *dtb_filename = qemu_opt_get(machine_opts, "dtb"); 183 const char *initrd_filename = qemu_opt_get(machine_opts, "initrd"); 184 int n; 185 186 if (!cpu_model) { 187 cpu_model = XTENSA_DEFAULT_CPU_MODEL; 188 } 189 190 for (n = 0; n < smp_cpus; n++) { 191 cpu = cpu_xtensa_init(cpu_model); 192 if (cpu == NULL) { 193 error_report("unable to find CPU definition '%s'\n", 194 cpu_model); 195 exit(EXIT_FAILURE); 196 } 197 env = &cpu->env; 198 199 env->sregs[PRID] = n; 200 qemu_register_reset(lx60_reset, cpu); 201 /* Need MMU initialized prior to ELF loading, 202 * so that ELF gets loaded into virtual addresses 203 */ 204 cpu_reset(CPU(cpu)); 205 } 206 207 ram = g_malloc(sizeof(*ram)); 208 memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size); 209 vmstate_register_ram_global(ram); 210 memory_region_add_subregion(system_memory, 0, ram); 211 212 system_io = g_malloc(sizeof(*system_io)); 213 memory_region_init(system_io, NULL, "lx60.io", 224 * 1024 * 1024); 214 memory_region_add_subregion(system_memory, 0xf0000000, system_io); 215 lx60_fpga_init(system_io, 0x0d020000); 216 if (nd_table[0].used) { 217 lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000, 218 xtensa_get_extint(env, 1), nd_table); 219 } 220 221 if (!serial_hds[0]) { 222 serial_hds[0] = qemu_chr_new("serial0", "null", NULL); 223 } 224 225 serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0), 226 115200, serial_hds[0], DEVICE_NATIVE_ENDIAN); 227 228 dinfo = drive_get(IF_PFLASH, 0, 0); 229 if (dinfo) { 230 flash = pflash_cfi01_register(board->flash_base, 231 NULL, "lx60.io.flash", board->flash_size, 232 dinfo->bdrv, board->flash_sector_size, 233 board->flash_size / board->flash_sector_size, 234 4, 0x0000, 0x0000, 0x0000, 0x0000, be); 235 if (flash == NULL) { 236 error_report("unable to mount pflash\n"); 237 exit(EXIT_FAILURE); 238 } 239 } 240 241 /* Use presence of kernel file name as 'boot from SRAM' switch. */ 242 if (kernel_filename) { 243 uint32_t entry_point = env->pc; 244 size_t bp_size = 3 * get_tag_size(0); /* first/last and memory tags */ 245 uint32_t tagptr = 0xfe000000 + board->sram_size; 246 uint32_t cur_tagptr; 247 BpMemInfo memory_location = { 248 .type = tswap32(MEMORY_TYPE_CONVENTIONAL), 249 .start = tswap32(0), 250 .end = tswap32(machine->ram_size), 251 }; 252 uint32_t lowmem_end = machine->ram_size < 0x08000000 ? 253 machine->ram_size : 0x08000000; 254 uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096); 255 256 rom = g_malloc(sizeof(*rom)); 257 memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size); 258 vmstate_register_ram_global(rom); 259 memory_region_add_subregion(system_memory, 0xfe000000, rom); 260 261 if (kernel_cmdline) { 262 bp_size += get_tag_size(strlen(kernel_cmdline) + 1); 263 } 264 if (dtb_filename) { 265 bp_size += get_tag_size(sizeof(uint32_t)); 266 } 267 if (initrd_filename) { 268 bp_size += get_tag_size(sizeof(BpMemInfo)); 269 } 270 271 /* Put kernel bootparameters to the end of that SRAM */ 272 tagptr = (tagptr - bp_size) & ~0xff; 273 cur_tagptr = put_tag(tagptr, BP_TAG_FIRST, 0, NULL); 274 cur_tagptr = put_tag(cur_tagptr, BP_TAG_MEMORY, 275 sizeof(memory_location), &memory_location); 276 277 if (kernel_cmdline) { 278 cur_tagptr = put_tag(cur_tagptr, BP_TAG_COMMAND_LINE, 279 strlen(kernel_cmdline) + 1, kernel_cmdline); 280 } 281 if (dtb_filename) { 282 int fdt_size; 283 void *fdt = load_device_tree(dtb_filename, &fdt_size); 284 uint32_t dtb_addr = tswap32(cur_lowmem); 285 286 if (!fdt) { 287 error_report("could not load DTB '%s'\n", dtb_filename); 288 exit(EXIT_FAILURE); 289 } 290 291 cpu_physical_memory_write(cur_lowmem, fdt, fdt_size); 292 cur_tagptr = put_tag(cur_tagptr, BP_TAG_FDT, 293 sizeof(dtb_addr), &dtb_addr); 294 cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4096); 295 } 296 if (initrd_filename) { 297 BpMemInfo initrd_location = { 0 }; 298 int initrd_size = load_ramdisk(initrd_filename, cur_lowmem, 299 lowmem_end - cur_lowmem); 300 301 if (initrd_size < 0) { 302 initrd_size = load_image_targphys(initrd_filename, 303 cur_lowmem, 304 lowmem_end - cur_lowmem); 305 } 306 if (initrd_size < 0) { 307 error_report("could not load initrd '%s'\n", initrd_filename); 308 exit(EXIT_FAILURE); 309 } 310 initrd_location.start = tswap32(cur_lowmem); 311 initrd_location.end = tswap32(cur_lowmem + initrd_size); 312 cur_tagptr = put_tag(cur_tagptr, BP_TAG_INITRD, 313 sizeof(initrd_location), &initrd_location); 314 cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + initrd_size, 4096); 315 } 316 cur_tagptr = put_tag(cur_tagptr, BP_TAG_LAST, 0, NULL); 317 env->regs[2] = tagptr; 318 319 uint64_t elf_entry; 320 uint64_t elf_lowaddr; 321 int success = load_elf(kernel_filename, translate_phys_addr, cpu, 322 &elf_entry, &elf_lowaddr, NULL, be, ELF_MACHINE, 0); 323 if (success > 0) { 324 entry_point = elf_entry; 325 } else { 326 hwaddr ep; 327 int is_linux; 328 success = load_uimage(kernel_filename, &ep, NULL, &is_linux); 329 if (success > 0 && is_linux) { 330 entry_point = ep; 331 } else { 332 error_report("could not load kernel '%s'\n", 333 kernel_filename); 334 exit(EXIT_FAILURE); 335 } 336 } 337 if (entry_point != env->pc) { 338 static const uint8_t jx_a0[] = { 339 #ifdef TARGET_WORDS_BIGENDIAN 340 0x0a, 0, 0, 341 #else 342 0xa0, 0, 0, 343 #endif 344 }; 345 env->regs[0] = entry_point; 346 cpu_physical_memory_write(env->pc, jx_a0, sizeof(jx_a0)); 347 } 348 } else { 349 if (flash) { 350 MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash); 351 MemoryRegion *flash_io = g_malloc(sizeof(*flash_io)); 352 353 memory_region_init_alias(flash_io, NULL, "lx60.flash", 354 flash_mr, board->flash_boot_base, 355 board->flash_size - board->flash_boot_base < 0x02000000 ? 356 board->flash_size - board->flash_boot_base : 0x02000000); 357 memory_region_add_subregion(system_memory, 0xfe000000, 358 flash_io); 359 } 360 } 361 } 362 363 static void xtensa_lx60_init(MachineState *machine) 364 { 365 static const LxBoardDesc lx60_board = { 366 .flash_base = 0xf8000000, 367 .flash_size = 0x00400000, 368 .flash_sector_size = 0x10000, 369 .sram_size = 0x20000, 370 }; 371 lx_init(&lx60_board, machine); 372 } 373 374 static void xtensa_lx200_init(MachineState *machine) 375 { 376 static const LxBoardDesc lx200_board = { 377 .flash_base = 0xf8000000, 378 .flash_size = 0x01000000, 379 .flash_sector_size = 0x20000, 380 .sram_size = 0x2000000, 381 }; 382 lx_init(&lx200_board, machine); 383 } 384 385 static void xtensa_ml605_init(MachineState *machine) 386 { 387 static const LxBoardDesc ml605_board = { 388 .flash_base = 0xf8000000, 389 .flash_size = 0x02000000, 390 .flash_sector_size = 0x20000, 391 .sram_size = 0x2000000, 392 }; 393 lx_init(&ml605_board, machine); 394 } 395 396 static void xtensa_kc705_init(MachineState *machine) 397 { 398 static const LxBoardDesc kc705_board = { 399 .flash_base = 0xf0000000, 400 .flash_size = 0x08000000, 401 .flash_boot_base = 0x06000000, 402 .flash_sector_size = 0x20000, 403 .sram_size = 0x2000000, 404 }; 405 lx_init(&kc705_board, machine); 406 } 407 408 static QEMUMachine xtensa_lx60_machine = { 409 .name = "lx60", 410 .desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")", 411 .init = xtensa_lx60_init, 412 .max_cpus = 4, 413 }; 414 415 static QEMUMachine xtensa_lx200_machine = { 416 .name = "lx200", 417 .desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")", 418 .init = xtensa_lx200_init, 419 .max_cpus = 4, 420 }; 421 422 static QEMUMachine xtensa_ml605_machine = { 423 .name = "ml605", 424 .desc = "ml605 EVB (" XTENSA_DEFAULT_CPU_MODEL ")", 425 .init = xtensa_ml605_init, 426 .max_cpus = 4, 427 }; 428 429 static QEMUMachine xtensa_kc705_machine = { 430 .name = "kc705", 431 .desc = "kc705 EVB (" XTENSA_DEFAULT_CPU_MODEL ")", 432 .init = xtensa_kc705_init, 433 .max_cpus = 4, 434 }; 435 436 static void xtensa_lx_machines_init(void) 437 { 438 qemu_register_machine(&xtensa_lx60_machine); 439 qemu_register_machine(&xtensa_lx200_machine); 440 qemu_register_machine(&xtensa_ml605_machine); 441 qemu_register_machine(&xtensa_kc705_machine); 442 } 443 444 machine_init(xtensa_lx_machines_init); 445