1 /* 2 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * * Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * * Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * * Neither the name of the Open Source and Linux Lab nor the 13 * names of its contributors may be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include "qemu/osdep.h" 29 #include "qapi/error.h" 30 #include "qemu-common.h" 31 #include "cpu.h" 32 #include "sysemu/sysemu.h" 33 #include "hw/boards.h" 34 #include "hw/loader.h" 35 #include "elf.h" 36 #include "exec/memory.h" 37 #include "exec/address-spaces.h" 38 #include "qemu/error-report.h" 39 #include "xtensa_memory.h" 40 41 static uint64_t translate_phys_addr(void *opaque, uint64_t addr) 42 { 43 XtensaCPU *cpu = opaque; 44 45 return cpu_get_phys_page_debug(CPU(cpu), addr); 46 } 47 48 static void sim_reset(void *opaque) 49 { 50 XtensaCPU *cpu = opaque; 51 52 cpu_reset(CPU(cpu)); 53 } 54 55 static void xtensa_sim_init(MachineState *machine) 56 { 57 XtensaCPU *cpu = NULL; 58 CPUXtensaState *env = NULL; 59 ram_addr_t ram_size = machine->ram_size; 60 const char *kernel_filename = machine->kernel_filename; 61 int n; 62 63 for (n = 0; n < smp_cpus; n++) { 64 cpu = XTENSA_CPU(cpu_create(machine->cpu_type)); 65 env = &cpu->env; 66 67 env->sregs[PRID] = n; 68 qemu_register_reset(sim_reset, cpu); 69 /* Need MMU initialized prior to ELF loading, 70 * so that ELF gets loaded into virtual addresses 71 */ 72 sim_reset(cpu); 73 } 74 75 if (env) { 76 XtensaMemory sysram = env->config->sysram; 77 78 sysram.location[0].size = ram_size; 79 xtensa_create_memory_regions(&env->config->instrom, "xtensa.instrom", 80 get_system_memory()); 81 xtensa_create_memory_regions(&env->config->instram, "xtensa.instram", 82 get_system_memory()); 83 xtensa_create_memory_regions(&env->config->datarom, "xtensa.datarom", 84 get_system_memory()); 85 xtensa_create_memory_regions(&env->config->dataram, "xtensa.dataram", 86 get_system_memory()); 87 xtensa_create_memory_regions(&env->config->sysrom, "xtensa.sysrom", 88 get_system_memory()); 89 xtensa_create_memory_regions(&sysram, "xtensa.sysram", 90 get_system_memory()); 91 } 92 93 if (serial_hd(0)) { 94 xtensa_sim_open_console(serial_hd(0)); 95 } 96 if (kernel_filename) { 97 uint64_t elf_entry; 98 uint64_t elf_lowaddr; 99 #ifdef TARGET_WORDS_BIGENDIAN 100 int success = load_elf(kernel_filename, NULL, 101 translate_phys_addr, cpu, 102 &elf_entry, &elf_lowaddr, 103 NULL, 1, EM_XTENSA, 0, 0); 104 #else 105 int success = load_elf(kernel_filename, NULL, 106 translate_phys_addr, cpu, 107 &elf_entry, &elf_lowaddr, 108 NULL, 0, EM_XTENSA, 0, 0); 109 #endif 110 if (success > 0) { 111 env->pc = elf_entry; 112 } 113 } 114 } 115 116 static void xtensa_sim_machine_init(MachineClass *mc) 117 { 118 mc->desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")"; 119 mc->is_default = true; 120 mc->init = xtensa_sim_init; 121 mc->max_cpus = 4; 122 mc->no_serial = 1; 123 mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE; 124 } 125 126 DEFINE_MACHINE("sim", xtensa_sim_machine_init) 127