1 /* 2 * Virtual hardware watchdog. 3 * 4 * Copyright (C) 2009 Red Hat Inc. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 2 9 * of the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 * 19 * By Richard W.M. Jones (rjones@redhat.com). 20 */ 21 22 #include <inttypes.h> 23 24 #include "qemu-common.h" 25 #include "qemu/timer.h" 26 #include "sysemu/watchdog.h" 27 #include "hw/hw.h" 28 #include "hw/pci/pci.h" 29 30 /*#define I6300ESB_DEBUG 1*/ 31 32 #ifdef I6300ESB_DEBUG 33 #define i6300esb_debug(fs,...) \ 34 fprintf(stderr,"i6300esb: %s: "fs,__func__,##__VA_ARGS__) 35 #else 36 #define i6300esb_debug(fs,...) 37 #endif 38 39 /* PCI configuration registers */ 40 #define ESB_CONFIG_REG 0x60 /* Config register */ 41 #define ESB_LOCK_REG 0x68 /* WDT lock register */ 42 43 /* Memory mapped registers (offset from base address) */ 44 #define ESB_TIMER1_REG 0x00 /* Timer1 value after each reset */ 45 #define ESB_TIMER2_REG 0x04 /* Timer2 value after each reset */ 46 #define ESB_GINTSR_REG 0x08 /* General Interrupt Status Register */ 47 #define ESB_RELOAD_REG 0x0c /* Reload register */ 48 49 /* Lock register bits */ 50 #define ESB_WDT_FUNC (0x01 << 2) /* Watchdog functionality */ 51 #define ESB_WDT_ENABLE (0x01 << 1) /* Enable WDT */ 52 #define ESB_WDT_LOCK (0x01 << 0) /* Lock (nowayout) */ 53 54 /* Config register bits */ 55 #define ESB_WDT_REBOOT (0x01 << 5) /* Enable reboot on timeout */ 56 #define ESB_WDT_FREQ (0x01 << 2) /* Decrement frequency */ 57 #define ESB_WDT_INTTYPE (0x11 << 0) /* Interrupt type on timer1 timeout */ 58 59 /* Reload register bits */ 60 #define ESB_WDT_RELOAD (0x01 << 8) /* prevent timeout */ 61 62 /* Magic constants */ 63 #define ESB_UNLOCK1 0x80 /* Step 1 to unlock reset registers */ 64 #define ESB_UNLOCK2 0x86 /* Step 2 to unlock reset registers */ 65 66 /* Device state. */ 67 struct I6300State { 68 PCIDevice dev; 69 MemoryRegion io_mem; 70 71 int reboot_enabled; /* "Reboot" on timer expiry. The real action 72 * performed depends on the -watchdog-action 73 * param passed on QEMU command line. 74 */ 75 int clock_scale; /* Clock scale. */ 76 #define CLOCK_SCALE_1KHZ 0 77 #define CLOCK_SCALE_1MHZ 1 78 79 int int_type; /* Interrupt type generated. */ 80 #define INT_TYPE_IRQ 0 /* APIC 1, INT 10 */ 81 #define INT_TYPE_SMI 2 82 #define INT_TYPE_DISABLED 3 83 84 int free_run; /* If true, reload timer on expiry. */ 85 int locked; /* If true, enabled field cannot be changed. */ 86 int enabled; /* If true, watchdog is enabled. */ 87 88 QEMUTimer *timer; /* The actual watchdog timer. */ 89 90 uint32_t timer1_preload; /* Values preloaded into timer1, timer2. */ 91 uint32_t timer2_preload; 92 int stage; /* Stage (1 or 2). */ 93 94 int unlock_state; /* Guest writes 0x80, 0x86 to unlock the 95 * registers, and we transition through 96 * states 0 -> 1 -> 2 when this happens. 97 */ 98 99 int previous_reboot_flag; /* If the watchdog caused the previous 100 * reboot, this flag will be set. 101 */ 102 }; 103 104 typedef struct I6300State I6300State; 105 106 #define TYPE_WATCHDOG_I6300ESB_DEVICE "i6300esb" 107 #define WATCHDOG_I6300ESB_DEVICE(obj) \ 108 OBJECT_CHECK(I6300State, (obj), TYPE_WATCHDOG_I6300ESB_DEVICE) 109 110 /* This function is called when the watchdog has either been enabled 111 * (hence it starts counting down) or has been keep-alived. 112 */ 113 static void i6300esb_restart_timer(I6300State *d, int stage) 114 { 115 int64_t timeout; 116 117 if (!d->enabled) 118 return; 119 120 d->stage = stage; 121 122 if (d->stage <= 1) 123 timeout = d->timer1_preload; 124 else 125 timeout = d->timer2_preload; 126 127 if (d->clock_scale == CLOCK_SCALE_1KHZ) 128 timeout <<= 15; 129 else 130 timeout <<= 5; 131 132 /* Get the timeout in units of ticks_per_sec. 133 * 134 * ticks_per_sec is typically 10^9 == 0x3B9ACA00 (30 bits), with 135 * 20 bits of user supplied preload, and 15 bits of scale, the 136 * multiply here can exceed 64-bits, before we divide by 33MHz, so 137 * we use a higher-precision intermediate result. 138 */ 139 timeout = muldiv64(get_ticks_per_sec(), timeout, 33000000); 140 141 i6300esb_debug("stage %d, timeout %" PRIi64 "\n", d->stage, timeout); 142 143 timer_mod(d->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + timeout); 144 } 145 146 /* This is called when the guest disables the watchdog. */ 147 static void i6300esb_disable_timer(I6300State *d) 148 { 149 i6300esb_debug("timer disabled\n"); 150 151 timer_del(d->timer); 152 } 153 154 static void i6300esb_reset(DeviceState *dev) 155 { 156 PCIDevice *pdev = PCI_DEVICE(dev); 157 I6300State *d = WATCHDOG_I6300ESB_DEVICE(pdev); 158 159 i6300esb_debug("I6300State = %p\n", d); 160 161 i6300esb_disable_timer(d); 162 163 /* NB: Don't change d->previous_reboot_flag in this function. */ 164 165 d->reboot_enabled = 1; 166 d->clock_scale = CLOCK_SCALE_1KHZ; 167 d->int_type = INT_TYPE_IRQ; 168 d->free_run = 0; 169 d->locked = 0; 170 d->enabled = 0; 171 d->timer1_preload = 0xfffff; 172 d->timer2_preload = 0xfffff; 173 d->stage = 1; 174 d->unlock_state = 0; 175 } 176 177 /* This function is called when the watchdog expires. Note that 178 * the hardware has two timers, and so expiry happens in two stages. 179 * If d->stage == 1 then we perform the first stage action (usually, 180 * sending an interrupt) and then restart the timer again for the 181 * second stage. If the second stage expires then the watchdog 182 * really has run out. 183 */ 184 static void i6300esb_timer_expired(void *vp) 185 { 186 I6300State *d = vp; 187 188 i6300esb_debug("stage %d\n", d->stage); 189 190 if (d->stage == 1) { 191 /* What to do at the end of stage 1? */ 192 switch (d->int_type) { 193 case INT_TYPE_IRQ: 194 fprintf(stderr, "i6300esb_timer_expired: I would send APIC 1 INT 10 here if I knew how (XXX)\n"); 195 break; 196 case INT_TYPE_SMI: 197 fprintf(stderr, "i6300esb_timer_expired: I would send SMI here if I knew how (XXX)\n"); 198 break; 199 } 200 201 /* Start the second stage. */ 202 i6300esb_restart_timer(d, 2); 203 } else { 204 /* Second stage expired, reboot for real. */ 205 if (d->reboot_enabled) { 206 d->previous_reboot_flag = 1; 207 watchdog_perform_action(); /* This reboots, exits, etc */ 208 i6300esb_reset(&d->dev.qdev); 209 } 210 211 /* In "free running mode" we start stage 1 again. */ 212 if (d->free_run) 213 i6300esb_restart_timer(d, 1); 214 } 215 } 216 217 static void i6300esb_config_write(PCIDevice *dev, uint32_t addr, 218 uint32_t data, int len) 219 { 220 I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev); 221 int old; 222 223 i6300esb_debug("addr = %x, data = %x, len = %d\n", addr, data, len); 224 225 if (addr == ESB_CONFIG_REG && len == 2) { 226 d->reboot_enabled = (data & ESB_WDT_REBOOT) == 0; 227 d->clock_scale = 228 (data & ESB_WDT_FREQ) != 0 ? CLOCK_SCALE_1MHZ : CLOCK_SCALE_1KHZ; 229 d->int_type = (data & ESB_WDT_INTTYPE); 230 } else if (addr == ESB_LOCK_REG && len == 1) { 231 if (!d->locked) { 232 d->locked = (data & ESB_WDT_LOCK) != 0; 233 d->free_run = (data & ESB_WDT_FUNC) != 0; 234 old = d->enabled; 235 d->enabled = (data & ESB_WDT_ENABLE) != 0; 236 if (!old && d->enabled) /* Enabled transitioned from 0 -> 1 */ 237 i6300esb_restart_timer(d, 1); 238 else if (!d->enabled) 239 i6300esb_disable_timer(d); 240 } 241 } else { 242 pci_default_write_config(dev, addr, data, len); 243 } 244 } 245 246 static uint32_t i6300esb_config_read(PCIDevice *dev, uint32_t addr, int len) 247 { 248 I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev); 249 uint32_t data; 250 251 i6300esb_debug ("addr = %x, len = %d\n", addr, len); 252 253 if (addr == ESB_CONFIG_REG && len == 2) { 254 data = 255 (d->reboot_enabled ? 0 : ESB_WDT_REBOOT) | 256 (d->clock_scale == CLOCK_SCALE_1MHZ ? ESB_WDT_FREQ : 0) | 257 d->int_type; 258 return data; 259 } else if (addr == ESB_LOCK_REG && len == 1) { 260 data = 261 (d->free_run ? ESB_WDT_FUNC : 0) | 262 (d->locked ? ESB_WDT_LOCK : 0) | 263 (d->enabled ? ESB_WDT_ENABLE : 0); 264 return data; 265 } else { 266 return pci_default_read_config(dev, addr, len); 267 } 268 } 269 270 static uint32_t i6300esb_mem_readb(void *vp, hwaddr addr) 271 { 272 i6300esb_debug ("addr = %x\n", (int) addr); 273 274 return 0; 275 } 276 277 static uint32_t i6300esb_mem_readw(void *vp, hwaddr addr) 278 { 279 uint32_t data = 0; 280 I6300State *d = vp; 281 282 i6300esb_debug("addr = %x\n", (int) addr); 283 284 if (addr == 0xc) { 285 /* The previous reboot flag is really bit 9, but there is 286 * a bug in the Linux driver where it thinks it's bit 12. 287 * Set both. 288 */ 289 data = d->previous_reboot_flag ? 0x1200 : 0; 290 } 291 292 return data; 293 } 294 295 static uint32_t i6300esb_mem_readl(void *vp, hwaddr addr) 296 { 297 i6300esb_debug("addr = %x\n", (int) addr); 298 299 return 0; 300 } 301 302 static void i6300esb_mem_writeb(void *vp, hwaddr addr, uint32_t val) 303 { 304 I6300State *d = vp; 305 306 i6300esb_debug("addr = %x, val = %x\n", (int) addr, val); 307 308 if (addr == 0xc && val == 0x80) 309 d->unlock_state = 1; 310 else if (addr == 0xc && val == 0x86 && d->unlock_state == 1) 311 d->unlock_state = 2; 312 } 313 314 static void i6300esb_mem_writew(void *vp, hwaddr addr, uint32_t val) 315 { 316 I6300State *d = vp; 317 318 i6300esb_debug("addr = %x, val = %x\n", (int) addr, val); 319 320 if (addr == 0xc && val == 0x80) 321 d->unlock_state = 1; 322 else if (addr == 0xc && val == 0x86 && d->unlock_state == 1) 323 d->unlock_state = 2; 324 else { 325 if (d->unlock_state == 2) { 326 if (addr == 0xc) { 327 if ((val & 0x100) != 0) 328 /* This is the "ping" from the userspace watchdog in 329 * the guest ... 330 */ 331 i6300esb_restart_timer(d, 1); 332 333 /* Setting bit 9 resets the previous reboot flag. 334 * There's a bug in the Linux driver where it sets 335 * bit 12 instead. 336 */ 337 if ((val & 0x200) != 0 || (val & 0x1000) != 0) { 338 d->previous_reboot_flag = 0; 339 } 340 } 341 342 d->unlock_state = 0; 343 } 344 } 345 } 346 347 static void i6300esb_mem_writel(void *vp, hwaddr addr, uint32_t val) 348 { 349 I6300State *d = vp; 350 351 i6300esb_debug ("addr = %x, val = %x\n", (int) addr, val); 352 353 if (addr == 0xc && val == 0x80) 354 d->unlock_state = 1; 355 else if (addr == 0xc && val == 0x86 && d->unlock_state == 1) 356 d->unlock_state = 2; 357 else { 358 if (d->unlock_state == 2) { 359 if (addr == 0) 360 d->timer1_preload = val & 0xfffff; 361 else if (addr == 4) 362 d->timer2_preload = val & 0xfffff; 363 364 d->unlock_state = 0; 365 } 366 } 367 } 368 369 static const MemoryRegionOps i6300esb_ops = { 370 .old_mmio = { 371 .read = { 372 i6300esb_mem_readb, 373 i6300esb_mem_readw, 374 i6300esb_mem_readl, 375 }, 376 .write = { 377 i6300esb_mem_writeb, 378 i6300esb_mem_writew, 379 i6300esb_mem_writel, 380 }, 381 }, 382 .endianness = DEVICE_LITTLE_ENDIAN, 383 }; 384 385 static const VMStateDescription vmstate_i6300esb = { 386 .name = "i6300esb_wdt", 387 /* With this VMSD's introduction, version_id/minimum_version_id were 388 * erroneously set to sizeof(I6300State), causing a somewhat random 389 * version_id to be set for every build. This eventually broke 390 * migration. 391 * 392 * To correct this without breaking old->new migration for older 393 * versions of QEMU, we've set version_id to a value high enough 394 * to exceed all past values of sizeof(I6300State) across various 395 * build environments, and have reset minimum_version_id to 1, 396 * since this VMSD has never changed and thus can accept all past 397 * versions. 398 * 399 * For future changes we can treat these values as we normally would. 400 */ 401 .version_id = 10000, 402 .minimum_version_id = 1, 403 .fields = (VMStateField[]) { 404 VMSTATE_PCI_DEVICE(dev, I6300State), 405 VMSTATE_INT32(reboot_enabled, I6300State), 406 VMSTATE_INT32(clock_scale, I6300State), 407 VMSTATE_INT32(int_type, I6300State), 408 VMSTATE_INT32(free_run, I6300State), 409 VMSTATE_INT32(locked, I6300State), 410 VMSTATE_INT32(enabled, I6300State), 411 VMSTATE_TIMER_PTR(timer, I6300State), 412 VMSTATE_UINT32(timer1_preload, I6300State), 413 VMSTATE_UINT32(timer2_preload, I6300State), 414 VMSTATE_INT32(stage, I6300State), 415 VMSTATE_INT32(unlock_state, I6300State), 416 VMSTATE_INT32(previous_reboot_flag, I6300State), 417 VMSTATE_END_OF_LIST() 418 } 419 }; 420 421 static void i6300esb_realize(PCIDevice *dev, Error **errp) 422 { 423 I6300State *d = WATCHDOG_I6300ESB_DEVICE(dev); 424 425 i6300esb_debug("I6300State = %p\n", d); 426 427 d->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, i6300esb_timer_expired, d); 428 d->previous_reboot_flag = 0; 429 430 memory_region_init_io(&d->io_mem, OBJECT(d), &i6300esb_ops, d, 431 "i6300esb", 0x10); 432 pci_register_bar(&d->dev, 0, 0, &d->io_mem); 433 /* qemu_register_coalesced_mmio (addr, 0x10); ? */ 434 } 435 436 static WatchdogTimerModel model = { 437 .wdt_name = "i6300esb", 438 .wdt_description = "Intel 6300ESB", 439 }; 440 441 static void i6300esb_class_init(ObjectClass *klass, void *data) 442 { 443 DeviceClass *dc = DEVICE_CLASS(klass); 444 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 445 446 k->config_read = i6300esb_config_read; 447 k->config_write = i6300esb_config_write; 448 k->realize = i6300esb_realize; 449 k->vendor_id = PCI_VENDOR_ID_INTEL; 450 k->device_id = PCI_DEVICE_ID_INTEL_ESB_9; 451 k->class_id = PCI_CLASS_SYSTEM_OTHER; 452 dc->reset = i6300esb_reset; 453 dc->vmsd = &vmstate_i6300esb; 454 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 455 } 456 457 static const TypeInfo i6300esb_info = { 458 .name = TYPE_WATCHDOG_I6300ESB_DEVICE, 459 .parent = TYPE_PCI_DEVICE, 460 .instance_size = sizeof(I6300State), 461 .class_init = i6300esb_class_init, 462 }; 463 464 static void i6300esb_register_types(void) 465 { 466 watchdog_add_model(&model); 467 type_register_static(&i6300esb_info); 468 } 469 470 type_init(i6300esb_register_types) 471