1 /* 2 * Virtio PCI Bindings 3 * 4 * Copyright IBM, Corp. 2007 5 * Copyright (c) 2009 CodeSourcery 6 * 7 * Authors: 8 * Anthony Liguori <aliguori@us.ibm.com> 9 * Paul Brook <paul@codesourcery.com> 10 * 11 * This work is licensed under the terms of the GNU GPL, version 2. See 12 * the COPYING file in the top-level directory. 13 * 14 * Contributions after 2012-01-13 are licensed under the terms of the 15 * GNU GPL, version 2 or (at your option) any later version. 16 */ 17 18 #include "qemu/osdep.h" 19 20 #include "exec/memop.h" 21 #include "standard-headers/linux/virtio_pci.h" 22 #include "hw/virtio/virtio.h" 23 #include "migration/qemu-file-types.h" 24 #include "hw/pci/pci.h" 25 #include "hw/pci/pci_bus.h" 26 #include "hw/qdev-properties.h" 27 #include "qapi/error.h" 28 #include "qemu/error-report.h" 29 #include "qemu/module.h" 30 #include "hw/pci/msi.h" 31 #include "hw/pci/msix.h" 32 #include "hw/loader.h" 33 #include "sysemu/kvm.h" 34 #include "virtio-pci.h" 35 #include "qemu/range.h" 36 #include "hw/virtio/virtio-bus.h" 37 #include "qapi/visitor.h" 38 39 #define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev)) 40 41 #undef VIRTIO_PCI_CONFIG 42 43 /* The remaining space is defined by each driver as the per-driver 44 * configuration space */ 45 #define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev)) 46 47 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size, 48 VirtIOPCIProxy *dev); 49 static void virtio_pci_reset(DeviceState *qdev); 50 51 /* virtio device */ 52 /* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */ 53 static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d) 54 { 55 return container_of(d, VirtIOPCIProxy, pci_dev.qdev); 56 } 57 58 /* DeviceState to VirtIOPCIProxy. Note: used on datapath, 59 * be careful and test performance if you change this. 60 */ 61 static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d) 62 { 63 return container_of(d, VirtIOPCIProxy, pci_dev.qdev); 64 } 65 66 static void virtio_pci_notify(DeviceState *d, uint16_t vector) 67 { 68 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d); 69 70 if (msix_enabled(&proxy->pci_dev)) 71 msix_notify(&proxy->pci_dev, vector); 72 else { 73 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 74 pci_set_irq(&proxy->pci_dev, atomic_read(&vdev->isr) & 1); 75 } 76 } 77 78 static void virtio_pci_save_config(DeviceState *d, QEMUFile *f) 79 { 80 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 81 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 82 83 pci_device_save(&proxy->pci_dev, f); 84 msix_save(&proxy->pci_dev, f); 85 if (msix_present(&proxy->pci_dev)) 86 qemu_put_be16(f, vdev->config_vector); 87 } 88 89 static const VMStateDescription vmstate_virtio_pci_modern_queue_state = { 90 .name = "virtio_pci/modern_queue_state", 91 .version_id = 1, 92 .minimum_version_id = 1, 93 .fields = (VMStateField[]) { 94 VMSTATE_UINT16(num, VirtIOPCIQueue), 95 VMSTATE_UNUSED(1), /* enabled was stored as be16 */ 96 VMSTATE_BOOL(enabled, VirtIOPCIQueue), 97 VMSTATE_UINT32_ARRAY(desc, VirtIOPCIQueue, 2), 98 VMSTATE_UINT32_ARRAY(avail, VirtIOPCIQueue, 2), 99 VMSTATE_UINT32_ARRAY(used, VirtIOPCIQueue, 2), 100 VMSTATE_END_OF_LIST() 101 } 102 }; 103 104 static bool virtio_pci_modern_state_needed(void *opaque) 105 { 106 VirtIOPCIProxy *proxy = opaque; 107 108 return virtio_pci_modern(proxy); 109 } 110 111 static const VMStateDescription vmstate_virtio_pci_modern_state_sub = { 112 .name = "virtio_pci/modern_state", 113 .version_id = 1, 114 .minimum_version_id = 1, 115 .needed = &virtio_pci_modern_state_needed, 116 .fields = (VMStateField[]) { 117 VMSTATE_UINT32(dfselect, VirtIOPCIProxy), 118 VMSTATE_UINT32(gfselect, VirtIOPCIProxy), 119 VMSTATE_UINT32_ARRAY(guest_features, VirtIOPCIProxy, 2), 120 VMSTATE_STRUCT_ARRAY(vqs, VirtIOPCIProxy, VIRTIO_QUEUE_MAX, 0, 121 vmstate_virtio_pci_modern_queue_state, 122 VirtIOPCIQueue), 123 VMSTATE_END_OF_LIST() 124 } 125 }; 126 127 static const VMStateDescription vmstate_virtio_pci = { 128 .name = "virtio_pci", 129 .version_id = 1, 130 .minimum_version_id = 1, 131 .minimum_version_id_old = 1, 132 .fields = (VMStateField[]) { 133 VMSTATE_END_OF_LIST() 134 }, 135 .subsections = (const VMStateDescription*[]) { 136 &vmstate_virtio_pci_modern_state_sub, 137 NULL 138 } 139 }; 140 141 static bool virtio_pci_has_extra_state(DeviceState *d) 142 { 143 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 144 145 return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA; 146 } 147 148 static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f) 149 { 150 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 151 152 vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL); 153 } 154 155 static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f) 156 { 157 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 158 159 return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1); 160 } 161 162 static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f) 163 { 164 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 165 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 166 167 if (msix_present(&proxy->pci_dev)) 168 qemu_put_be16(f, virtio_queue_vector(vdev, n)); 169 } 170 171 static int virtio_pci_load_config(DeviceState *d, QEMUFile *f) 172 { 173 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 174 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 175 176 int ret; 177 ret = pci_device_load(&proxy->pci_dev, f); 178 if (ret) { 179 return ret; 180 } 181 msix_unuse_all_vectors(&proxy->pci_dev); 182 msix_load(&proxy->pci_dev, f); 183 if (msix_present(&proxy->pci_dev)) { 184 qemu_get_be16s(f, &vdev->config_vector); 185 } else { 186 vdev->config_vector = VIRTIO_NO_VECTOR; 187 } 188 if (vdev->config_vector != VIRTIO_NO_VECTOR) { 189 return msix_vector_use(&proxy->pci_dev, vdev->config_vector); 190 } 191 return 0; 192 } 193 194 static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f) 195 { 196 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 197 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 198 199 uint16_t vector; 200 if (msix_present(&proxy->pci_dev)) { 201 qemu_get_be16s(f, &vector); 202 } else { 203 vector = VIRTIO_NO_VECTOR; 204 } 205 virtio_queue_set_vector(vdev, n, vector); 206 if (vector != VIRTIO_NO_VECTOR) { 207 return msix_vector_use(&proxy->pci_dev, vector); 208 } 209 210 return 0; 211 } 212 213 static bool virtio_pci_ioeventfd_enabled(DeviceState *d) 214 { 215 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 216 217 return (proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD) != 0; 218 } 219 220 #define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000 221 222 static inline int virtio_pci_queue_mem_mult(struct VirtIOPCIProxy *proxy) 223 { 224 return (proxy->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ) ? 225 QEMU_VIRTIO_PCI_QUEUE_MEM_MULT : 4; 226 } 227 228 static int virtio_pci_ioeventfd_assign(DeviceState *d, EventNotifier *notifier, 229 int n, bool assign) 230 { 231 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 232 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 233 VirtQueue *vq = virtio_get_queue(vdev, n); 234 bool legacy = virtio_pci_legacy(proxy); 235 bool modern = virtio_pci_modern(proxy); 236 bool fast_mmio = kvm_ioeventfd_any_length_enabled(); 237 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 238 MemoryRegion *modern_mr = &proxy->notify.mr; 239 MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr; 240 MemoryRegion *legacy_mr = &proxy->bar; 241 hwaddr modern_addr = virtio_pci_queue_mem_mult(proxy) * 242 virtio_get_queue_index(vq); 243 hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY; 244 245 if (assign) { 246 if (modern) { 247 if (fast_mmio) { 248 memory_region_add_eventfd(modern_mr, modern_addr, 0, 249 false, n, notifier); 250 } else { 251 memory_region_add_eventfd(modern_mr, modern_addr, 2, 252 false, n, notifier); 253 } 254 if (modern_pio) { 255 memory_region_add_eventfd(modern_notify_mr, 0, 2, 256 true, n, notifier); 257 } 258 } 259 if (legacy) { 260 memory_region_add_eventfd(legacy_mr, legacy_addr, 2, 261 true, n, notifier); 262 } 263 } else { 264 if (modern) { 265 if (fast_mmio) { 266 memory_region_del_eventfd(modern_mr, modern_addr, 0, 267 false, n, notifier); 268 } else { 269 memory_region_del_eventfd(modern_mr, modern_addr, 2, 270 false, n, notifier); 271 } 272 if (modern_pio) { 273 memory_region_del_eventfd(modern_notify_mr, 0, 2, 274 true, n, notifier); 275 } 276 } 277 if (legacy) { 278 memory_region_del_eventfd(legacy_mr, legacy_addr, 2, 279 true, n, notifier); 280 } 281 } 282 return 0; 283 } 284 285 static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy) 286 { 287 virtio_bus_start_ioeventfd(&proxy->bus); 288 } 289 290 static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy) 291 { 292 virtio_bus_stop_ioeventfd(&proxy->bus); 293 } 294 295 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val) 296 { 297 VirtIOPCIProxy *proxy = opaque; 298 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 299 hwaddr pa; 300 301 switch (addr) { 302 case VIRTIO_PCI_GUEST_FEATURES: 303 /* Guest does not negotiate properly? We have to assume nothing. */ 304 if (val & (1 << VIRTIO_F_BAD_FEATURE)) { 305 val = virtio_bus_get_vdev_bad_features(&proxy->bus); 306 } 307 virtio_set_features(vdev, val); 308 break; 309 case VIRTIO_PCI_QUEUE_PFN: 310 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT; 311 if (pa == 0) { 312 virtio_pci_reset(DEVICE(proxy)); 313 } 314 else 315 virtio_queue_set_addr(vdev, vdev->queue_sel, pa); 316 break; 317 case VIRTIO_PCI_QUEUE_SEL: 318 if (val < VIRTIO_QUEUE_MAX) 319 vdev->queue_sel = val; 320 break; 321 case VIRTIO_PCI_QUEUE_NOTIFY: 322 if (val < VIRTIO_QUEUE_MAX) { 323 virtio_queue_notify(vdev, val); 324 } 325 break; 326 case VIRTIO_PCI_STATUS: 327 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) { 328 virtio_pci_stop_ioeventfd(proxy); 329 } 330 331 virtio_set_status(vdev, val & 0xFF); 332 333 if (val & VIRTIO_CONFIG_S_DRIVER_OK) { 334 virtio_pci_start_ioeventfd(proxy); 335 } 336 337 if (vdev->status == 0) { 338 virtio_pci_reset(DEVICE(proxy)); 339 } 340 341 /* Linux before 2.6.34 drives the device without enabling 342 the PCI device bus master bit. Enable it automatically 343 for the guest. This is a PCI spec violation but so is 344 initiating DMA with bus master bit clear. */ 345 if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) { 346 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND, 347 proxy->pci_dev.config[PCI_COMMAND] | 348 PCI_COMMAND_MASTER, 1); 349 } 350 break; 351 case VIRTIO_MSI_CONFIG_VECTOR: 352 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector); 353 /* Make it possible for guest to discover an error took place. */ 354 if (msix_vector_use(&proxy->pci_dev, val) < 0) 355 val = VIRTIO_NO_VECTOR; 356 vdev->config_vector = val; 357 break; 358 case VIRTIO_MSI_QUEUE_VECTOR: 359 msix_vector_unuse(&proxy->pci_dev, 360 virtio_queue_vector(vdev, vdev->queue_sel)); 361 /* Make it possible for guest to discover an error took place. */ 362 if (msix_vector_use(&proxy->pci_dev, val) < 0) 363 val = VIRTIO_NO_VECTOR; 364 virtio_queue_set_vector(vdev, vdev->queue_sel, val); 365 break; 366 default: 367 error_report("%s: unexpected address 0x%x value 0x%x", 368 __func__, addr, val); 369 break; 370 } 371 } 372 373 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr) 374 { 375 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 376 uint32_t ret = 0xFFFFFFFF; 377 378 switch (addr) { 379 case VIRTIO_PCI_HOST_FEATURES: 380 ret = vdev->host_features; 381 break; 382 case VIRTIO_PCI_GUEST_FEATURES: 383 ret = vdev->guest_features; 384 break; 385 case VIRTIO_PCI_QUEUE_PFN: 386 ret = virtio_queue_get_addr(vdev, vdev->queue_sel) 387 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT; 388 break; 389 case VIRTIO_PCI_QUEUE_NUM: 390 ret = virtio_queue_get_num(vdev, vdev->queue_sel); 391 break; 392 case VIRTIO_PCI_QUEUE_SEL: 393 ret = vdev->queue_sel; 394 break; 395 case VIRTIO_PCI_STATUS: 396 ret = vdev->status; 397 break; 398 case VIRTIO_PCI_ISR: 399 /* reading from the ISR also clears it. */ 400 ret = atomic_xchg(&vdev->isr, 0); 401 pci_irq_deassert(&proxy->pci_dev); 402 break; 403 case VIRTIO_MSI_CONFIG_VECTOR: 404 ret = vdev->config_vector; 405 break; 406 case VIRTIO_MSI_QUEUE_VECTOR: 407 ret = virtio_queue_vector(vdev, vdev->queue_sel); 408 break; 409 default: 410 break; 411 } 412 413 return ret; 414 } 415 416 static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr, 417 unsigned size) 418 { 419 VirtIOPCIProxy *proxy = opaque; 420 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 421 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev); 422 uint64_t val = 0; 423 if (addr < config) { 424 return virtio_ioport_read(proxy, addr); 425 } 426 addr -= config; 427 428 switch (size) { 429 case 1: 430 val = virtio_config_readb(vdev, addr); 431 break; 432 case 2: 433 val = virtio_config_readw(vdev, addr); 434 if (virtio_is_big_endian(vdev)) { 435 val = bswap16(val); 436 } 437 break; 438 case 4: 439 val = virtio_config_readl(vdev, addr); 440 if (virtio_is_big_endian(vdev)) { 441 val = bswap32(val); 442 } 443 break; 444 } 445 return val; 446 } 447 448 static void virtio_pci_config_write(void *opaque, hwaddr addr, 449 uint64_t val, unsigned size) 450 { 451 VirtIOPCIProxy *proxy = opaque; 452 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev); 453 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 454 if (addr < config) { 455 virtio_ioport_write(proxy, addr, val); 456 return; 457 } 458 addr -= config; 459 /* 460 * Virtio-PCI is odd. Ioports are LE but config space is target native 461 * endian. 462 */ 463 switch (size) { 464 case 1: 465 virtio_config_writeb(vdev, addr, val); 466 break; 467 case 2: 468 if (virtio_is_big_endian(vdev)) { 469 val = bswap16(val); 470 } 471 virtio_config_writew(vdev, addr, val); 472 break; 473 case 4: 474 if (virtio_is_big_endian(vdev)) { 475 val = bswap32(val); 476 } 477 virtio_config_writel(vdev, addr, val); 478 break; 479 } 480 } 481 482 static const MemoryRegionOps virtio_pci_config_ops = { 483 .read = virtio_pci_config_read, 484 .write = virtio_pci_config_write, 485 .impl = { 486 .min_access_size = 1, 487 .max_access_size = 4, 488 }, 489 .endianness = DEVICE_LITTLE_ENDIAN, 490 }; 491 492 static MemoryRegion *virtio_address_space_lookup(VirtIOPCIProxy *proxy, 493 hwaddr *off, int len) 494 { 495 int i; 496 VirtIOPCIRegion *reg; 497 498 for (i = 0; i < ARRAY_SIZE(proxy->regs); ++i) { 499 reg = &proxy->regs[i]; 500 if (*off >= reg->offset && 501 *off + len <= reg->offset + reg->size) { 502 *off -= reg->offset; 503 return ®->mr; 504 } 505 } 506 507 return NULL; 508 } 509 510 /* Below are generic functions to do memcpy from/to an address space, 511 * without byteswaps, with input validation. 512 * 513 * As regular address_space_* APIs all do some kind of byteswap at least for 514 * some host/target combinations, we are forced to explicitly convert to a 515 * known-endianness integer value. 516 * It doesn't really matter which endian format to go through, so the code 517 * below selects the endian that causes the least amount of work on the given 518 * host. 519 * 520 * Note: host pointer must be aligned. 521 */ 522 static 523 void virtio_address_space_write(VirtIOPCIProxy *proxy, hwaddr addr, 524 const uint8_t *buf, int len) 525 { 526 uint64_t val; 527 MemoryRegion *mr; 528 529 /* address_space_* APIs assume an aligned address. 530 * As address is under guest control, handle illegal values. 531 */ 532 addr &= ~(len - 1); 533 534 mr = virtio_address_space_lookup(proxy, &addr, len); 535 if (!mr) { 536 return; 537 } 538 539 /* Make sure caller aligned buf properly */ 540 assert(!(((uintptr_t)buf) & (len - 1))); 541 542 switch (len) { 543 case 1: 544 val = pci_get_byte(buf); 545 break; 546 case 2: 547 val = cpu_to_le16(pci_get_word(buf)); 548 break; 549 case 4: 550 val = cpu_to_le32(pci_get_long(buf)); 551 break; 552 default: 553 /* As length is under guest control, handle illegal values. */ 554 return; 555 } 556 /* TODO: Merge bswap from cpu_to_leXX into memory_region_dispatch_write. */ 557 memory_region_dispatch_write(mr, addr, val, size_memop(len) | MO_LE, 558 MEMTXATTRS_UNSPECIFIED); 559 } 560 561 static void 562 virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr, 563 uint8_t *buf, int len) 564 { 565 uint64_t val; 566 MemoryRegion *mr; 567 568 /* address_space_* APIs assume an aligned address. 569 * As address is under guest control, handle illegal values. 570 */ 571 addr &= ~(len - 1); 572 573 mr = virtio_address_space_lookup(proxy, &addr, len); 574 if (!mr) { 575 return; 576 } 577 578 /* Make sure caller aligned buf properly */ 579 assert(!(((uintptr_t)buf) & (len - 1))); 580 581 /* TODO: Merge bswap from leXX_to_cpu into memory_region_dispatch_read. */ 582 memory_region_dispatch_read(mr, addr, &val, size_memop(len) | MO_LE, 583 MEMTXATTRS_UNSPECIFIED); 584 switch (len) { 585 case 1: 586 pci_set_byte(buf, val); 587 break; 588 case 2: 589 pci_set_word(buf, le16_to_cpu(val)); 590 break; 591 case 4: 592 pci_set_long(buf, le32_to_cpu(val)); 593 break; 594 default: 595 /* As length is under guest control, handle illegal values. */ 596 break; 597 } 598 } 599 600 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address, 601 uint32_t val, int len) 602 { 603 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 604 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 605 struct virtio_pci_cfg_cap *cfg; 606 607 pci_default_write_config(pci_dev, address, val, len); 608 609 if (range_covers_byte(address, len, PCI_COMMAND) && 610 !(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { 611 virtio_pci_stop_ioeventfd(proxy); 612 virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK); 613 } 614 615 if (proxy->config_cap && 616 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap, 617 pci_cfg_data), 618 sizeof cfg->pci_cfg_data)) { 619 uint32_t off; 620 uint32_t len; 621 622 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap); 623 off = le32_to_cpu(cfg->cap.offset); 624 len = le32_to_cpu(cfg->cap.length); 625 626 if (len == 1 || len == 2 || len == 4) { 627 assert(len <= sizeof cfg->pci_cfg_data); 628 virtio_address_space_write(proxy, off, cfg->pci_cfg_data, len); 629 } 630 } 631 } 632 633 static uint32_t virtio_read_config(PCIDevice *pci_dev, 634 uint32_t address, int len) 635 { 636 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 637 struct virtio_pci_cfg_cap *cfg; 638 639 if (proxy->config_cap && 640 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap, 641 pci_cfg_data), 642 sizeof cfg->pci_cfg_data)) { 643 uint32_t off; 644 uint32_t len; 645 646 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap); 647 off = le32_to_cpu(cfg->cap.offset); 648 len = le32_to_cpu(cfg->cap.length); 649 650 if (len == 1 || len == 2 || len == 4) { 651 assert(len <= sizeof cfg->pci_cfg_data); 652 virtio_address_space_read(proxy, off, cfg->pci_cfg_data, len); 653 } 654 } 655 656 return pci_default_read_config(pci_dev, address, len); 657 } 658 659 static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy, 660 unsigned int queue_no, 661 unsigned int vector) 662 { 663 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 664 int ret; 665 666 if (irqfd->users == 0) { 667 ret = kvm_irqchip_add_msi_route(kvm_state, vector, &proxy->pci_dev); 668 if (ret < 0) { 669 return ret; 670 } 671 irqfd->virq = ret; 672 } 673 irqfd->users++; 674 return 0; 675 } 676 677 static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy, 678 unsigned int vector) 679 { 680 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 681 if (--irqfd->users == 0) { 682 kvm_irqchip_release_virq(kvm_state, irqfd->virq); 683 } 684 } 685 686 static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy, 687 unsigned int queue_no, 688 unsigned int vector) 689 { 690 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 691 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 692 VirtQueue *vq = virtio_get_queue(vdev, queue_no); 693 EventNotifier *n = virtio_queue_get_guest_notifier(vq); 694 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq); 695 } 696 697 static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy, 698 unsigned int queue_no, 699 unsigned int vector) 700 { 701 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 702 VirtQueue *vq = virtio_get_queue(vdev, queue_no); 703 EventNotifier *n = virtio_queue_get_guest_notifier(vq); 704 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 705 int ret; 706 707 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq); 708 assert(ret == 0); 709 } 710 711 static int kvm_virtio_pci_vector_use(VirtIOPCIProxy *proxy, int nvqs) 712 { 713 PCIDevice *dev = &proxy->pci_dev; 714 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 715 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 716 unsigned int vector; 717 int ret, queue_no; 718 719 for (queue_no = 0; queue_no < nvqs; queue_no++) { 720 if (!virtio_queue_get_num(vdev, queue_no)) { 721 break; 722 } 723 vector = virtio_queue_vector(vdev, queue_no); 724 if (vector >= msix_nr_vectors_allocated(dev)) { 725 continue; 726 } 727 ret = kvm_virtio_pci_vq_vector_use(proxy, queue_no, vector); 728 if (ret < 0) { 729 goto undo; 730 } 731 /* If guest supports masking, set up irqfd now. 732 * Otherwise, delay until unmasked in the frontend. 733 */ 734 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 735 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector); 736 if (ret < 0) { 737 kvm_virtio_pci_vq_vector_release(proxy, vector); 738 goto undo; 739 } 740 } 741 } 742 return 0; 743 744 undo: 745 while (--queue_no >= 0) { 746 vector = virtio_queue_vector(vdev, queue_no); 747 if (vector >= msix_nr_vectors_allocated(dev)) { 748 continue; 749 } 750 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 751 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); 752 } 753 kvm_virtio_pci_vq_vector_release(proxy, vector); 754 } 755 return ret; 756 } 757 758 static void kvm_virtio_pci_vector_release(VirtIOPCIProxy *proxy, int nvqs) 759 { 760 PCIDevice *dev = &proxy->pci_dev; 761 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 762 unsigned int vector; 763 int queue_no; 764 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 765 766 for (queue_no = 0; queue_no < nvqs; queue_no++) { 767 if (!virtio_queue_get_num(vdev, queue_no)) { 768 break; 769 } 770 vector = virtio_queue_vector(vdev, queue_no); 771 if (vector >= msix_nr_vectors_allocated(dev)) { 772 continue; 773 } 774 /* If guest supports masking, clean up irqfd now. 775 * Otherwise, it was cleaned when masked in the frontend. 776 */ 777 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 778 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); 779 } 780 kvm_virtio_pci_vq_vector_release(proxy, vector); 781 } 782 } 783 784 static int virtio_pci_vq_vector_unmask(VirtIOPCIProxy *proxy, 785 unsigned int queue_no, 786 unsigned int vector, 787 MSIMessage msg) 788 { 789 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 790 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 791 VirtQueue *vq = virtio_get_queue(vdev, queue_no); 792 EventNotifier *n = virtio_queue_get_guest_notifier(vq); 793 VirtIOIRQFD *irqfd; 794 int ret = 0; 795 796 if (proxy->vector_irqfd) { 797 irqfd = &proxy->vector_irqfd[vector]; 798 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) { 799 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg, 800 &proxy->pci_dev); 801 if (ret < 0) { 802 return ret; 803 } 804 kvm_irqchip_commit_routes(kvm_state); 805 } 806 } 807 808 /* If guest supports masking, irqfd is already setup, unmask it. 809 * Otherwise, set it up now. 810 */ 811 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 812 k->guest_notifier_mask(vdev, queue_no, false); 813 /* Test after unmasking to avoid losing events. */ 814 if (k->guest_notifier_pending && 815 k->guest_notifier_pending(vdev, queue_no)) { 816 event_notifier_set(n); 817 } 818 } else { 819 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector); 820 } 821 return ret; 822 } 823 824 static void virtio_pci_vq_vector_mask(VirtIOPCIProxy *proxy, 825 unsigned int queue_no, 826 unsigned int vector) 827 { 828 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 829 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 830 831 /* If guest supports masking, keep irqfd but mask it. 832 * Otherwise, clean it up now. 833 */ 834 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 835 k->guest_notifier_mask(vdev, queue_no, true); 836 } else { 837 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); 838 } 839 } 840 841 static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector, 842 MSIMessage msg) 843 { 844 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 845 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 846 VirtQueue *vq = virtio_vector_first_queue(vdev, vector); 847 int ret, index, unmasked = 0; 848 849 while (vq) { 850 index = virtio_get_queue_index(vq); 851 if (!virtio_queue_get_num(vdev, index)) { 852 break; 853 } 854 if (index < proxy->nvqs_with_notifiers) { 855 ret = virtio_pci_vq_vector_unmask(proxy, index, vector, msg); 856 if (ret < 0) { 857 goto undo; 858 } 859 ++unmasked; 860 } 861 vq = virtio_vector_next_queue(vq); 862 } 863 864 return 0; 865 866 undo: 867 vq = virtio_vector_first_queue(vdev, vector); 868 while (vq && unmasked >= 0) { 869 index = virtio_get_queue_index(vq); 870 if (index < proxy->nvqs_with_notifiers) { 871 virtio_pci_vq_vector_mask(proxy, index, vector); 872 --unmasked; 873 } 874 vq = virtio_vector_next_queue(vq); 875 } 876 return ret; 877 } 878 879 static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector) 880 { 881 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 882 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 883 VirtQueue *vq = virtio_vector_first_queue(vdev, vector); 884 int index; 885 886 while (vq) { 887 index = virtio_get_queue_index(vq); 888 if (!virtio_queue_get_num(vdev, index)) { 889 break; 890 } 891 if (index < proxy->nvqs_with_notifiers) { 892 virtio_pci_vq_vector_mask(proxy, index, vector); 893 } 894 vq = virtio_vector_next_queue(vq); 895 } 896 } 897 898 static void virtio_pci_vector_poll(PCIDevice *dev, 899 unsigned int vector_start, 900 unsigned int vector_end) 901 { 902 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 903 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 904 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 905 int queue_no; 906 unsigned int vector; 907 EventNotifier *notifier; 908 VirtQueue *vq; 909 910 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) { 911 if (!virtio_queue_get_num(vdev, queue_no)) { 912 break; 913 } 914 vector = virtio_queue_vector(vdev, queue_no); 915 if (vector < vector_start || vector >= vector_end || 916 !msix_is_masked(dev, vector)) { 917 continue; 918 } 919 vq = virtio_get_queue(vdev, queue_no); 920 notifier = virtio_queue_get_guest_notifier(vq); 921 if (k->guest_notifier_pending) { 922 if (k->guest_notifier_pending(vdev, queue_no)) { 923 msix_set_pending(dev, vector); 924 } 925 } else if (event_notifier_test_and_clear(notifier)) { 926 msix_set_pending(dev, vector); 927 } 928 } 929 } 930 931 static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign, 932 bool with_irqfd) 933 { 934 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 935 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 936 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev); 937 VirtQueue *vq = virtio_get_queue(vdev, n); 938 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq); 939 940 if (assign) { 941 int r = event_notifier_init(notifier, 0); 942 if (r < 0) { 943 return r; 944 } 945 virtio_queue_set_guest_notifier_fd_handler(vq, true, with_irqfd); 946 } else { 947 virtio_queue_set_guest_notifier_fd_handler(vq, false, with_irqfd); 948 event_notifier_cleanup(notifier); 949 } 950 951 if (!msix_enabled(&proxy->pci_dev) && 952 vdev->use_guest_notifier_mask && 953 vdc->guest_notifier_mask) { 954 vdc->guest_notifier_mask(vdev, n, !assign); 955 } 956 957 return 0; 958 } 959 960 static bool virtio_pci_query_guest_notifiers(DeviceState *d) 961 { 962 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 963 return msix_enabled(&proxy->pci_dev); 964 } 965 966 static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign) 967 { 968 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 969 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 970 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 971 int r, n; 972 bool with_irqfd = msix_enabled(&proxy->pci_dev) && 973 kvm_msi_via_irqfd_enabled(); 974 975 nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX); 976 977 /* When deassigning, pass a consistent nvqs value 978 * to avoid leaking notifiers. 979 */ 980 assert(assign || nvqs == proxy->nvqs_with_notifiers); 981 982 proxy->nvqs_with_notifiers = nvqs; 983 984 /* Must unset vector notifier while guest notifier is still assigned */ 985 if ((proxy->vector_irqfd || k->guest_notifier_mask) && !assign) { 986 msix_unset_vector_notifiers(&proxy->pci_dev); 987 if (proxy->vector_irqfd) { 988 kvm_virtio_pci_vector_release(proxy, nvqs); 989 g_free(proxy->vector_irqfd); 990 proxy->vector_irqfd = NULL; 991 } 992 } 993 994 for (n = 0; n < nvqs; n++) { 995 if (!virtio_queue_get_num(vdev, n)) { 996 break; 997 } 998 999 r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd); 1000 if (r < 0) { 1001 goto assign_error; 1002 } 1003 } 1004 1005 /* Must set vector notifier after guest notifier has been assigned */ 1006 if ((with_irqfd || k->guest_notifier_mask) && assign) { 1007 if (with_irqfd) { 1008 proxy->vector_irqfd = 1009 g_malloc0(sizeof(*proxy->vector_irqfd) * 1010 msix_nr_vectors_allocated(&proxy->pci_dev)); 1011 r = kvm_virtio_pci_vector_use(proxy, nvqs); 1012 if (r < 0) { 1013 goto assign_error; 1014 } 1015 } 1016 r = msix_set_vector_notifiers(&proxy->pci_dev, 1017 virtio_pci_vector_unmask, 1018 virtio_pci_vector_mask, 1019 virtio_pci_vector_poll); 1020 if (r < 0) { 1021 goto notifiers_error; 1022 } 1023 } 1024 1025 return 0; 1026 1027 notifiers_error: 1028 if (with_irqfd) { 1029 assert(assign); 1030 kvm_virtio_pci_vector_release(proxy, nvqs); 1031 } 1032 1033 assign_error: 1034 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */ 1035 assert(assign); 1036 while (--n >= 0) { 1037 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd); 1038 } 1039 return r; 1040 } 1041 1042 static int virtio_pci_set_host_notifier_mr(DeviceState *d, int n, 1043 MemoryRegion *mr, bool assign) 1044 { 1045 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1046 int offset; 1047 1048 if (n >= VIRTIO_QUEUE_MAX || !virtio_pci_modern(proxy) || 1049 virtio_pci_queue_mem_mult(proxy) != memory_region_size(mr)) { 1050 return -1; 1051 } 1052 1053 if (assign) { 1054 offset = virtio_pci_queue_mem_mult(proxy) * n; 1055 memory_region_add_subregion_overlap(&proxy->notify.mr, offset, mr, 1); 1056 } else { 1057 memory_region_del_subregion(&proxy->notify.mr, mr); 1058 } 1059 1060 return 0; 1061 } 1062 1063 static void virtio_pci_vmstate_change(DeviceState *d, bool running) 1064 { 1065 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1066 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1067 1068 if (running) { 1069 /* Old QEMU versions did not set bus master enable on status write. 1070 * Detect DRIVER set and enable it. 1071 */ 1072 if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) && 1073 (vdev->status & VIRTIO_CONFIG_S_DRIVER) && 1074 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { 1075 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND, 1076 proxy->pci_dev.config[PCI_COMMAND] | 1077 PCI_COMMAND_MASTER, 1); 1078 } 1079 virtio_pci_start_ioeventfd(proxy); 1080 } else { 1081 virtio_pci_stop_ioeventfd(proxy); 1082 } 1083 } 1084 1085 /* 1086 * virtio-pci: This is the PCIDevice which has a virtio-pci-bus. 1087 */ 1088 1089 static int virtio_pci_query_nvectors(DeviceState *d) 1090 { 1091 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1092 1093 return proxy->nvectors; 1094 } 1095 1096 static AddressSpace *virtio_pci_get_dma_as(DeviceState *d) 1097 { 1098 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1099 PCIDevice *dev = &proxy->pci_dev; 1100 1101 return pci_get_address_space(dev); 1102 } 1103 1104 static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy, 1105 struct virtio_pci_cap *cap) 1106 { 1107 PCIDevice *dev = &proxy->pci_dev; 1108 int offset; 1109 1110 offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0, 1111 cap->cap_len, &error_abort); 1112 1113 assert(cap->cap_len >= sizeof *cap); 1114 memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len, 1115 cap->cap_len - PCI_CAP_FLAGS); 1116 1117 return offset; 1118 } 1119 1120 static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, 1121 unsigned size) 1122 { 1123 VirtIOPCIProxy *proxy = opaque; 1124 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1125 uint32_t val = 0; 1126 int i; 1127 1128 switch (addr) { 1129 case VIRTIO_PCI_COMMON_DFSELECT: 1130 val = proxy->dfselect; 1131 break; 1132 case VIRTIO_PCI_COMMON_DF: 1133 if (proxy->dfselect <= 1) { 1134 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev); 1135 1136 val = (vdev->host_features & ~vdc->legacy_features) >> 1137 (32 * proxy->dfselect); 1138 } 1139 break; 1140 case VIRTIO_PCI_COMMON_GFSELECT: 1141 val = proxy->gfselect; 1142 break; 1143 case VIRTIO_PCI_COMMON_GF: 1144 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) { 1145 val = proxy->guest_features[proxy->gfselect]; 1146 } 1147 break; 1148 case VIRTIO_PCI_COMMON_MSIX: 1149 val = vdev->config_vector; 1150 break; 1151 case VIRTIO_PCI_COMMON_NUMQ: 1152 for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) { 1153 if (virtio_queue_get_num(vdev, i)) { 1154 val = i + 1; 1155 } 1156 } 1157 break; 1158 case VIRTIO_PCI_COMMON_STATUS: 1159 val = vdev->status; 1160 break; 1161 case VIRTIO_PCI_COMMON_CFGGENERATION: 1162 val = vdev->generation; 1163 break; 1164 case VIRTIO_PCI_COMMON_Q_SELECT: 1165 val = vdev->queue_sel; 1166 break; 1167 case VIRTIO_PCI_COMMON_Q_SIZE: 1168 val = virtio_queue_get_num(vdev, vdev->queue_sel); 1169 break; 1170 case VIRTIO_PCI_COMMON_Q_MSIX: 1171 val = virtio_queue_vector(vdev, vdev->queue_sel); 1172 break; 1173 case VIRTIO_PCI_COMMON_Q_ENABLE: 1174 val = proxy->vqs[vdev->queue_sel].enabled; 1175 break; 1176 case VIRTIO_PCI_COMMON_Q_NOFF: 1177 /* Simply map queues in order */ 1178 val = vdev->queue_sel; 1179 break; 1180 case VIRTIO_PCI_COMMON_Q_DESCLO: 1181 val = proxy->vqs[vdev->queue_sel].desc[0]; 1182 break; 1183 case VIRTIO_PCI_COMMON_Q_DESCHI: 1184 val = proxy->vqs[vdev->queue_sel].desc[1]; 1185 break; 1186 case VIRTIO_PCI_COMMON_Q_AVAILLO: 1187 val = proxy->vqs[vdev->queue_sel].avail[0]; 1188 break; 1189 case VIRTIO_PCI_COMMON_Q_AVAILHI: 1190 val = proxy->vqs[vdev->queue_sel].avail[1]; 1191 break; 1192 case VIRTIO_PCI_COMMON_Q_USEDLO: 1193 val = proxy->vqs[vdev->queue_sel].used[0]; 1194 break; 1195 case VIRTIO_PCI_COMMON_Q_USEDHI: 1196 val = proxy->vqs[vdev->queue_sel].used[1]; 1197 break; 1198 default: 1199 val = 0; 1200 } 1201 1202 return val; 1203 } 1204 1205 static void virtio_pci_common_write(void *opaque, hwaddr addr, 1206 uint64_t val, unsigned size) 1207 { 1208 VirtIOPCIProxy *proxy = opaque; 1209 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1210 1211 switch (addr) { 1212 case VIRTIO_PCI_COMMON_DFSELECT: 1213 proxy->dfselect = val; 1214 break; 1215 case VIRTIO_PCI_COMMON_GFSELECT: 1216 proxy->gfselect = val; 1217 break; 1218 case VIRTIO_PCI_COMMON_GF: 1219 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) { 1220 proxy->guest_features[proxy->gfselect] = val; 1221 virtio_set_features(vdev, 1222 (((uint64_t)proxy->guest_features[1]) << 32) | 1223 proxy->guest_features[0]); 1224 } 1225 break; 1226 case VIRTIO_PCI_COMMON_MSIX: 1227 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector); 1228 /* Make it possible for guest to discover an error took place. */ 1229 if (msix_vector_use(&proxy->pci_dev, val) < 0) { 1230 val = VIRTIO_NO_VECTOR; 1231 } 1232 vdev->config_vector = val; 1233 break; 1234 case VIRTIO_PCI_COMMON_STATUS: 1235 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) { 1236 virtio_pci_stop_ioeventfd(proxy); 1237 } 1238 1239 virtio_set_status(vdev, val & 0xFF); 1240 1241 if (val & VIRTIO_CONFIG_S_DRIVER_OK) { 1242 virtio_pci_start_ioeventfd(proxy); 1243 } 1244 1245 if (vdev->status == 0) { 1246 virtio_pci_reset(DEVICE(proxy)); 1247 } 1248 1249 break; 1250 case VIRTIO_PCI_COMMON_Q_SELECT: 1251 if (val < VIRTIO_QUEUE_MAX) { 1252 vdev->queue_sel = val; 1253 } 1254 break; 1255 case VIRTIO_PCI_COMMON_Q_SIZE: 1256 proxy->vqs[vdev->queue_sel].num = val; 1257 break; 1258 case VIRTIO_PCI_COMMON_Q_MSIX: 1259 msix_vector_unuse(&proxy->pci_dev, 1260 virtio_queue_vector(vdev, vdev->queue_sel)); 1261 /* Make it possible for guest to discover an error took place. */ 1262 if (msix_vector_use(&proxy->pci_dev, val) < 0) { 1263 val = VIRTIO_NO_VECTOR; 1264 } 1265 virtio_queue_set_vector(vdev, vdev->queue_sel, val); 1266 break; 1267 case VIRTIO_PCI_COMMON_Q_ENABLE: 1268 virtio_queue_set_num(vdev, vdev->queue_sel, 1269 proxy->vqs[vdev->queue_sel].num); 1270 virtio_queue_set_rings(vdev, vdev->queue_sel, 1271 ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 | 1272 proxy->vqs[vdev->queue_sel].desc[0], 1273 ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 | 1274 proxy->vqs[vdev->queue_sel].avail[0], 1275 ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 | 1276 proxy->vqs[vdev->queue_sel].used[0]); 1277 proxy->vqs[vdev->queue_sel].enabled = 1; 1278 break; 1279 case VIRTIO_PCI_COMMON_Q_DESCLO: 1280 proxy->vqs[vdev->queue_sel].desc[0] = val; 1281 break; 1282 case VIRTIO_PCI_COMMON_Q_DESCHI: 1283 proxy->vqs[vdev->queue_sel].desc[1] = val; 1284 break; 1285 case VIRTIO_PCI_COMMON_Q_AVAILLO: 1286 proxy->vqs[vdev->queue_sel].avail[0] = val; 1287 break; 1288 case VIRTIO_PCI_COMMON_Q_AVAILHI: 1289 proxy->vqs[vdev->queue_sel].avail[1] = val; 1290 break; 1291 case VIRTIO_PCI_COMMON_Q_USEDLO: 1292 proxy->vqs[vdev->queue_sel].used[0] = val; 1293 break; 1294 case VIRTIO_PCI_COMMON_Q_USEDHI: 1295 proxy->vqs[vdev->queue_sel].used[1] = val; 1296 break; 1297 default: 1298 break; 1299 } 1300 } 1301 1302 1303 static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr, 1304 unsigned size) 1305 { 1306 return 0; 1307 } 1308 1309 static void virtio_pci_notify_write(void *opaque, hwaddr addr, 1310 uint64_t val, unsigned size) 1311 { 1312 VirtIODevice *vdev = opaque; 1313 VirtIOPCIProxy *proxy = VIRTIO_PCI(DEVICE(vdev)->parent_bus->parent); 1314 unsigned queue = addr / virtio_pci_queue_mem_mult(proxy); 1315 1316 if (queue < VIRTIO_QUEUE_MAX) { 1317 virtio_queue_notify(vdev, queue); 1318 } 1319 } 1320 1321 static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr, 1322 uint64_t val, unsigned size) 1323 { 1324 VirtIODevice *vdev = opaque; 1325 unsigned queue = val; 1326 1327 if (queue < VIRTIO_QUEUE_MAX) { 1328 virtio_queue_notify(vdev, queue); 1329 } 1330 } 1331 1332 static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr, 1333 unsigned size) 1334 { 1335 VirtIOPCIProxy *proxy = opaque; 1336 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1337 uint64_t val = atomic_xchg(&vdev->isr, 0); 1338 pci_irq_deassert(&proxy->pci_dev); 1339 1340 return val; 1341 } 1342 1343 static void virtio_pci_isr_write(void *opaque, hwaddr addr, 1344 uint64_t val, unsigned size) 1345 { 1346 } 1347 1348 static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr, 1349 unsigned size) 1350 { 1351 VirtIODevice *vdev = opaque; 1352 uint64_t val = 0; 1353 1354 switch (size) { 1355 case 1: 1356 val = virtio_config_modern_readb(vdev, addr); 1357 break; 1358 case 2: 1359 val = virtio_config_modern_readw(vdev, addr); 1360 break; 1361 case 4: 1362 val = virtio_config_modern_readl(vdev, addr); 1363 break; 1364 } 1365 return val; 1366 } 1367 1368 static void virtio_pci_device_write(void *opaque, hwaddr addr, 1369 uint64_t val, unsigned size) 1370 { 1371 VirtIODevice *vdev = opaque; 1372 switch (size) { 1373 case 1: 1374 virtio_config_modern_writeb(vdev, addr, val); 1375 break; 1376 case 2: 1377 virtio_config_modern_writew(vdev, addr, val); 1378 break; 1379 case 4: 1380 virtio_config_modern_writel(vdev, addr, val); 1381 break; 1382 } 1383 } 1384 1385 static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy) 1386 { 1387 static const MemoryRegionOps common_ops = { 1388 .read = virtio_pci_common_read, 1389 .write = virtio_pci_common_write, 1390 .impl = { 1391 .min_access_size = 1, 1392 .max_access_size = 4, 1393 }, 1394 .endianness = DEVICE_LITTLE_ENDIAN, 1395 }; 1396 static const MemoryRegionOps isr_ops = { 1397 .read = virtio_pci_isr_read, 1398 .write = virtio_pci_isr_write, 1399 .impl = { 1400 .min_access_size = 1, 1401 .max_access_size = 4, 1402 }, 1403 .endianness = DEVICE_LITTLE_ENDIAN, 1404 }; 1405 static const MemoryRegionOps device_ops = { 1406 .read = virtio_pci_device_read, 1407 .write = virtio_pci_device_write, 1408 .impl = { 1409 .min_access_size = 1, 1410 .max_access_size = 4, 1411 }, 1412 .endianness = DEVICE_LITTLE_ENDIAN, 1413 }; 1414 static const MemoryRegionOps notify_ops = { 1415 .read = virtio_pci_notify_read, 1416 .write = virtio_pci_notify_write, 1417 .impl = { 1418 .min_access_size = 1, 1419 .max_access_size = 4, 1420 }, 1421 .endianness = DEVICE_LITTLE_ENDIAN, 1422 }; 1423 static const MemoryRegionOps notify_pio_ops = { 1424 .read = virtio_pci_notify_read, 1425 .write = virtio_pci_notify_write_pio, 1426 .impl = { 1427 .min_access_size = 1, 1428 .max_access_size = 4, 1429 }, 1430 .endianness = DEVICE_LITTLE_ENDIAN, 1431 }; 1432 1433 1434 memory_region_init_io(&proxy->common.mr, OBJECT(proxy), 1435 &common_ops, 1436 proxy, 1437 "virtio-pci-common", 1438 proxy->common.size); 1439 1440 memory_region_init_io(&proxy->isr.mr, OBJECT(proxy), 1441 &isr_ops, 1442 proxy, 1443 "virtio-pci-isr", 1444 proxy->isr.size); 1445 1446 memory_region_init_io(&proxy->device.mr, OBJECT(proxy), 1447 &device_ops, 1448 virtio_bus_get_device(&proxy->bus), 1449 "virtio-pci-device", 1450 proxy->device.size); 1451 1452 memory_region_init_io(&proxy->notify.mr, OBJECT(proxy), 1453 ¬ify_ops, 1454 virtio_bus_get_device(&proxy->bus), 1455 "virtio-pci-notify", 1456 proxy->notify.size); 1457 1458 memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy), 1459 ¬ify_pio_ops, 1460 virtio_bus_get_device(&proxy->bus), 1461 "virtio-pci-notify-pio", 1462 proxy->notify_pio.size); 1463 } 1464 1465 static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy, 1466 VirtIOPCIRegion *region, 1467 struct virtio_pci_cap *cap, 1468 MemoryRegion *mr, 1469 uint8_t bar) 1470 { 1471 memory_region_add_subregion(mr, region->offset, ®ion->mr); 1472 1473 cap->cfg_type = region->type; 1474 cap->bar = bar; 1475 cap->offset = cpu_to_le32(region->offset); 1476 cap->length = cpu_to_le32(region->size); 1477 virtio_pci_add_mem_cap(proxy, cap); 1478 1479 } 1480 1481 static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy, 1482 VirtIOPCIRegion *region, 1483 struct virtio_pci_cap *cap) 1484 { 1485 virtio_pci_modern_region_map(proxy, region, cap, 1486 &proxy->modern_bar, proxy->modern_mem_bar_idx); 1487 } 1488 1489 static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy, 1490 VirtIOPCIRegion *region, 1491 struct virtio_pci_cap *cap) 1492 { 1493 virtio_pci_modern_region_map(proxy, region, cap, 1494 &proxy->io_bar, proxy->modern_io_bar_idx); 1495 } 1496 1497 static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy, 1498 VirtIOPCIRegion *region) 1499 { 1500 memory_region_del_subregion(&proxy->modern_bar, 1501 ®ion->mr); 1502 } 1503 1504 static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy, 1505 VirtIOPCIRegion *region) 1506 { 1507 memory_region_del_subregion(&proxy->io_bar, 1508 ®ion->mr); 1509 } 1510 1511 static void virtio_pci_pre_plugged(DeviceState *d, Error **errp) 1512 { 1513 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1514 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1515 1516 if (virtio_pci_modern(proxy)) { 1517 virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1); 1518 } 1519 1520 virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE); 1521 } 1522 1523 /* This is called by virtio-bus just after the device is plugged. */ 1524 static void virtio_pci_device_plugged(DeviceState *d, Error **errp) 1525 { 1526 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1527 VirtioBusState *bus = &proxy->bus; 1528 bool legacy = virtio_pci_legacy(proxy); 1529 bool modern; 1530 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 1531 uint8_t *config; 1532 uint32_t size; 1533 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1534 1535 /* 1536 * Virtio capabilities present without 1537 * VIRTIO_F_VERSION_1 confuses guests 1538 */ 1539 if (!proxy->ignore_backend_features && 1540 !virtio_has_feature(vdev->host_features, VIRTIO_F_VERSION_1)) { 1541 virtio_pci_disable_modern(proxy); 1542 1543 if (!legacy) { 1544 error_setg(errp, "Device doesn't support modern mode, and legacy" 1545 " mode is disabled"); 1546 error_append_hint(errp, "Set disable-legacy to off\n"); 1547 1548 return; 1549 } 1550 } 1551 1552 modern = virtio_pci_modern(proxy); 1553 1554 config = proxy->pci_dev.config; 1555 if (proxy->class_code) { 1556 pci_config_set_class(config, proxy->class_code); 1557 } 1558 1559 if (legacy) { 1560 if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM)) { 1561 error_setg(errp, "VIRTIO_F_IOMMU_PLATFORM was supported by" 1562 " neither legacy nor transitional device"); 1563 return ; 1564 } 1565 /* 1566 * Legacy and transitional devices use specific subsystem IDs. 1567 * Note that the subsystem vendor ID (config + PCI_SUBSYSTEM_VENDOR_ID) 1568 * is set to PCI_SUBVENDOR_ID_REDHAT_QUMRANET by default. 1569 */ 1570 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus)); 1571 } else { 1572 /* pure virtio-1.0 */ 1573 pci_set_word(config + PCI_VENDOR_ID, 1574 PCI_VENDOR_ID_REDHAT_QUMRANET); 1575 pci_set_word(config + PCI_DEVICE_ID, 1576 0x1040 + virtio_bus_get_vdev_id(bus)); 1577 pci_config_set_revision(config, 1); 1578 } 1579 config[PCI_INTERRUPT_PIN] = 1; 1580 1581 1582 if (modern) { 1583 struct virtio_pci_cap cap = { 1584 .cap_len = sizeof cap, 1585 }; 1586 struct virtio_pci_notify_cap notify = { 1587 .cap.cap_len = sizeof notify, 1588 .notify_off_multiplier = 1589 cpu_to_le32(virtio_pci_queue_mem_mult(proxy)), 1590 }; 1591 struct virtio_pci_cfg_cap cfg = { 1592 .cap.cap_len = sizeof cfg, 1593 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG, 1594 }; 1595 struct virtio_pci_notify_cap notify_pio = { 1596 .cap.cap_len = sizeof notify, 1597 .notify_off_multiplier = cpu_to_le32(0x0), 1598 }; 1599 1600 struct virtio_pci_cfg_cap *cfg_mask; 1601 1602 virtio_pci_modern_regions_init(proxy); 1603 1604 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap); 1605 virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap); 1606 virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap); 1607 virtio_pci_modern_mem_region_map(proxy, &proxy->notify, ¬ify.cap); 1608 1609 if (modern_pio) { 1610 memory_region_init(&proxy->io_bar, OBJECT(proxy), 1611 "virtio-pci-io", 0x4); 1612 1613 pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar_idx, 1614 PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar); 1615 1616 virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio, 1617 ¬ify_pio.cap); 1618 } 1619 1620 pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar_idx, 1621 PCI_BASE_ADDRESS_SPACE_MEMORY | 1622 PCI_BASE_ADDRESS_MEM_PREFETCH | 1623 PCI_BASE_ADDRESS_MEM_TYPE_64, 1624 &proxy->modern_bar); 1625 1626 proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap); 1627 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap); 1628 pci_set_byte(&cfg_mask->cap.bar, ~0x0); 1629 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0); 1630 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0); 1631 pci_set_long(cfg_mask->pci_cfg_data, ~0x0); 1632 } 1633 1634 if (proxy->nvectors) { 1635 int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors, 1636 proxy->msix_bar_idx, NULL); 1637 if (err) { 1638 /* Notice when a system that supports MSIx can't initialize it */ 1639 if (err != -ENOTSUP) { 1640 warn_report("unable to init msix vectors to %" PRIu32, 1641 proxy->nvectors); 1642 } 1643 proxy->nvectors = 0; 1644 } 1645 } 1646 1647 proxy->pci_dev.config_write = virtio_write_config; 1648 proxy->pci_dev.config_read = virtio_read_config; 1649 1650 if (legacy) { 1651 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) 1652 + virtio_bus_get_vdev_config_len(bus); 1653 size = pow2ceil(size); 1654 1655 memory_region_init_io(&proxy->bar, OBJECT(proxy), 1656 &virtio_pci_config_ops, 1657 proxy, "virtio-pci", size); 1658 1659 pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar_idx, 1660 PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar); 1661 } 1662 } 1663 1664 static void virtio_pci_device_unplugged(DeviceState *d) 1665 { 1666 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1667 bool modern = virtio_pci_modern(proxy); 1668 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 1669 1670 virtio_pci_stop_ioeventfd(proxy); 1671 1672 if (modern) { 1673 virtio_pci_modern_mem_region_unmap(proxy, &proxy->common); 1674 virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr); 1675 virtio_pci_modern_mem_region_unmap(proxy, &proxy->device); 1676 virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify); 1677 if (modern_pio) { 1678 virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio); 1679 } 1680 } 1681 } 1682 1683 static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) 1684 { 1685 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 1686 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev); 1687 bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) && 1688 !pci_bus_is_root(pci_get_bus(pci_dev)); 1689 1690 if (kvm_enabled() && !kvm_has_many_ioeventfds()) { 1691 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD; 1692 } 1693 1694 /* 1695 * virtio pci bar layout used by default. 1696 * subclasses can re-arrange things if needed. 1697 * 1698 * region 0 -- virtio legacy io bar 1699 * region 1 -- msi-x bar 1700 * region 4+5 -- virtio modern memory (64bit) bar 1701 * 1702 */ 1703 proxy->legacy_io_bar_idx = 0; 1704 proxy->msix_bar_idx = 1; 1705 proxy->modern_io_bar_idx = 2; 1706 proxy->modern_mem_bar_idx = 4; 1707 1708 proxy->common.offset = 0x0; 1709 proxy->common.size = 0x1000; 1710 proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG; 1711 1712 proxy->isr.offset = 0x1000; 1713 proxy->isr.size = 0x1000; 1714 proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG; 1715 1716 proxy->device.offset = 0x2000; 1717 proxy->device.size = 0x1000; 1718 proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG; 1719 1720 proxy->notify.offset = 0x3000; 1721 proxy->notify.size = virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE_MAX; 1722 proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG; 1723 1724 proxy->notify_pio.offset = 0x0; 1725 proxy->notify_pio.size = 0x4; 1726 proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG; 1727 1728 /* subclasses can enforce modern, so do this unconditionally */ 1729 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci", 1730 /* PCI BAR regions must be powers of 2 */ 1731 pow2ceil(proxy->notify.offset + proxy->notify.size)); 1732 1733 if (proxy->disable_legacy == ON_OFF_AUTO_AUTO) { 1734 proxy->disable_legacy = pcie_port ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; 1735 } 1736 1737 if (!virtio_pci_modern(proxy) && !virtio_pci_legacy(proxy)) { 1738 error_setg(errp, "device cannot work as neither modern nor legacy mode" 1739 " is enabled"); 1740 error_append_hint(errp, "Set either disable-modern or disable-legacy" 1741 " to off\n"); 1742 return; 1743 } 1744 1745 if (pcie_port && pci_is_express(pci_dev)) { 1746 int pos; 1747 1748 pos = pcie_endpoint_cap_init(pci_dev, 0); 1749 assert(pos > 0); 1750 1751 pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, 1752 PCI_PM_SIZEOF, errp); 1753 if (pos < 0) { 1754 return; 1755 } 1756 1757 pci_dev->exp.pm_cap = pos; 1758 1759 /* 1760 * Indicates that this function complies with revision 1.2 of the 1761 * PCI Power Management Interface Specification. 1762 */ 1763 pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3); 1764 1765 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) { 1766 /* Init error enabling flags */ 1767 pcie_cap_deverr_init(pci_dev); 1768 } 1769 1770 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_LNKCTL) { 1771 /* Init Link Control Register */ 1772 pcie_cap_lnkctl_init(pci_dev); 1773 } 1774 1775 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) { 1776 /* Init Power Management Control Register */ 1777 pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL, 1778 PCI_PM_CTRL_STATE_MASK); 1779 } 1780 1781 if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { 1782 pcie_ats_init(pci_dev, 256); 1783 } 1784 1785 } else { 1786 /* 1787 * make future invocations of pci_is_express() return false 1788 * and pci_config_size() return PCI_CONFIG_SPACE_SIZE. 1789 */ 1790 pci_dev->cap_present &= ~QEMU_PCI_CAP_EXPRESS; 1791 } 1792 1793 virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy); 1794 if (k->realize) { 1795 k->realize(proxy, errp); 1796 } 1797 } 1798 1799 static void virtio_pci_exit(PCIDevice *pci_dev) 1800 { 1801 msix_uninit_exclusive_bar(pci_dev); 1802 } 1803 1804 static void virtio_pci_reset(DeviceState *qdev) 1805 { 1806 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); 1807 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus); 1808 PCIDevice *dev = PCI_DEVICE(qdev); 1809 int i; 1810 1811 virtio_pci_stop_ioeventfd(proxy); 1812 virtio_bus_reset(bus); 1813 msix_unuse_all_vectors(&proxy->pci_dev); 1814 1815 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { 1816 proxy->vqs[i].enabled = 0; 1817 proxy->vqs[i].num = 0; 1818 proxy->vqs[i].desc[0] = proxy->vqs[i].desc[1] = 0; 1819 proxy->vqs[i].avail[0] = proxy->vqs[i].avail[1] = 0; 1820 proxy->vqs[i].used[0] = proxy->vqs[i].used[1] = 0; 1821 } 1822 1823 if (pci_is_express(dev)) { 1824 pcie_cap_deverr_reset(dev); 1825 pcie_cap_lnkctl_reset(dev); 1826 1827 pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0); 1828 } 1829 } 1830 1831 static Property virtio_pci_properties[] = { 1832 DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags, 1833 VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false), 1834 DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags, 1835 VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true), 1836 DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags, 1837 VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false), 1838 DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags, 1839 VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false), 1840 DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags, 1841 VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false), 1842 DEFINE_PROP_BOOL("x-ignore-backend-features", VirtIOPCIProxy, 1843 ignore_backend_features, false), 1844 DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags, 1845 VIRTIO_PCI_FLAG_ATS_BIT, false), 1846 DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags, 1847 VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true), 1848 DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags, 1849 VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true), 1850 DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags, 1851 VIRTIO_PCI_FLAG_INIT_PM_BIT, true), 1852 DEFINE_PROP_END_OF_LIST(), 1853 }; 1854 1855 static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp) 1856 { 1857 VirtioPCIClass *vpciklass = VIRTIO_PCI_GET_CLASS(qdev); 1858 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); 1859 PCIDevice *pci_dev = &proxy->pci_dev; 1860 1861 if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) && 1862 virtio_pci_modern(proxy)) { 1863 pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; 1864 } 1865 1866 vpciklass->parent_dc_realize(qdev, errp); 1867 } 1868 1869 static void virtio_pci_class_init(ObjectClass *klass, void *data) 1870 { 1871 DeviceClass *dc = DEVICE_CLASS(klass); 1872 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1873 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass); 1874 1875 dc->props = virtio_pci_properties; 1876 k->realize = virtio_pci_realize; 1877 k->exit = virtio_pci_exit; 1878 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 1879 k->revision = VIRTIO_PCI_ABI_VERSION; 1880 k->class_id = PCI_CLASS_OTHERS; 1881 device_class_set_parent_realize(dc, virtio_pci_dc_realize, 1882 &vpciklass->parent_dc_realize); 1883 dc->reset = virtio_pci_reset; 1884 } 1885 1886 static const TypeInfo virtio_pci_info = { 1887 .name = TYPE_VIRTIO_PCI, 1888 .parent = TYPE_PCI_DEVICE, 1889 .instance_size = sizeof(VirtIOPCIProxy), 1890 .class_init = virtio_pci_class_init, 1891 .class_size = sizeof(VirtioPCIClass), 1892 .abstract = true, 1893 }; 1894 1895 static Property virtio_pci_generic_properties[] = { 1896 DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy, 1897 ON_OFF_AUTO_AUTO), 1898 DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false), 1899 DEFINE_PROP_END_OF_LIST(), 1900 }; 1901 1902 static void virtio_pci_base_class_init(ObjectClass *klass, void *data) 1903 { 1904 const VirtioPCIDeviceTypeInfo *t = data; 1905 if (t->class_init) { 1906 t->class_init(klass, NULL); 1907 } 1908 } 1909 1910 static void virtio_pci_generic_class_init(ObjectClass *klass, void *data) 1911 { 1912 DeviceClass *dc = DEVICE_CLASS(klass); 1913 1914 dc->props = virtio_pci_generic_properties; 1915 } 1916 1917 static void virtio_pci_transitional_instance_init(Object *obj) 1918 { 1919 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj); 1920 1921 proxy->disable_legacy = ON_OFF_AUTO_OFF; 1922 proxy->disable_modern = false; 1923 } 1924 1925 static void virtio_pci_non_transitional_instance_init(Object *obj) 1926 { 1927 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj); 1928 1929 proxy->disable_legacy = ON_OFF_AUTO_ON; 1930 proxy->disable_modern = false; 1931 } 1932 1933 void virtio_pci_types_register(const VirtioPCIDeviceTypeInfo *t) 1934 { 1935 char *base_name = NULL; 1936 TypeInfo base_type_info = { 1937 .name = t->base_name, 1938 .parent = t->parent ? t->parent : TYPE_VIRTIO_PCI, 1939 .instance_size = t->instance_size, 1940 .instance_init = t->instance_init, 1941 .class_size = t->class_size, 1942 .abstract = true, 1943 .interfaces = t->interfaces, 1944 }; 1945 TypeInfo generic_type_info = { 1946 .name = t->generic_name, 1947 .parent = base_type_info.name, 1948 .class_init = virtio_pci_generic_class_init, 1949 .interfaces = (InterfaceInfo[]) { 1950 { INTERFACE_PCIE_DEVICE }, 1951 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 1952 { } 1953 }, 1954 }; 1955 1956 if (!base_type_info.name) { 1957 /* No base type -> register a single generic device type */ 1958 /* use intermediate %s-base-type to add generic device props */ 1959 base_name = g_strdup_printf("%s-base-type", t->generic_name); 1960 base_type_info.name = base_name; 1961 base_type_info.class_init = virtio_pci_generic_class_init; 1962 1963 generic_type_info.parent = base_name; 1964 generic_type_info.class_init = virtio_pci_base_class_init; 1965 generic_type_info.class_data = (void *)t; 1966 1967 assert(!t->non_transitional_name); 1968 assert(!t->transitional_name); 1969 } else { 1970 base_type_info.class_init = virtio_pci_base_class_init; 1971 base_type_info.class_data = (void *)t; 1972 } 1973 1974 type_register(&base_type_info); 1975 if (generic_type_info.name) { 1976 type_register(&generic_type_info); 1977 } 1978 1979 if (t->non_transitional_name) { 1980 const TypeInfo non_transitional_type_info = { 1981 .name = t->non_transitional_name, 1982 .parent = base_type_info.name, 1983 .instance_init = virtio_pci_non_transitional_instance_init, 1984 .interfaces = (InterfaceInfo[]) { 1985 { INTERFACE_PCIE_DEVICE }, 1986 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 1987 { } 1988 }, 1989 }; 1990 type_register(&non_transitional_type_info); 1991 } 1992 1993 if (t->transitional_name) { 1994 const TypeInfo transitional_type_info = { 1995 .name = t->transitional_name, 1996 .parent = base_type_info.name, 1997 .instance_init = virtio_pci_transitional_instance_init, 1998 .interfaces = (InterfaceInfo[]) { 1999 /* 2000 * Transitional virtio devices work only as Conventional PCI 2001 * devices because they require PIO ports. 2002 */ 2003 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 2004 { } 2005 }, 2006 }; 2007 type_register(&transitional_type_info); 2008 } 2009 g_free(base_name); 2010 } 2011 2012 /* virtio-pci-bus */ 2013 2014 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size, 2015 VirtIOPCIProxy *dev) 2016 { 2017 DeviceState *qdev = DEVICE(dev); 2018 char virtio_bus_name[] = "virtio-bus"; 2019 2020 qbus_create_inplace(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev, 2021 virtio_bus_name); 2022 } 2023 2024 static void virtio_pci_bus_class_init(ObjectClass *klass, void *data) 2025 { 2026 BusClass *bus_class = BUS_CLASS(klass); 2027 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass); 2028 bus_class->max_dev = 1; 2029 k->notify = virtio_pci_notify; 2030 k->save_config = virtio_pci_save_config; 2031 k->load_config = virtio_pci_load_config; 2032 k->save_queue = virtio_pci_save_queue; 2033 k->load_queue = virtio_pci_load_queue; 2034 k->save_extra_state = virtio_pci_save_extra_state; 2035 k->load_extra_state = virtio_pci_load_extra_state; 2036 k->has_extra_state = virtio_pci_has_extra_state; 2037 k->query_guest_notifiers = virtio_pci_query_guest_notifiers; 2038 k->set_guest_notifiers = virtio_pci_set_guest_notifiers; 2039 k->set_host_notifier_mr = virtio_pci_set_host_notifier_mr; 2040 k->vmstate_change = virtio_pci_vmstate_change; 2041 k->pre_plugged = virtio_pci_pre_plugged; 2042 k->device_plugged = virtio_pci_device_plugged; 2043 k->device_unplugged = virtio_pci_device_unplugged; 2044 k->query_nvectors = virtio_pci_query_nvectors; 2045 k->ioeventfd_enabled = virtio_pci_ioeventfd_enabled; 2046 k->ioeventfd_assign = virtio_pci_ioeventfd_assign; 2047 k->get_dma_as = virtio_pci_get_dma_as; 2048 } 2049 2050 static const TypeInfo virtio_pci_bus_info = { 2051 .name = TYPE_VIRTIO_PCI_BUS, 2052 .parent = TYPE_VIRTIO_BUS, 2053 .instance_size = sizeof(VirtioPCIBusState), 2054 .class_init = virtio_pci_bus_class_init, 2055 }; 2056 2057 static void virtio_pci_register_types(void) 2058 { 2059 /* Base types: */ 2060 type_register_static(&virtio_pci_bus_info); 2061 type_register_static(&virtio_pci_info); 2062 } 2063 2064 type_init(virtio_pci_register_types) 2065 2066