1 /* 2 * Virtio PCI Bindings 3 * 4 * Copyright IBM, Corp. 2007 5 * Copyright (c) 2009 CodeSourcery 6 * 7 * Authors: 8 * Anthony Liguori <aliguori@us.ibm.com> 9 * Paul Brook <paul@codesourcery.com> 10 * 11 * This work is licensed under the terms of the GNU GPL, version 2. See 12 * the COPYING file in the top-level directory. 13 * 14 * Contributions after 2012-01-13 are licensed under the terms of the 15 * GNU GPL, version 2 or (at your option) any later version. 16 */ 17 18 #include "qemu/osdep.h" 19 20 #include "exec/memop.h" 21 #include "standard-headers/linux/virtio_pci.h" 22 #include "standard-headers/linux/virtio_ids.h" 23 #include "hw/boards.h" 24 #include "hw/virtio/virtio.h" 25 #include "migration/qemu-file-types.h" 26 #include "hw/pci/pci.h" 27 #include "hw/pci/pci_bus.h" 28 #include "hw/qdev-properties.h" 29 #include "qapi/error.h" 30 #include "qemu/error-report.h" 31 #include "qemu/log.h" 32 #include "qemu/module.h" 33 #include "hw/pci/msi.h" 34 #include "hw/pci/msix.h" 35 #include "hw/loader.h" 36 #include "sysemu/kvm.h" 37 #include "hw/virtio/virtio-pci.h" 38 #include "qemu/range.h" 39 #include "hw/virtio/virtio-bus.h" 40 #include "qapi/visitor.h" 41 #include "sysemu/replay.h" 42 #include "trace.h" 43 44 #define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev)) 45 46 #undef VIRTIO_PCI_CONFIG 47 48 /* The remaining space is defined by each driver as the per-driver 49 * configuration space */ 50 #define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev)) 51 52 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size, 53 VirtIOPCIProxy *dev); 54 static void virtio_pci_reset(DeviceState *qdev); 55 56 /* virtio device */ 57 /* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */ 58 static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d) 59 { 60 return container_of(d, VirtIOPCIProxy, pci_dev.qdev); 61 } 62 63 /* DeviceState to VirtIOPCIProxy. Note: used on datapath, 64 * be careful and test performance if you change this. 65 */ 66 static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d) 67 { 68 return container_of(d, VirtIOPCIProxy, pci_dev.qdev); 69 } 70 71 static void virtio_pci_notify(DeviceState *d, uint16_t vector) 72 { 73 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d); 74 75 if (msix_enabled(&proxy->pci_dev)) { 76 if (vector != VIRTIO_NO_VECTOR) { 77 msix_notify(&proxy->pci_dev, vector); 78 } 79 } else { 80 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 81 pci_set_irq(&proxy->pci_dev, qatomic_read(&vdev->isr) & 1); 82 } 83 } 84 85 static void virtio_pci_save_config(DeviceState *d, QEMUFile *f) 86 { 87 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 88 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 89 90 pci_device_save(&proxy->pci_dev, f); 91 msix_save(&proxy->pci_dev, f); 92 if (msix_present(&proxy->pci_dev)) 93 qemu_put_be16(f, vdev->config_vector); 94 } 95 96 static const VMStateDescription vmstate_virtio_pci_modern_queue_state = { 97 .name = "virtio_pci/modern_queue_state", 98 .version_id = 1, 99 .minimum_version_id = 1, 100 .fields = (VMStateField[]) { 101 VMSTATE_UINT16(num, VirtIOPCIQueue), 102 VMSTATE_UNUSED(1), /* enabled was stored as be16 */ 103 VMSTATE_BOOL(enabled, VirtIOPCIQueue), 104 VMSTATE_UINT32_ARRAY(desc, VirtIOPCIQueue, 2), 105 VMSTATE_UINT32_ARRAY(avail, VirtIOPCIQueue, 2), 106 VMSTATE_UINT32_ARRAY(used, VirtIOPCIQueue, 2), 107 VMSTATE_END_OF_LIST() 108 } 109 }; 110 111 static bool virtio_pci_modern_state_needed(void *opaque) 112 { 113 VirtIOPCIProxy *proxy = opaque; 114 115 return virtio_pci_modern(proxy); 116 } 117 118 static const VMStateDescription vmstate_virtio_pci_modern_state_sub = { 119 .name = "virtio_pci/modern_state", 120 .version_id = 1, 121 .minimum_version_id = 1, 122 .needed = &virtio_pci_modern_state_needed, 123 .fields = (VMStateField[]) { 124 VMSTATE_UINT32(dfselect, VirtIOPCIProxy), 125 VMSTATE_UINT32(gfselect, VirtIOPCIProxy), 126 VMSTATE_UINT32_ARRAY(guest_features, VirtIOPCIProxy, 2), 127 VMSTATE_STRUCT_ARRAY(vqs, VirtIOPCIProxy, VIRTIO_QUEUE_MAX, 0, 128 vmstate_virtio_pci_modern_queue_state, 129 VirtIOPCIQueue), 130 VMSTATE_END_OF_LIST() 131 } 132 }; 133 134 static const VMStateDescription vmstate_virtio_pci = { 135 .name = "virtio_pci", 136 .version_id = 1, 137 .minimum_version_id = 1, 138 .fields = (VMStateField[]) { 139 VMSTATE_END_OF_LIST() 140 }, 141 .subsections = (const VMStateDescription*[]) { 142 &vmstate_virtio_pci_modern_state_sub, 143 NULL 144 } 145 }; 146 147 static bool virtio_pci_has_extra_state(DeviceState *d) 148 { 149 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 150 151 return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA; 152 } 153 154 static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f) 155 { 156 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 157 158 vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL); 159 } 160 161 static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f) 162 { 163 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 164 165 return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1); 166 } 167 168 static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f) 169 { 170 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 171 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 172 173 if (msix_present(&proxy->pci_dev)) 174 qemu_put_be16(f, virtio_queue_vector(vdev, n)); 175 } 176 177 static int virtio_pci_load_config(DeviceState *d, QEMUFile *f) 178 { 179 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 180 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 181 uint16_t vector; 182 183 int ret; 184 ret = pci_device_load(&proxy->pci_dev, f); 185 if (ret) { 186 return ret; 187 } 188 msix_unuse_all_vectors(&proxy->pci_dev); 189 msix_load(&proxy->pci_dev, f); 190 if (msix_present(&proxy->pci_dev)) { 191 qemu_get_be16s(f, &vector); 192 193 if (vector != VIRTIO_NO_VECTOR && vector >= proxy->nvectors) { 194 return -EINVAL; 195 } 196 } else { 197 vector = VIRTIO_NO_VECTOR; 198 } 199 vdev->config_vector = vector; 200 if (vector != VIRTIO_NO_VECTOR) { 201 msix_vector_use(&proxy->pci_dev, vector); 202 } 203 return 0; 204 } 205 206 static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f) 207 { 208 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 209 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 210 211 uint16_t vector; 212 if (msix_present(&proxy->pci_dev)) { 213 qemu_get_be16s(f, &vector); 214 if (vector != VIRTIO_NO_VECTOR && vector >= proxy->nvectors) { 215 return -EINVAL; 216 } 217 } else { 218 vector = VIRTIO_NO_VECTOR; 219 } 220 virtio_queue_set_vector(vdev, n, vector); 221 if (vector != VIRTIO_NO_VECTOR) { 222 msix_vector_use(&proxy->pci_dev, vector); 223 } 224 225 return 0; 226 } 227 228 typedef struct VirtIOPCIIDInfo { 229 /* virtio id */ 230 uint16_t vdev_id; 231 /* pci device id for the transitional device */ 232 uint16_t trans_devid; 233 uint16_t class_id; 234 } VirtIOPCIIDInfo; 235 236 static const VirtIOPCIIDInfo virtio_pci_id_info[] = { 237 { 238 .vdev_id = VIRTIO_ID_CRYPTO, 239 .class_id = PCI_CLASS_OTHERS, 240 }, { 241 .vdev_id = VIRTIO_ID_FS, 242 .class_id = PCI_CLASS_STORAGE_OTHER, 243 }, { 244 .vdev_id = VIRTIO_ID_NET, 245 .trans_devid = PCI_DEVICE_ID_VIRTIO_NET, 246 .class_id = PCI_CLASS_NETWORK_ETHERNET, 247 }, { 248 .vdev_id = VIRTIO_ID_BLOCK, 249 .trans_devid = PCI_DEVICE_ID_VIRTIO_BLOCK, 250 .class_id = PCI_CLASS_STORAGE_SCSI, 251 }, { 252 .vdev_id = VIRTIO_ID_CONSOLE, 253 .trans_devid = PCI_DEVICE_ID_VIRTIO_CONSOLE, 254 .class_id = PCI_CLASS_COMMUNICATION_OTHER, 255 }, { 256 .vdev_id = VIRTIO_ID_SCSI, 257 .trans_devid = PCI_DEVICE_ID_VIRTIO_SCSI, 258 .class_id = PCI_CLASS_STORAGE_SCSI 259 }, { 260 .vdev_id = VIRTIO_ID_9P, 261 .trans_devid = PCI_DEVICE_ID_VIRTIO_9P, 262 .class_id = PCI_BASE_CLASS_NETWORK, 263 }, { 264 .vdev_id = VIRTIO_ID_BALLOON, 265 .trans_devid = PCI_DEVICE_ID_VIRTIO_BALLOON, 266 .class_id = PCI_CLASS_OTHERS, 267 }, { 268 .vdev_id = VIRTIO_ID_RNG, 269 .trans_devid = PCI_DEVICE_ID_VIRTIO_RNG, 270 .class_id = PCI_CLASS_OTHERS, 271 }, 272 }; 273 274 static const VirtIOPCIIDInfo *virtio_pci_get_id_info(uint16_t vdev_id) 275 { 276 const VirtIOPCIIDInfo *info = NULL; 277 int i; 278 279 for (i = 0; i < ARRAY_SIZE(virtio_pci_id_info); i++) { 280 if (virtio_pci_id_info[i].vdev_id == vdev_id) { 281 info = &virtio_pci_id_info[i]; 282 break; 283 } 284 } 285 286 if (!info) { 287 /* The device id is invalid or not added to the id_info yet. */ 288 error_report("Invalid virtio device(id %u)", vdev_id); 289 abort(); 290 } 291 292 return info; 293 } 294 295 /* 296 * Get the Transitional Device ID for the specific device, return 297 * zero if the device is non-transitional. 298 */ 299 uint16_t virtio_pci_get_trans_devid(uint16_t device_id) 300 { 301 return virtio_pci_get_id_info(device_id)->trans_devid; 302 } 303 304 /* 305 * Get the Class ID for the specific device. 306 */ 307 uint16_t virtio_pci_get_class_id(uint16_t device_id) 308 { 309 return virtio_pci_get_id_info(device_id)->class_id; 310 } 311 312 static bool virtio_pci_ioeventfd_enabled(DeviceState *d) 313 { 314 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 315 316 return (proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD) != 0; 317 } 318 319 #define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000 320 321 static inline int virtio_pci_queue_mem_mult(struct VirtIOPCIProxy *proxy) 322 { 323 return (proxy->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ) ? 324 QEMU_VIRTIO_PCI_QUEUE_MEM_MULT : 4; 325 } 326 327 static int virtio_pci_ioeventfd_assign(DeviceState *d, EventNotifier *notifier, 328 int n, bool assign) 329 { 330 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 331 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 332 VirtQueue *vq = virtio_get_queue(vdev, n); 333 bool legacy = virtio_pci_legacy(proxy); 334 bool modern = virtio_pci_modern(proxy); 335 bool fast_mmio = kvm_ioeventfd_any_length_enabled(); 336 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 337 MemoryRegion *modern_mr = &proxy->notify.mr; 338 MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr; 339 MemoryRegion *legacy_mr = &proxy->bar; 340 hwaddr modern_addr = virtio_pci_queue_mem_mult(proxy) * 341 virtio_get_queue_index(vq); 342 hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY; 343 344 if (assign) { 345 if (modern) { 346 if (fast_mmio) { 347 memory_region_add_eventfd(modern_mr, modern_addr, 0, 348 false, n, notifier); 349 } else { 350 memory_region_add_eventfd(modern_mr, modern_addr, 2, 351 false, n, notifier); 352 } 353 if (modern_pio) { 354 memory_region_add_eventfd(modern_notify_mr, 0, 2, 355 true, n, notifier); 356 } 357 } 358 if (legacy) { 359 memory_region_add_eventfd(legacy_mr, legacy_addr, 2, 360 true, n, notifier); 361 } 362 } else { 363 if (modern) { 364 if (fast_mmio) { 365 memory_region_del_eventfd(modern_mr, modern_addr, 0, 366 false, n, notifier); 367 } else { 368 memory_region_del_eventfd(modern_mr, modern_addr, 2, 369 false, n, notifier); 370 } 371 if (modern_pio) { 372 memory_region_del_eventfd(modern_notify_mr, 0, 2, 373 true, n, notifier); 374 } 375 } 376 if (legacy) { 377 memory_region_del_eventfd(legacy_mr, legacy_addr, 2, 378 true, n, notifier); 379 } 380 } 381 return 0; 382 } 383 384 static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy) 385 { 386 virtio_bus_start_ioeventfd(&proxy->bus); 387 } 388 389 static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy) 390 { 391 virtio_bus_stop_ioeventfd(&proxy->bus); 392 } 393 394 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val) 395 { 396 VirtIOPCIProxy *proxy = opaque; 397 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 398 uint16_t vector; 399 hwaddr pa; 400 401 switch (addr) { 402 case VIRTIO_PCI_GUEST_FEATURES: 403 /* Guest does not negotiate properly? We have to assume nothing. */ 404 if (val & (1 << VIRTIO_F_BAD_FEATURE)) { 405 val = virtio_bus_get_vdev_bad_features(&proxy->bus); 406 } 407 virtio_set_features(vdev, val); 408 break; 409 case VIRTIO_PCI_QUEUE_PFN: 410 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT; 411 if (pa == 0) { 412 virtio_pci_reset(DEVICE(proxy)); 413 } 414 else 415 virtio_queue_set_addr(vdev, vdev->queue_sel, pa); 416 break; 417 case VIRTIO_PCI_QUEUE_SEL: 418 if (val < VIRTIO_QUEUE_MAX) 419 vdev->queue_sel = val; 420 break; 421 case VIRTIO_PCI_QUEUE_NOTIFY: 422 if (val < VIRTIO_QUEUE_MAX) { 423 virtio_queue_notify(vdev, val); 424 } 425 break; 426 case VIRTIO_PCI_STATUS: 427 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) { 428 virtio_pci_stop_ioeventfd(proxy); 429 } 430 431 virtio_set_status(vdev, val & 0xFF); 432 433 if (val & VIRTIO_CONFIG_S_DRIVER_OK) { 434 virtio_pci_start_ioeventfd(proxy); 435 } 436 437 if (vdev->status == 0) { 438 virtio_pci_reset(DEVICE(proxy)); 439 } 440 441 /* Linux before 2.6.34 drives the device without enabling 442 the PCI device bus master bit. Enable it automatically 443 for the guest. This is a PCI spec violation but so is 444 initiating DMA with bus master bit clear. */ 445 if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) { 446 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND, 447 proxy->pci_dev.config[PCI_COMMAND] | 448 PCI_COMMAND_MASTER, 1); 449 } 450 break; 451 case VIRTIO_MSI_CONFIG_VECTOR: 452 if (vdev->config_vector != VIRTIO_NO_VECTOR) { 453 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector); 454 } 455 /* Make it possible for guest to discover an error took place. */ 456 if (val < proxy->nvectors) { 457 msix_vector_use(&proxy->pci_dev, val); 458 } else { 459 val = VIRTIO_NO_VECTOR; 460 } 461 vdev->config_vector = val; 462 break; 463 case VIRTIO_MSI_QUEUE_VECTOR: 464 vector = virtio_queue_vector(vdev, vdev->queue_sel); 465 if (vector != VIRTIO_NO_VECTOR) { 466 msix_vector_unuse(&proxy->pci_dev, vector); 467 } 468 /* Make it possible for guest to discover an error took place. */ 469 if (val < proxy->nvectors) { 470 msix_vector_use(&proxy->pci_dev, val); 471 } else { 472 val = VIRTIO_NO_VECTOR; 473 } 474 virtio_queue_set_vector(vdev, vdev->queue_sel, val); 475 break; 476 default: 477 qemu_log_mask(LOG_GUEST_ERROR, 478 "%s: unexpected address 0x%x value 0x%x\n", 479 __func__, addr, val); 480 break; 481 } 482 } 483 484 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr) 485 { 486 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 487 uint32_t ret = 0xFFFFFFFF; 488 489 switch (addr) { 490 case VIRTIO_PCI_HOST_FEATURES: 491 ret = vdev->host_features; 492 break; 493 case VIRTIO_PCI_GUEST_FEATURES: 494 ret = vdev->guest_features; 495 break; 496 case VIRTIO_PCI_QUEUE_PFN: 497 ret = virtio_queue_get_addr(vdev, vdev->queue_sel) 498 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT; 499 break; 500 case VIRTIO_PCI_QUEUE_NUM: 501 ret = virtio_queue_get_num(vdev, vdev->queue_sel); 502 break; 503 case VIRTIO_PCI_QUEUE_SEL: 504 ret = vdev->queue_sel; 505 break; 506 case VIRTIO_PCI_STATUS: 507 ret = vdev->status; 508 break; 509 case VIRTIO_PCI_ISR: 510 /* reading from the ISR also clears it. */ 511 ret = qatomic_xchg(&vdev->isr, 0); 512 pci_irq_deassert(&proxy->pci_dev); 513 break; 514 case VIRTIO_MSI_CONFIG_VECTOR: 515 ret = vdev->config_vector; 516 break; 517 case VIRTIO_MSI_QUEUE_VECTOR: 518 ret = virtio_queue_vector(vdev, vdev->queue_sel); 519 break; 520 default: 521 break; 522 } 523 524 return ret; 525 } 526 527 static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr, 528 unsigned size) 529 { 530 VirtIOPCIProxy *proxy = opaque; 531 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 532 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev); 533 uint64_t val = 0; 534 535 if (vdev == NULL) { 536 return UINT64_MAX; 537 } 538 539 if (addr < config) { 540 return virtio_ioport_read(proxy, addr); 541 } 542 addr -= config; 543 544 switch (size) { 545 case 1: 546 val = virtio_config_readb(vdev, addr); 547 break; 548 case 2: 549 val = virtio_config_readw(vdev, addr); 550 if (virtio_is_big_endian(vdev)) { 551 val = bswap16(val); 552 } 553 break; 554 case 4: 555 val = virtio_config_readl(vdev, addr); 556 if (virtio_is_big_endian(vdev)) { 557 val = bswap32(val); 558 } 559 break; 560 } 561 return val; 562 } 563 564 static void virtio_pci_config_write(void *opaque, hwaddr addr, 565 uint64_t val, unsigned size) 566 { 567 VirtIOPCIProxy *proxy = opaque; 568 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev); 569 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 570 571 if (vdev == NULL) { 572 return; 573 } 574 575 if (addr < config) { 576 virtio_ioport_write(proxy, addr, val); 577 return; 578 } 579 addr -= config; 580 /* 581 * Virtio-PCI is odd. Ioports are LE but config space is target native 582 * endian. 583 */ 584 switch (size) { 585 case 1: 586 virtio_config_writeb(vdev, addr, val); 587 break; 588 case 2: 589 if (virtio_is_big_endian(vdev)) { 590 val = bswap16(val); 591 } 592 virtio_config_writew(vdev, addr, val); 593 break; 594 case 4: 595 if (virtio_is_big_endian(vdev)) { 596 val = bswap32(val); 597 } 598 virtio_config_writel(vdev, addr, val); 599 break; 600 } 601 } 602 603 static const MemoryRegionOps virtio_pci_config_ops = { 604 .read = virtio_pci_config_read, 605 .write = virtio_pci_config_write, 606 .impl = { 607 .min_access_size = 1, 608 .max_access_size = 4, 609 }, 610 .endianness = DEVICE_LITTLE_ENDIAN, 611 }; 612 613 static MemoryRegion *virtio_address_space_lookup(VirtIOPCIProxy *proxy, 614 hwaddr *off, int len) 615 { 616 int i; 617 VirtIOPCIRegion *reg; 618 619 for (i = 0; i < ARRAY_SIZE(proxy->regs); ++i) { 620 reg = &proxy->regs[i]; 621 if (*off >= reg->offset && 622 *off + len <= reg->offset + reg->size) { 623 *off -= reg->offset; 624 return ®->mr; 625 } 626 } 627 628 return NULL; 629 } 630 631 /* Below are generic functions to do memcpy from/to an address space, 632 * without byteswaps, with input validation. 633 * 634 * As regular address_space_* APIs all do some kind of byteswap at least for 635 * some host/target combinations, we are forced to explicitly convert to a 636 * known-endianness integer value. 637 * It doesn't really matter which endian format to go through, so the code 638 * below selects the endian that causes the least amount of work on the given 639 * host. 640 * 641 * Note: host pointer must be aligned. 642 */ 643 static 644 void virtio_address_space_write(VirtIOPCIProxy *proxy, hwaddr addr, 645 const uint8_t *buf, int len) 646 { 647 uint64_t val; 648 MemoryRegion *mr; 649 650 /* address_space_* APIs assume an aligned address. 651 * As address is under guest control, handle illegal values. 652 */ 653 addr &= ~(len - 1); 654 655 mr = virtio_address_space_lookup(proxy, &addr, len); 656 if (!mr) { 657 return; 658 } 659 660 /* Make sure caller aligned buf properly */ 661 assert(!(((uintptr_t)buf) & (len - 1))); 662 663 switch (len) { 664 case 1: 665 val = pci_get_byte(buf); 666 break; 667 case 2: 668 val = pci_get_word(buf); 669 break; 670 case 4: 671 val = pci_get_long(buf); 672 break; 673 default: 674 /* As length is under guest control, handle illegal values. */ 675 return; 676 } 677 memory_region_dispatch_write(mr, addr, val, size_memop(len) | MO_LE, 678 MEMTXATTRS_UNSPECIFIED); 679 } 680 681 static void 682 virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr, 683 uint8_t *buf, int len) 684 { 685 uint64_t val; 686 MemoryRegion *mr; 687 688 /* address_space_* APIs assume an aligned address. 689 * As address is under guest control, handle illegal values. 690 */ 691 addr &= ~(len - 1); 692 693 mr = virtio_address_space_lookup(proxy, &addr, len); 694 if (!mr) { 695 return; 696 } 697 698 /* Make sure caller aligned buf properly */ 699 assert(!(((uintptr_t)buf) & (len - 1))); 700 701 memory_region_dispatch_read(mr, addr, &val, size_memop(len) | MO_LE, 702 MEMTXATTRS_UNSPECIFIED); 703 switch (len) { 704 case 1: 705 pci_set_byte(buf, val); 706 break; 707 case 2: 708 pci_set_word(buf, val); 709 break; 710 case 4: 711 pci_set_long(buf, val); 712 break; 713 default: 714 /* As length is under guest control, handle illegal values. */ 715 break; 716 } 717 } 718 719 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address, 720 uint32_t val, int len) 721 { 722 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 723 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 724 struct virtio_pci_cfg_cap *cfg; 725 726 pci_default_write_config(pci_dev, address, val, len); 727 728 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) { 729 pcie_cap_flr_write_config(pci_dev, address, val, len); 730 } 731 732 if (range_covers_byte(address, len, PCI_COMMAND)) { 733 if (!(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { 734 virtio_set_disabled(vdev, true); 735 virtio_pci_stop_ioeventfd(proxy); 736 virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK); 737 } else { 738 virtio_set_disabled(vdev, false); 739 } 740 } 741 742 if (proxy->config_cap && 743 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap, 744 pci_cfg_data), 745 sizeof cfg->pci_cfg_data)) { 746 uint32_t off; 747 uint32_t len; 748 749 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap); 750 off = le32_to_cpu(cfg->cap.offset); 751 len = le32_to_cpu(cfg->cap.length); 752 753 if (len == 1 || len == 2 || len == 4) { 754 assert(len <= sizeof cfg->pci_cfg_data); 755 virtio_address_space_write(proxy, off, cfg->pci_cfg_data, len); 756 } 757 } 758 } 759 760 static uint32_t virtio_read_config(PCIDevice *pci_dev, 761 uint32_t address, int len) 762 { 763 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 764 struct virtio_pci_cfg_cap *cfg; 765 766 if (proxy->config_cap && 767 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap, 768 pci_cfg_data), 769 sizeof cfg->pci_cfg_data)) { 770 uint32_t off; 771 uint32_t len; 772 773 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap); 774 off = le32_to_cpu(cfg->cap.offset); 775 len = le32_to_cpu(cfg->cap.length); 776 777 if (len == 1 || len == 2 || len == 4) { 778 assert(len <= sizeof cfg->pci_cfg_data); 779 virtio_address_space_read(proxy, off, cfg->pci_cfg_data, len); 780 } 781 } 782 783 return pci_default_read_config(pci_dev, address, len); 784 } 785 786 static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy, 787 unsigned int queue_no, 788 unsigned int vector) 789 { 790 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 791 int ret; 792 793 if (irqfd->users == 0) { 794 KVMRouteChange c = kvm_irqchip_begin_route_changes(kvm_state); 795 ret = kvm_irqchip_add_msi_route(&c, vector, &proxy->pci_dev); 796 if (ret < 0) { 797 return ret; 798 } 799 kvm_irqchip_commit_route_changes(&c); 800 irqfd->virq = ret; 801 } 802 irqfd->users++; 803 return 0; 804 } 805 806 static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy, 807 unsigned int vector) 808 { 809 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 810 if (--irqfd->users == 0) { 811 kvm_irqchip_release_virq(kvm_state, irqfd->virq); 812 } 813 } 814 815 static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy, 816 unsigned int queue_no, 817 unsigned int vector) 818 { 819 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 820 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 821 VirtQueue *vq = virtio_get_queue(vdev, queue_no); 822 EventNotifier *n = virtio_queue_get_guest_notifier(vq); 823 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq); 824 } 825 826 static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy, 827 unsigned int queue_no, 828 unsigned int vector) 829 { 830 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 831 VirtQueue *vq = virtio_get_queue(vdev, queue_no); 832 EventNotifier *n = virtio_queue_get_guest_notifier(vq); 833 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 834 int ret; 835 836 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq); 837 assert(ret == 0); 838 } 839 840 static int kvm_virtio_pci_vector_use(VirtIOPCIProxy *proxy, int nvqs) 841 { 842 PCIDevice *dev = &proxy->pci_dev; 843 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 844 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 845 unsigned int vector; 846 int ret, queue_no; 847 848 for (queue_no = 0; queue_no < nvqs; queue_no++) { 849 if (!virtio_queue_get_num(vdev, queue_no)) { 850 break; 851 } 852 vector = virtio_queue_vector(vdev, queue_no); 853 if (vector >= msix_nr_vectors_allocated(dev)) { 854 continue; 855 } 856 ret = kvm_virtio_pci_vq_vector_use(proxy, queue_no, vector); 857 if (ret < 0) { 858 goto undo; 859 } 860 /* If guest supports masking, set up irqfd now. 861 * Otherwise, delay until unmasked in the frontend. 862 */ 863 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 864 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector); 865 if (ret < 0) { 866 kvm_virtio_pci_vq_vector_release(proxy, vector); 867 goto undo; 868 } 869 } 870 } 871 return 0; 872 873 undo: 874 while (--queue_no >= 0) { 875 vector = virtio_queue_vector(vdev, queue_no); 876 if (vector >= msix_nr_vectors_allocated(dev)) { 877 continue; 878 } 879 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 880 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); 881 } 882 kvm_virtio_pci_vq_vector_release(proxy, vector); 883 } 884 return ret; 885 } 886 887 static void kvm_virtio_pci_vector_release(VirtIOPCIProxy *proxy, int nvqs) 888 { 889 PCIDevice *dev = &proxy->pci_dev; 890 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 891 unsigned int vector; 892 int queue_no; 893 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 894 895 for (queue_no = 0; queue_no < nvqs; queue_no++) { 896 if (!virtio_queue_get_num(vdev, queue_no)) { 897 break; 898 } 899 vector = virtio_queue_vector(vdev, queue_no); 900 if (vector >= msix_nr_vectors_allocated(dev)) { 901 continue; 902 } 903 /* If guest supports masking, clean up irqfd now. 904 * Otherwise, it was cleaned when masked in the frontend. 905 */ 906 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 907 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); 908 } 909 kvm_virtio_pci_vq_vector_release(proxy, vector); 910 } 911 } 912 913 static int virtio_pci_vq_vector_unmask(VirtIOPCIProxy *proxy, 914 unsigned int queue_no, 915 unsigned int vector, 916 MSIMessage msg) 917 { 918 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 919 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 920 VirtQueue *vq = virtio_get_queue(vdev, queue_no); 921 EventNotifier *n = virtio_queue_get_guest_notifier(vq); 922 VirtIOIRQFD *irqfd; 923 int ret = 0; 924 925 if (proxy->vector_irqfd) { 926 irqfd = &proxy->vector_irqfd[vector]; 927 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) { 928 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg, 929 &proxy->pci_dev); 930 if (ret < 0) { 931 return ret; 932 } 933 kvm_irqchip_commit_routes(kvm_state); 934 } 935 } 936 937 /* If guest supports masking, irqfd is already setup, unmask it. 938 * Otherwise, set it up now. 939 */ 940 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 941 k->guest_notifier_mask(vdev, queue_no, false); 942 /* Test after unmasking to avoid losing events. */ 943 if (k->guest_notifier_pending && 944 k->guest_notifier_pending(vdev, queue_no)) { 945 event_notifier_set(n); 946 } 947 } else { 948 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector); 949 } 950 return ret; 951 } 952 953 static void virtio_pci_vq_vector_mask(VirtIOPCIProxy *proxy, 954 unsigned int queue_no, 955 unsigned int vector) 956 { 957 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 958 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 959 960 /* If guest supports masking, keep irqfd but mask it. 961 * Otherwise, clean it up now. 962 */ 963 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 964 k->guest_notifier_mask(vdev, queue_no, true); 965 } else { 966 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); 967 } 968 } 969 970 static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector, 971 MSIMessage msg) 972 { 973 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 974 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 975 VirtQueue *vq = virtio_vector_first_queue(vdev, vector); 976 int ret, index, unmasked = 0; 977 978 while (vq) { 979 index = virtio_get_queue_index(vq); 980 if (!virtio_queue_get_num(vdev, index)) { 981 break; 982 } 983 if (index < proxy->nvqs_with_notifiers) { 984 ret = virtio_pci_vq_vector_unmask(proxy, index, vector, msg); 985 if (ret < 0) { 986 goto undo; 987 } 988 ++unmasked; 989 } 990 vq = virtio_vector_next_queue(vq); 991 } 992 993 return 0; 994 995 undo: 996 vq = virtio_vector_first_queue(vdev, vector); 997 while (vq && unmasked >= 0) { 998 index = virtio_get_queue_index(vq); 999 if (index < proxy->nvqs_with_notifiers) { 1000 virtio_pci_vq_vector_mask(proxy, index, vector); 1001 --unmasked; 1002 } 1003 vq = virtio_vector_next_queue(vq); 1004 } 1005 return ret; 1006 } 1007 1008 static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector) 1009 { 1010 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 1011 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1012 VirtQueue *vq = virtio_vector_first_queue(vdev, vector); 1013 int index; 1014 1015 while (vq) { 1016 index = virtio_get_queue_index(vq); 1017 if (!virtio_queue_get_num(vdev, index)) { 1018 break; 1019 } 1020 if (index < proxy->nvqs_with_notifiers) { 1021 virtio_pci_vq_vector_mask(proxy, index, vector); 1022 } 1023 vq = virtio_vector_next_queue(vq); 1024 } 1025 } 1026 1027 static void virtio_pci_vector_poll(PCIDevice *dev, 1028 unsigned int vector_start, 1029 unsigned int vector_end) 1030 { 1031 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 1032 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1033 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 1034 int queue_no; 1035 unsigned int vector; 1036 EventNotifier *notifier; 1037 VirtQueue *vq; 1038 1039 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) { 1040 if (!virtio_queue_get_num(vdev, queue_no)) { 1041 break; 1042 } 1043 vector = virtio_queue_vector(vdev, queue_no); 1044 if (vector < vector_start || vector >= vector_end || 1045 !msix_is_masked(dev, vector)) { 1046 continue; 1047 } 1048 vq = virtio_get_queue(vdev, queue_no); 1049 notifier = virtio_queue_get_guest_notifier(vq); 1050 if (k->guest_notifier_pending) { 1051 if (k->guest_notifier_pending(vdev, queue_no)) { 1052 msix_set_pending(dev, vector); 1053 } 1054 } else if (event_notifier_test_and_clear(notifier)) { 1055 msix_set_pending(dev, vector); 1056 } 1057 } 1058 } 1059 1060 static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign, 1061 bool with_irqfd) 1062 { 1063 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1064 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1065 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev); 1066 VirtQueue *vq = virtio_get_queue(vdev, n); 1067 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq); 1068 1069 if (assign) { 1070 int r = event_notifier_init(notifier, 0); 1071 if (r < 0) { 1072 return r; 1073 } 1074 virtio_queue_set_guest_notifier_fd_handler(vq, true, with_irqfd); 1075 } else { 1076 virtio_queue_set_guest_notifier_fd_handler(vq, false, with_irqfd); 1077 event_notifier_cleanup(notifier); 1078 } 1079 1080 if (!msix_enabled(&proxy->pci_dev) && 1081 vdev->use_guest_notifier_mask && 1082 vdc->guest_notifier_mask) { 1083 vdc->guest_notifier_mask(vdev, n, !assign); 1084 } 1085 1086 return 0; 1087 } 1088 1089 static bool virtio_pci_query_guest_notifiers(DeviceState *d) 1090 { 1091 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1092 return msix_enabled(&proxy->pci_dev); 1093 } 1094 1095 static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign) 1096 { 1097 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1098 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1099 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 1100 int r, n; 1101 bool with_irqfd = msix_enabled(&proxy->pci_dev) && 1102 kvm_msi_via_irqfd_enabled(); 1103 1104 nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX); 1105 1106 /* 1107 * When deassigning, pass a consistent nvqs value to avoid leaking 1108 * notifiers. But first check we've actually been configured, exit 1109 * early if we haven't. 1110 */ 1111 if (!assign && !proxy->nvqs_with_notifiers) { 1112 return 0; 1113 } 1114 assert(assign || nvqs == proxy->nvqs_with_notifiers); 1115 1116 proxy->nvqs_with_notifiers = nvqs; 1117 1118 /* Must unset vector notifier while guest notifier is still assigned */ 1119 if ((proxy->vector_irqfd || k->guest_notifier_mask) && !assign) { 1120 msix_unset_vector_notifiers(&proxy->pci_dev); 1121 if (proxy->vector_irqfd) { 1122 kvm_virtio_pci_vector_release(proxy, nvqs); 1123 g_free(proxy->vector_irqfd); 1124 proxy->vector_irqfd = NULL; 1125 } 1126 } 1127 1128 for (n = 0; n < nvqs; n++) { 1129 if (!virtio_queue_get_num(vdev, n)) { 1130 break; 1131 } 1132 1133 r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd); 1134 if (r < 0) { 1135 goto assign_error; 1136 } 1137 } 1138 1139 /* Must set vector notifier after guest notifier has been assigned */ 1140 if ((with_irqfd || k->guest_notifier_mask) && assign) { 1141 if (with_irqfd) { 1142 proxy->vector_irqfd = 1143 g_malloc0(sizeof(*proxy->vector_irqfd) * 1144 msix_nr_vectors_allocated(&proxy->pci_dev)); 1145 r = kvm_virtio_pci_vector_use(proxy, nvqs); 1146 if (r < 0) { 1147 goto assign_error; 1148 } 1149 } 1150 r = msix_set_vector_notifiers(&proxy->pci_dev, 1151 virtio_pci_vector_unmask, 1152 virtio_pci_vector_mask, 1153 virtio_pci_vector_poll); 1154 if (r < 0) { 1155 goto notifiers_error; 1156 } 1157 } 1158 1159 return 0; 1160 1161 notifiers_error: 1162 if (with_irqfd) { 1163 assert(assign); 1164 kvm_virtio_pci_vector_release(proxy, nvqs); 1165 } 1166 1167 assign_error: 1168 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */ 1169 assert(assign); 1170 while (--n >= 0) { 1171 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd); 1172 } 1173 return r; 1174 } 1175 1176 static int virtio_pci_set_host_notifier_mr(DeviceState *d, int n, 1177 MemoryRegion *mr, bool assign) 1178 { 1179 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1180 int offset; 1181 1182 if (n >= VIRTIO_QUEUE_MAX || !virtio_pci_modern(proxy) || 1183 virtio_pci_queue_mem_mult(proxy) != memory_region_size(mr)) { 1184 return -1; 1185 } 1186 1187 if (assign) { 1188 offset = virtio_pci_queue_mem_mult(proxy) * n; 1189 memory_region_add_subregion_overlap(&proxy->notify.mr, offset, mr, 1); 1190 } else { 1191 memory_region_del_subregion(&proxy->notify.mr, mr); 1192 } 1193 1194 return 0; 1195 } 1196 1197 static void virtio_pci_vmstate_change(DeviceState *d, bool running) 1198 { 1199 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1200 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1201 1202 if (running) { 1203 /* Old QEMU versions did not set bus master enable on status write. 1204 * Detect DRIVER set and enable it. 1205 */ 1206 if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) && 1207 (vdev->status & VIRTIO_CONFIG_S_DRIVER) && 1208 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { 1209 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND, 1210 proxy->pci_dev.config[PCI_COMMAND] | 1211 PCI_COMMAND_MASTER, 1); 1212 } 1213 virtio_pci_start_ioeventfd(proxy); 1214 } else { 1215 virtio_pci_stop_ioeventfd(proxy); 1216 } 1217 } 1218 1219 /* 1220 * virtio-pci: This is the PCIDevice which has a virtio-pci-bus. 1221 */ 1222 1223 static int virtio_pci_query_nvectors(DeviceState *d) 1224 { 1225 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1226 1227 return proxy->nvectors; 1228 } 1229 1230 static AddressSpace *virtio_pci_get_dma_as(DeviceState *d) 1231 { 1232 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1233 PCIDevice *dev = &proxy->pci_dev; 1234 1235 return pci_get_address_space(dev); 1236 } 1237 1238 static bool virtio_pci_iommu_enabled(DeviceState *d) 1239 { 1240 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1241 PCIDevice *dev = &proxy->pci_dev; 1242 AddressSpace *dma_as = pci_device_iommu_address_space(dev); 1243 1244 if (dma_as == &address_space_memory) { 1245 return false; 1246 } 1247 1248 return true; 1249 } 1250 1251 static bool virtio_pci_queue_enabled(DeviceState *d, int n) 1252 { 1253 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1254 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1255 1256 if (virtio_vdev_has_feature(vdev, VIRTIO_F_VERSION_1)) { 1257 return proxy->vqs[n].enabled; 1258 } 1259 1260 return virtio_queue_enabled_legacy(vdev, n); 1261 } 1262 1263 static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy, 1264 struct virtio_pci_cap *cap) 1265 { 1266 PCIDevice *dev = &proxy->pci_dev; 1267 int offset; 1268 1269 offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0, 1270 cap->cap_len, &error_abort); 1271 1272 assert(cap->cap_len >= sizeof *cap); 1273 memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len, 1274 cap->cap_len - PCI_CAP_FLAGS); 1275 1276 return offset; 1277 } 1278 1279 static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, 1280 unsigned size) 1281 { 1282 VirtIOPCIProxy *proxy = opaque; 1283 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1284 uint32_t val = 0; 1285 int i; 1286 1287 if (vdev == NULL) { 1288 return UINT64_MAX; 1289 } 1290 1291 switch (addr) { 1292 case VIRTIO_PCI_COMMON_DFSELECT: 1293 val = proxy->dfselect; 1294 break; 1295 case VIRTIO_PCI_COMMON_DF: 1296 if (proxy->dfselect <= 1) { 1297 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev); 1298 1299 val = (vdev->host_features & ~vdc->legacy_features) >> 1300 (32 * proxy->dfselect); 1301 } 1302 break; 1303 case VIRTIO_PCI_COMMON_GFSELECT: 1304 val = proxy->gfselect; 1305 break; 1306 case VIRTIO_PCI_COMMON_GF: 1307 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) { 1308 val = proxy->guest_features[proxy->gfselect]; 1309 } 1310 break; 1311 case VIRTIO_PCI_COMMON_MSIX: 1312 val = vdev->config_vector; 1313 break; 1314 case VIRTIO_PCI_COMMON_NUMQ: 1315 for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) { 1316 if (virtio_queue_get_num(vdev, i)) { 1317 val = i + 1; 1318 } 1319 } 1320 break; 1321 case VIRTIO_PCI_COMMON_STATUS: 1322 val = vdev->status; 1323 break; 1324 case VIRTIO_PCI_COMMON_CFGGENERATION: 1325 val = vdev->generation; 1326 break; 1327 case VIRTIO_PCI_COMMON_Q_SELECT: 1328 val = vdev->queue_sel; 1329 break; 1330 case VIRTIO_PCI_COMMON_Q_SIZE: 1331 val = virtio_queue_get_num(vdev, vdev->queue_sel); 1332 break; 1333 case VIRTIO_PCI_COMMON_Q_MSIX: 1334 val = virtio_queue_vector(vdev, vdev->queue_sel); 1335 break; 1336 case VIRTIO_PCI_COMMON_Q_ENABLE: 1337 val = proxy->vqs[vdev->queue_sel].enabled; 1338 break; 1339 case VIRTIO_PCI_COMMON_Q_NOFF: 1340 /* Simply map queues in order */ 1341 val = vdev->queue_sel; 1342 break; 1343 case VIRTIO_PCI_COMMON_Q_DESCLO: 1344 val = proxy->vqs[vdev->queue_sel].desc[0]; 1345 break; 1346 case VIRTIO_PCI_COMMON_Q_DESCHI: 1347 val = proxy->vqs[vdev->queue_sel].desc[1]; 1348 break; 1349 case VIRTIO_PCI_COMMON_Q_AVAILLO: 1350 val = proxy->vqs[vdev->queue_sel].avail[0]; 1351 break; 1352 case VIRTIO_PCI_COMMON_Q_AVAILHI: 1353 val = proxy->vqs[vdev->queue_sel].avail[1]; 1354 break; 1355 case VIRTIO_PCI_COMMON_Q_USEDLO: 1356 val = proxy->vqs[vdev->queue_sel].used[0]; 1357 break; 1358 case VIRTIO_PCI_COMMON_Q_USEDHI: 1359 val = proxy->vqs[vdev->queue_sel].used[1]; 1360 break; 1361 case VIRTIO_PCI_COMMON_Q_RESET: 1362 val = proxy->vqs[vdev->queue_sel].reset; 1363 break; 1364 default: 1365 val = 0; 1366 } 1367 1368 return val; 1369 } 1370 1371 static void virtio_pci_common_write(void *opaque, hwaddr addr, 1372 uint64_t val, unsigned size) 1373 { 1374 VirtIOPCIProxy *proxy = opaque; 1375 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1376 uint16_t vector; 1377 1378 if (vdev == NULL) { 1379 return; 1380 } 1381 1382 switch (addr) { 1383 case VIRTIO_PCI_COMMON_DFSELECT: 1384 proxy->dfselect = val; 1385 break; 1386 case VIRTIO_PCI_COMMON_GFSELECT: 1387 proxy->gfselect = val; 1388 break; 1389 case VIRTIO_PCI_COMMON_GF: 1390 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) { 1391 proxy->guest_features[proxy->gfselect] = val; 1392 virtio_set_features(vdev, 1393 (((uint64_t)proxy->guest_features[1]) << 32) | 1394 proxy->guest_features[0]); 1395 } 1396 break; 1397 case VIRTIO_PCI_COMMON_MSIX: 1398 if (vdev->config_vector != VIRTIO_NO_VECTOR) { 1399 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector); 1400 } 1401 /* Make it possible for guest to discover an error took place. */ 1402 if (val < proxy->nvectors) { 1403 msix_vector_use(&proxy->pci_dev, val); 1404 } else { 1405 val = VIRTIO_NO_VECTOR; 1406 } 1407 vdev->config_vector = val; 1408 break; 1409 case VIRTIO_PCI_COMMON_STATUS: 1410 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) { 1411 virtio_pci_stop_ioeventfd(proxy); 1412 } 1413 1414 virtio_set_status(vdev, val & 0xFF); 1415 1416 if (val & VIRTIO_CONFIG_S_DRIVER_OK) { 1417 virtio_pci_start_ioeventfd(proxy); 1418 } 1419 1420 if (vdev->status == 0) { 1421 virtio_pci_reset(DEVICE(proxy)); 1422 } 1423 1424 break; 1425 case VIRTIO_PCI_COMMON_Q_SELECT: 1426 if (val < VIRTIO_QUEUE_MAX) { 1427 vdev->queue_sel = val; 1428 } 1429 break; 1430 case VIRTIO_PCI_COMMON_Q_SIZE: 1431 proxy->vqs[vdev->queue_sel].num = val; 1432 virtio_queue_set_num(vdev, vdev->queue_sel, 1433 proxy->vqs[vdev->queue_sel].num); 1434 break; 1435 case VIRTIO_PCI_COMMON_Q_MSIX: 1436 vector = virtio_queue_vector(vdev, vdev->queue_sel); 1437 if (vector != VIRTIO_NO_VECTOR) { 1438 msix_vector_unuse(&proxy->pci_dev, vector); 1439 } 1440 /* Make it possible for guest to discover an error took place. */ 1441 if (val < proxy->nvectors) { 1442 msix_vector_use(&proxy->pci_dev, val); 1443 } else { 1444 val = VIRTIO_NO_VECTOR; 1445 } 1446 virtio_queue_set_vector(vdev, vdev->queue_sel, val); 1447 break; 1448 case VIRTIO_PCI_COMMON_Q_ENABLE: 1449 if (val == 1) { 1450 virtio_queue_set_num(vdev, vdev->queue_sel, 1451 proxy->vqs[vdev->queue_sel].num); 1452 virtio_queue_set_rings(vdev, vdev->queue_sel, 1453 ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 | 1454 proxy->vqs[vdev->queue_sel].desc[0], 1455 ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 | 1456 proxy->vqs[vdev->queue_sel].avail[0], 1457 ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 | 1458 proxy->vqs[vdev->queue_sel].used[0]); 1459 proxy->vqs[vdev->queue_sel].enabled = 1; 1460 proxy->vqs[vdev->queue_sel].reset = 0; 1461 virtio_queue_enable(vdev, vdev->queue_sel); 1462 } else { 1463 virtio_error(vdev, "wrong value for queue_enable %"PRIx64, val); 1464 } 1465 break; 1466 case VIRTIO_PCI_COMMON_Q_DESCLO: 1467 proxy->vqs[vdev->queue_sel].desc[0] = val; 1468 break; 1469 case VIRTIO_PCI_COMMON_Q_DESCHI: 1470 proxy->vqs[vdev->queue_sel].desc[1] = val; 1471 break; 1472 case VIRTIO_PCI_COMMON_Q_AVAILLO: 1473 proxy->vqs[vdev->queue_sel].avail[0] = val; 1474 break; 1475 case VIRTIO_PCI_COMMON_Q_AVAILHI: 1476 proxy->vqs[vdev->queue_sel].avail[1] = val; 1477 break; 1478 case VIRTIO_PCI_COMMON_Q_USEDLO: 1479 proxy->vqs[vdev->queue_sel].used[0] = val; 1480 break; 1481 case VIRTIO_PCI_COMMON_Q_USEDHI: 1482 proxy->vqs[vdev->queue_sel].used[1] = val; 1483 break; 1484 case VIRTIO_PCI_COMMON_Q_RESET: 1485 if (val == 1) { 1486 proxy->vqs[vdev->queue_sel].reset = 1; 1487 1488 virtio_queue_reset(vdev, vdev->queue_sel); 1489 1490 proxy->vqs[vdev->queue_sel].reset = 0; 1491 proxy->vqs[vdev->queue_sel].enabled = 0; 1492 } 1493 break; 1494 default: 1495 break; 1496 } 1497 } 1498 1499 1500 static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr, 1501 unsigned size) 1502 { 1503 VirtIOPCIProxy *proxy = opaque; 1504 if (virtio_bus_get_device(&proxy->bus) == NULL) { 1505 return UINT64_MAX; 1506 } 1507 1508 return 0; 1509 } 1510 1511 static void virtio_pci_notify_write(void *opaque, hwaddr addr, 1512 uint64_t val, unsigned size) 1513 { 1514 VirtIOPCIProxy *proxy = opaque; 1515 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1516 1517 unsigned queue = addr / virtio_pci_queue_mem_mult(proxy); 1518 1519 if (vdev != NULL && queue < VIRTIO_QUEUE_MAX) { 1520 trace_virtio_pci_notify_write(addr, val, size); 1521 virtio_queue_notify(vdev, queue); 1522 } 1523 } 1524 1525 static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr, 1526 uint64_t val, unsigned size) 1527 { 1528 VirtIOPCIProxy *proxy = opaque; 1529 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1530 1531 unsigned queue = val; 1532 1533 if (vdev != NULL && queue < VIRTIO_QUEUE_MAX) { 1534 trace_virtio_pci_notify_write_pio(addr, val, size); 1535 virtio_queue_notify(vdev, queue); 1536 } 1537 } 1538 1539 static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr, 1540 unsigned size) 1541 { 1542 VirtIOPCIProxy *proxy = opaque; 1543 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1544 uint64_t val; 1545 1546 if (vdev == NULL) { 1547 return UINT64_MAX; 1548 } 1549 1550 val = qatomic_xchg(&vdev->isr, 0); 1551 pci_irq_deassert(&proxy->pci_dev); 1552 return val; 1553 } 1554 1555 static void virtio_pci_isr_write(void *opaque, hwaddr addr, 1556 uint64_t val, unsigned size) 1557 { 1558 } 1559 1560 static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr, 1561 unsigned size) 1562 { 1563 VirtIOPCIProxy *proxy = opaque; 1564 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1565 uint64_t val; 1566 1567 if (vdev == NULL) { 1568 return UINT64_MAX; 1569 } 1570 1571 switch (size) { 1572 case 1: 1573 val = virtio_config_modern_readb(vdev, addr); 1574 break; 1575 case 2: 1576 val = virtio_config_modern_readw(vdev, addr); 1577 break; 1578 case 4: 1579 val = virtio_config_modern_readl(vdev, addr); 1580 break; 1581 default: 1582 val = 0; 1583 break; 1584 } 1585 return val; 1586 } 1587 1588 static void virtio_pci_device_write(void *opaque, hwaddr addr, 1589 uint64_t val, unsigned size) 1590 { 1591 VirtIOPCIProxy *proxy = opaque; 1592 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1593 1594 if (vdev == NULL) { 1595 return; 1596 } 1597 1598 switch (size) { 1599 case 1: 1600 virtio_config_modern_writeb(vdev, addr, val); 1601 break; 1602 case 2: 1603 virtio_config_modern_writew(vdev, addr, val); 1604 break; 1605 case 4: 1606 virtio_config_modern_writel(vdev, addr, val); 1607 break; 1608 } 1609 } 1610 1611 static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy, 1612 const char *vdev_name) 1613 { 1614 static const MemoryRegionOps common_ops = { 1615 .read = virtio_pci_common_read, 1616 .write = virtio_pci_common_write, 1617 .impl = { 1618 .min_access_size = 1, 1619 .max_access_size = 4, 1620 }, 1621 .endianness = DEVICE_LITTLE_ENDIAN, 1622 }; 1623 static const MemoryRegionOps isr_ops = { 1624 .read = virtio_pci_isr_read, 1625 .write = virtio_pci_isr_write, 1626 .impl = { 1627 .min_access_size = 1, 1628 .max_access_size = 4, 1629 }, 1630 .endianness = DEVICE_LITTLE_ENDIAN, 1631 }; 1632 static const MemoryRegionOps device_ops = { 1633 .read = virtio_pci_device_read, 1634 .write = virtio_pci_device_write, 1635 .impl = { 1636 .min_access_size = 1, 1637 .max_access_size = 4, 1638 }, 1639 .endianness = DEVICE_LITTLE_ENDIAN, 1640 }; 1641 static const MemoryRegionOps notify_ops = { 1642 .read = virtio_pci_notify_read, 1643 .write = virtio_pci_notify_write, 1644 .impl = { 1645 .min_access_size = 1, 1646 .max_access_size = 4, 1647 }, 1648 .endianness = DEVICE_LITTLE_ENDIAN, 1649 }; 1650 static const MemoryRegionOps notify_pio_ops = { 1651 .read = virtio_pci_notify_read, 1652 .write = virtio_pci_notify_write_pio, 1653 .impl = { 1654 .min_access_size = 1, 1655 .max_access_size = 4, 1656 }, 1657 .endianness = DEVICE_LITTLE_ENDIAN, 1658 }; 1659 g_autoptr(GString) name = g_string_new(NULL); 1660 1661 g_string_printf(name, "virtio-pci-common-%s", vdev_name); 1662 memory_region_init_io(&proxy->common.mr, OBJECT(proxy), 1663 &common_ops, 1664 proxy, 1665 name->str, 1666 proxy->common.size); 1667 1668 g_string_printf(name, "virtio-pci-isr-%s", vdev_name); 1669 memory_region_init_io(&proxy->isr.mr, OBJECT(proxy), 1670 &isr_ops, 1671 proxy, 1672 name->str, 1673 proxy->isr.size); 1674 1675 g_string_printf(name, "virtio-pci-device-%s", vdev_name); 1676 memory_region_init_io(&proxy->device.mr, OBJECT(proxy), 1677 &device_ops, 1678 proxy, 1679 name->str, 1680 proxy->device.size); 1681 1682 g_string_printf(name, "virtio-pci-notify-%s", vdev_name); 1683 memory_region_init_io(&proxy->notify.mr, OBJECT(proxy), 1684 ¬ify_ops, 1685 proxy, 1686 name->str, 1687 proxy->notify.size); 1688 1689 g_string_printf(name, "virtio-pci-notify-pio-%s", vdev_name); 1690 memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy), 1691 ¬ify_pio_ops, 1692 proxy, 1693 name->str, 1694 proxy->notify_pio.size); 1695 } 1696 1697 static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy, 1698 VirtIOPCIRegion *region, 1699 struct virtio_pci_cap *cap, 1700 MemoryRegion *mr, 1701 uint8_t bar) 1702 { 1703 memory_region_add_subregion(mr, region->offset, ®ion->mr); 1704 1705 cap->cfg_type = region->type; 1706 cap->bar = bar; 1707 cap->offset = cpu_to_le32(region->offset); 1708 cap->length = cpu_to_le32(region->size); 1709 virtio_pci_add_mem_cap(proxy, cap); 1710 1711 } 1712 1713 static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy, 1714 VirtIOPCIRegion *region, 1715 struct virtio_pci_cap *cap) 1716 { 1717 virtio_pci_modern_region_map(proxy, region, cap, 1718 &proxy->modern_bar, proxy->modern_mem_bar_idx); 1719 } 1720 1721 static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy, 1722 VirtIOPCIRegion *region, 1723 struct virtio_pci_cap *cap) 1724 { 1725 virtio_pci_modern_region_map(proxy, region, cap, 1726 &proxy->io_bar, proxy->modern_io_bar_idx); 1727 } 1728 1729 static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy, 1730 VirtIOPCIRegion *region) 1731 { 1732 memory_region_del_subregion(&proxy->modern_bar, 1733 ®ion->mr); 1734 } 1735 1736 static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy, 1737 VirtIOPCIRegion *region) 1738 { 1739 memory_region_del_subregion(&proxy->io_bar, 1740 ®ion->mr); 1741 } 1742 1743 static void virtio_pci_pre_plugged(DeviceState *d, Error **errp) 1744 { 1745 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1746 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1747 1748 if (virtio_pci_modern(proxy)) { 1749 virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1); 1750 } 1751 1752 virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE); 1753 } 1754 1755 /* This is called by virtio-bus just after the device is plugged. */ 1756 static void virtio_pci_device_plugged(DeviceState *d, Error **errp) 1757 { 1758 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1759 VirtioBusState *bus = &proxy->bus; 1760 bool legacy = virtio_pci_legacy(proxy); 1761 bool modern; 1762 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 1763 uint8_t *config; 1764 uint32_t size; 1765 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1766 1767 /* 1768 * Virtio capabilities present without 1769 * VIRTIO_F_VERSION_1 confuses guests 1770 */ 1771 if (!proxy->ignore_backend_features && 1772 !virtio_has_feature(vdev->host_features, VIRTIO_F_VERSION_1)) { 1773 virtio_pci_disable_modern(proxy); 1774 1775 if (!legacy) { 1776 error_setg(errp, "Device doesn't support modern mode, and legacy" 1777 " mode is disabled"); 1778 error_append_hint(errp, "Set disable-legacy to off\n"); 1779 1780 return; 1781 } 1782 } 1783 1784 modern = virtio_pci_modern(proxy); 1785 1786 config = proxy->pci_dev.config; 1787 if (proxy->class_code) { 1788 pci_config_set_class(config, proxy->class_code); 1789 } 1790 1791 if (legacy) { 1792 if (!virtio_legacy_allowed(vdev)) { 1793 /* 1794 * To avoid migration issues, we allow legacy mode when legacy 1795 * check is disabled in the old machine types (< 5.1). 1796 */ 1797 if (virtio_legacy_check_disabled(vdev)) { 1798 warn_report("device is modern-only, but for backward " 1799 "compatibility legacy is allowed"); 1800 } else { 1801 error_setg(errp, 1802 "device is modern-only, use disable-legacy=on"); 1803 return; 1804 } 1805 } 1806 if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM)) { 1807 error_setg(errp, "VIRTIO_F_IOMMU_PLATFORM was supported by" 1808 " neither legacy nor transitional device"); 1809 return; 1810 } 1811 /* 1812 * Legacy and transitional devices use specific subsystem IDs. 1813 * Note that the subsystem vendor ID (config + PCI_SUBSYSTEM_VENDOR_ID) 1814 * is set to PCI_SUBVENDOR_ID_REDHAT_QUMRANET by default. 1815 */ 1816 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus)); 1817 if (proxy->trans_devid) { 1818 pci_config_set_device_id(config, proxy->trans_devid); 1819 } 1820 } else { 1821 /* pure virtio-1.0 */ 1822 pci_set_word(config + PCI_VENDOR_ID, 1823 PCI_VENDOR_ID_REDHAT_QUMRANET); 1824 pci_set_word(config + PCI_DEVICE_ID, 1825 PCI_DEVICE_ID_VIRTIO_10_BASE + virtio_bus_get_vdev_id(bus)); 1826 pci_config_set_revision(config, 1); 1827 } 1828 config[PCI_INTERRUPT_PIN] = 1; 1829 1830 1831 if (modern) { 1832 struct virtio_pci_cap cap = { 1833 .cap_len = sizeof cap, 1834 }; 1835 struct virtio_pci_notify_cap notify = { 1836 .cap.cap_len = sizeof notify, 1837 .notify_off_multiplier = 1838 cpu_to_le32(virtio_pci_queue_mem_mult(proxy)), 1839 }; 1840 struct virtio_pci_cfg_cap cfg = { 1841 .cap.cap_len = sizeof cfg, 1842 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG, 1843 }; 1844 struct virtio_pci_notify_cap notify_pio = { 1845 .cap.cap_len = sizeof notify, 1846 .notify_off_multiplier = cpu_to_le32(0x0), 1847 }; 1848 1849 struct virtio_pci_cfg_cap *cfg_mask; 1850 1851 virtio_pci_modern_regions_init(proxy, vdev->name); 1852 1853 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap); 1854 virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap); 1855 virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap); 1856 virtio_pci_modern_mem_region_map(proxy, &proxy->notify, ¬ify.cap); 1857 1858 if (modern_pio) { 1859 memory_region_init(&proxy->io_bar, OBJECT(proxy), 1860 "virtio-pci-io", 0x4); 1861 1862 pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar_idx, 1863 PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar); 1864 1865 virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio, 1866 ¬ify_pio.cap); 1867 } 1868 1869 pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar_idx, 1870 PCI_BASE_ADDRESS_SPACE_MEMORY | 1871 PCI_BASE_ADDRESS_MEM_PREFETCH | 1872 PCI_BASE_ADDRESS_MEM_TYPE_64, 1873 &proxy->modern_bar); 1874 1875 proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap); 1876 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap); 1877 pci_set_byte(&cfg_mask->cap.bar, ~0x0); 1878 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0); 1879 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0); 1880 pci_set_long(cfg_mask->pci_cfg_data, ~0x0); 1881 } 1882 1883 if (proxy->nvectors) { 1884 int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors, 1885 proxy->msix_bar_idx, NULL); 1886 if (err) { 1887 /* Notice when a system that supports MSIx can't initialize it */ 1888 if (err != -ENOTSUP) { 1889 warn_report("unable to init msix vectors to %" PRIu32, 1890 proxy->nvectors); 1891 } 1892 proxy->nvectors = 0; 1893 } 1894 } 1895 1896 proxy->pci_dev.config_write = virtio_write_config; 1897 proxy->pci_dev.config_read = virtio_read_config; 1898 1899 if (legacy) { 1900 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) 1901 + virtio_bus_get_vdev_config_len(bus); 1902 size = pow2ceil(size); 1903 1904 memory_region_init_io(&proxy->bar, OBJECT(proxy), 1905 &virtio_pci_config_ops, 1906 proxy, "virtio-pci", size); 1907 1908 pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar_idx, 1909 PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar); 1910 } 1911 } 1912 1913 static void virtio_pci_device_unplugged(DeviceState *d) 1914 { 1915 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1916 bool modern = virtio_pci_modern(proxy); 1917 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 1918 1919 virtio_pci_stop_ioeventfd(proxy); 1920 1921 if (modern) { 1922 virtio_pci_modern_mem_region_unmap(proxy, &proxy->common); 1923 virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr); 1924 virtio_pci_modern_mem_region_unmap(proxy, &proxy->device); 1925 virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify); 1926 if (modern_pio) { 1927 virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio); 1928 } 1929 } 1930 } 1931 1932 static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) 1933 { 1934 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 1935 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev); 1936 bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) && 1937 !pci_bus_is_root(pci_get_bus(pci_dev)); 1938 1939 if (kvm_enabled() && !kvm_has_many_ioeventfds()) { 1940 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD; 1941 } 1942 1943 /* fd-based ioevents can't be synchronized in record/replay */ 1944 if (replay_mode != REPLAY_MODE_NONE) { 1945 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD; 1946 } 1947 1948 /* 1949 * virtio pci bar layout used by default. 1950 * subclasses can re-arrange things if needed. 1951 * 1952 * region 0 -- virtio legacy io bar 1953 * region 1 -- msi-x bar 1954 * region 2 -- virtio modern io bar (off by default) 1955 * region 4+5 -- virtio modern memory (64bit) bar 1956 * 1957 */ 1958 proxy->legacy_io_bar_idx = 0; 1959 proxy->msix_bar_idx = 1; 1960 proxy->modern_io_bar_idx = 2; 1961 proxy->modern_mem_bar_idx = 4; 1962 1963 proxy->common.offset = 0x0; 1964 proxy->common.size = 0x1000; 1965 proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG; 1966 1967 proxy->isr.offset = 0x1000; 1968 proxy->isr.size = 0x1000; 1969 proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG; 1970 1971 proxy->device.offset = 0x2000; 1972 proxy->device.size = 0x1000; 1973 proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG; 1974 1975 proxy->notify.offset = 0x3000; 1976 proxy->notify.size = virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE_MAX; 1977 proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG; 1978 1979 proxy->notify_pio.offset = 0x0; 1980 proxy->notify_pio.size = 0x4; 1981 proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG; 1982 1983 /* subclasses can enforce modern, so do this unconditionally */ 1984 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci", 1985 /* PCI BAR regions must be powers of 2 */ 1986 pow2ceil(proxy->notify.offset + proxy->notify.size)); 1987 1988 if (proxy->disable_legacy == ON_OFF_AUTO_AUTO) { 1989 proxy->disable_legacy = pcie_port ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; 1990 } 1991 1992 if (!virtio_pci_modern(proxy) && !virtio_pci_legacy(proxy)) { 1993 error_setg(errp, "device cannot work as neither modern nor legacy mode" 1994 " is enabled"); 1995 error_append_hint(errp, "Set either disable-modern or disable-legacy" 1996 " to off\n"); 1997 return; 1998 } 1999 2000 if (pcie_port && pci_is_express(pci_dev)) { 2001 int pos; 2002 uint16_t last_pcie_cap_offset = PCI_CONFIG_SPACE_SIZE; 2003 2004 pos = pcie_endpoint_cap_init(pci_dev, 0); 2005 assert(pos > 0); 2006 2007 pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, 2008 PCI_PM_SIZEOF, errp); 2009 if (pos < 0) { 2010 return; 2011 } 2012 2013 pci_dev->exp.pm_cap = pos; 2014 2015 /* 2016 * Indicates that this function complies with revision 1.2 of the 2017 * PCI Power Management Interface Specification. 2018 */ 2019 pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3); 2020 2021 if (proxy->flags & VIRTIO_PCI_FLAG_AER) { 2022 pcie_aer_init(pci_dev, PCI_ERR_VER, last_pcie_cap_offset, 2023 PCI_ERR_SIZEOF, NULL); 2024 last_pcie_cap_offset += PCI_ERR_SIZEOF; 2025 } 2026 2027 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) { 2028 /* Init error enabling flags */ 2029 pcie_cap_deverr_init(pci_dev); 2030 } 2031 2032 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_LNKCTL) { 2033 /* Init Link Control Register */ 2034 pcie_cap_lnkctl_init(pci_dev); 2035 } 2036 2037 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) { 2038 /* Init Power Management Control Register */ 2039 pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL, 2040 PCI_PM_CTRL_STATE_MASK); 2041 } 2042 2043 if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { 2044 pcie_ats_init(pci_dev, last_pcie_cap_offset, 2045 proxy->flags & VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED); 2046 last_pcie_cap_offset += PCI_EXT_CAP_ATS_SIZEOF; 2047 } 2048 2049 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) { 2050 /* Set Function Level Reset capability bit */ 2051 pcie_cap_flr_init(pci_dev); 2052 } 2053 } else { 2054 /* 2055 * make future invocations of pci_is_express() return false 2056 * and pci_config_size() return PCI_CONFIG_SPACE_SIZE. 2057 */ 2058 pci_dev->cap_present &= ~QEMU_PCI_CAP_EXPRESS; 2059 } 2060 2061 virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy); 2062 if (k->realize) { 2063 k->realize(proxy, errp); 2064 } 2065 } 2066 2067 static void virtio_pci_exit(PCIDevice *pci_dev) 2068 { 2069 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 2070 bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) && 2071 !pci_bus_is_root(pci_get_bus(pci_dev)); 2072 2073 msix_uninit_exclusive_bar(pci_dev); 2074 if (proxy->flags & VIRTIO_PCI_FLAG_AER && pcie_port && 2075 pci_is_express(pci_dev)) { 2076 pcie_aer_exit(pci_dev); 2077 } 2078 } 2079 2080 static void virtio_pci_reset(DeviceState *qdev) 2081 { 2082 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); 2083 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus); 2084 int i; 2085 2086 virtio_bus_reset(bus); 2087 msix_unuse_all_vectors(&proxy->pci_dev); 2088 2089 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { 2090 proxy->vqs[i].enabled = 0; 2091 proxy->vqs[i].reset = 0; 2092 proxy->vqs[i].num = 0; 2093 proxy->vqs[i].desc[0] = proxy->vqs[i].desc[1] = 0; 2094 proxy->vqs[i].avail[0] = proxy->vqs[i].avail[1] = 0; 2095 proxy->vqs[i].used[0] = proxy->vqs[i].used[1] = 0; 2096 } 2097 } 2098 2099 static void virtio_pci_bus_reset_hold(Object *obj) 2100 { 2101 PCIDevice *dev = PCI_DEVICE(obj); 2102 DeviceState *qdev = DEVICE(obj); 2103 2104 virtio_pci_reset(qdev); 2105 2106 if (pci_is_express(dev)) { 2107 pcie_cap_deverr_reset(dev); 2108 pcie_cap_lnkctl_reset(dev); 2109 2110 pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0); 2111 } 2112 } 2113 2114 static Property virtio_pci_properties[] = { 2115 DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags, 2116 VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false), 2117 DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags, 2118 VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true), 2119 DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags, 2120 VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false), 2121 DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags, 2122 VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false), 2123 DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags, 2124 VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false), 2125 DEFINE_PROP_BOOL("x-ignore-backend-features", VirtIOPCIProxy, 2126 ignore_backend_features, false), 2127 DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags, 2128 VIRTIO_PCI_FLAG_ATS_BIT, false), 2129 DEFINE_PROP_BIT("x-ats-page-aligned", VirtIOPCIProxy, flags, 2130 VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT, true), 2131 DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags, 2132 VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true), 2133 DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags, 2134 VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true), 2135 DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags, 2136 VIRTIO_PCI_FLAG_INIT_PM_BIT, true), 2137 DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags, 2138 VIRTIO_PCI_FLAG_INIT_FLR_BIT, true), 2139 DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags, 2140 VIRTIO_PCI_FLAG_AER_BIT, false), 2141 DEFINE_PROP_END_OF_LIST(), 2142 }; 2143 2144 static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp) 2145 { 2146 VirtioPCIClass *vpciklass = VIRTIO_PCI_GET_CLASS(qdev); 2147 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); 2148 PCIDevice *pci_dev = &proxy->pci_dev; 2149 2150 if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) && 2151 virtio_pci_modern(proxy)) { 2152 pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; 2153 } 2154 2155 vpciklass->parent_dc_realize(qdev, errp); 2156 } 2157 2158 static void virtio_pci_class_init(ObjectClass *klass, void *data) 2159 { 2160 DeviceClass *dc = DEVICE_CLASS(klass); 2161 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 2162 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass); 2163 ResettableClass *rc = RESETTABLE_CLASS(klass); 2164 2165 device_class_set_props(dc, virtio_pci_properties); 2166 k->realize = virtio_pci_realize; 2167 k->exit = virtio_pci_exit; 2168 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 2169 k->revision = VIRTIO_PCI_ABI_VERSION; 2170 k->class_id = PCI_CLASS_OTHERS; 2171 device_class_set_parent_realize(dc, virtio_pci_dc_realize, 2172 &vpciklass->parent_dc_realize); 2173 rc->phases.hold = virtio_pci_bus_reset_hold; 2174 } 2175 2176 static const TypeInfo virtio_pci_info = { 2177 .name = TYPE_VIRTIO_PCI, 2178 .parent = TYPE_PCI_DEVICE, 2179 .instance_size = sizeof(VirtIOPCIProxy), 2180 .class_init = virtio_pci_class_init, 2181 .class_size = sizeof(VirtioPCIClass), 2182 .abstract = true, 2183 }; 2184 2185 static Property virtio_pci_generic_properties[] = { 2186 DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy, 2187 ON_OFF_AUTO_AUTO), 2188 DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false), 2189 DEFINE_PROP_END_OF_LIST(), 2190 }; 2191 2192 static void virtio_pci_base_class_init(ObjectClass *klass, void *data) 2193 { 2194 const VirtioPCIDeviceTypeInfo *t = data; 2195 if (t->class_init) { 2196 t->class_init(klass, NULL); 2197 } 2198 } 2199 2200 static void virtio_pci_generic_class_init(ObjectClass *klass, void *data) 2201 { 2202 DeviceClass *dc = DEVICE_CLASS(klass); 2203 2204 device_class_set_props(dc, virtio_pci_generic_properties); 2205 } 2206 2207 static void virtio_pci_transitional_instance_init(Object *obj) 2208 { 2209 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj); 2210 2211 proxy->disable_legacy = ON_OFF_AUTO_OFF; 2212 proxy->disable_modern = false; 2213 } 2214 2215 static void virtio_pci_non_transitional_instance_init(Object *obj) 2216 { 2217 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj); 2218 2219 proxy->disable_legacy = ON_OFF_AUTO_ON; 2220 proxy->disable_modern = false; 2221 } 2222 2223 void virtio_pci_types_register(const VirtioPCIDeviceTypeInfo *t) 2224 { 2225 char *base_name = NULL; 2226 TypeInfo base_type_info = { 2227 .name = t->base_name, 2228 .parent = t->parent ? t->parent : TYPE_VIRTIO_PCI, 2229 .instance_size = t->instance_size, 2230 .instance_init = t->instance_init, 2231 .class_size = t->class_size, 2232 .abstract = true, 2233 .interfaces = t->interfaces, 2234 }; 2235 TypeInfo generic_type_info = { 2236 .name = t->generic_name, 2237 .parent = base_type_info.name, 2238 .class_init = virtio_pci_generic_class_init, 2239 .interfaces = (InterfaceInfo[]) { 2240 { INTERFACE_PCIE_DEVICE }, 2241 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 2242 { } 2243 }, 2244 }; 2245 2246 if (!base_type_info.name) { 2247 /* No base type -> register a single generic device type */ 2248 /* use intermediate %s-base-type to add generic device props */ 2249 base_name = g_strdup_printf("%s-base-type", t->generic_name); 2250 base_type_info.name = base_name; 2251 base_type_info.class_init = virtio_pci_generic_class_init; 2252 2253 generic_type_info.parent = base_name; 2254 generic_type_info.class_init = virtio_pci_base_class_init; 2255 generic_type_info.class_data = (void *)t; 2256 2257 assert(!t->non_transitional_name); 2258 assert(!t->transitional_name); 2259 } else { 2260 base_type_info.class_init = virtio_pci_base_class_init; 2261 base_type_info.class_data = (void *)t; 2262 } 2263 2264 type_register(&base_type_info); 2265 if (generic_type_info.name) { 2266 type_register(&generic_type_info); 2267 } 2268 2269 if (t->non_transitional_name) { 2270 const TypeInfo non_transitional_type_info = { 2271 .name = t->non_transitional_name, 2272 .parent = base_type_info.name, 2273 .instance_init = virtio_pci_non_transitional_instance_init, 2274 .interfaces = (InterfaceInfo[]) { 2275 { INTERFACE_PCIE_DEVICE }, 2276 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 2277 { } 2278 }, 2279 }; 2280 type_register(&non_transitional_type_info); 2281 } 2282 2283 if (t->transitional_name) { 2284 const TypeInfo transitional_type_info = { 2285 .name = t->transitional_name, 2286 .parent = base_type_info.name, 2287 .instance_init = virtio_pci_transitional_instance_init, 2288 .interfaces = (InterfaceInfo[]) { 2289 /* 2290 * Transitional virtio devices work only as Conventional PCI 2291 * devices because they require PIO ports. 2292 */ 2293 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 2294 { } 2295 }, 2296 }; 2297 type_register(&transitional_type_info); 2298 } 2299 g_free(base_name); 2300 } 2301 2302 unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues) 2303 { 2304 /* 2305 * 1:1 vq to vCPU mapping is ideal because the same vCPU that submitted 2306 * virtqueue buffers can handle their completion. When a different vCPU 2307 * handles completion it may need to IPI the vCPU that submitted the 2308 * request and this adds overhead. 2309 * 2310 * Virtqueues consume guest RAM and MSI-X vectors. This is wasteful in 2311 * guests with very many vCPUs and a device that is only used by a few 2312 * vCPUs. Unfortunately optimizing that case requires manual pinning inside 2313 * the guest, so those users might as well manually set the number of 2314 * queues. There is no upper limit that can be applied automatically and 2315 * doing so arbitrarily would result in a sudden performance drop once the 2316 * threshold number of vCPUs is exceeded. 2317 */ 2318 unsigned num_queues = current_machine->smp.cpus; 2319 2320 /* 2321 * The maximum number of MSI-X vectors is PCI_MSIX_FLAGS_QSIZE + 1, but the 2322 * config change interrupt and the fixed virtqueues must be taken into 2323 * account too. 2324 */ 2325 num_queues = MIN(num_queues, PCI_MSIX_FLAGS_QSIZE - fixed_queues); 2326 2327 /* 2328 * There is a limit to how many virtqueues a device can have. 2329 */ 2330 return MIN(num_queues, VIRTIO_QUEUE_MAX - fixed_queues); 2331 } 2332 2333 /* virtio-pci-bus */ 2334 2335 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size, 2336 VirtIOPCIProxy *dev) 2337 { 2338 DeviceState *qdev = DEVICE(dev); 2339 char virtio_bus_name[] = "virtio-bus"; 2340 2341 qbus_init(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev, virtio_bus_name); 2342 } 2343 2344 static void virtio_pci_bus_class_init(ObjectClass *klass, void *data) 2345 { 2346 BusClass *bus_class = BUS_CLASS(klass); 2347 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass); 2348 bus_class->max_dev = 1; 2349 k->notify = virtio_pci_notify; 2350 k->save_config = virtio_pci_save_config; 2351 k->load_config = virtio_pci_load_config; 2352 k->save_queue = virtio_pci_save_queue; 2353 k->load_queue = virtio_pci_load_queue; 2354 k->save_extra_state = virtio_pci_save_extra_state; 2355 k->load_extra_state = virtio_pci_load_extra_state; 2356 k->has_extra_state = virtio_pci_has_extra_state; 2357 k->query_guest_notifiers = virtio_pci_query_guest_notifiers; 2358 k->set_guest_notifiers = virtio_pci_set_guest_notifiers; 2359 k->set_host_notifier_mr = virtio_pci_set_host_notifier_mr; 2360 k->vmstate_change = virtio_pci_vmstate_change; 2361 k->pre_plugged = virtio_pci_pre_plugged; 2362 k->device_plugged = virtio_pci_device_plugged; 2363 k->device_unplugged = virtio_pci_device_unplugged; 2364 k->query_nvectors = virtio_pci_query_nvectors; 2365 k->ioeventfd_enabled = virtio_pci_ioeventfd_enabled; 2366 k->ioeventfd_assign = virtio_pci_ioeventfd_assign; 2367 k->get_dma_as = virtio_pci_get_dma_as; 2368 k->iommu_enabled = virtio_pci_iommu_enabled; 2369 k->queue_enabled = virtio_pci_queue_enabled; 2370 } 2371 2372 static const TypeInfo virtio_pci_bus_info = { 2373 .name = TYPE_VIRTIO_PCI_BUS, 2374 .parent = TYPE_VIRTIO_BUS, 2375 .instance_size = sizeof(VirtioPCIBusState), 2376 .class_size = sizeof(VirtioPCIBusClass), 2377 .class_init = virtio_pci_bus_class_init, 2378 }; 2379 2380 static void virtio_pci_register_types(void) 2381 { 2382 /* Base types: */ 2383 type_register_static(&virtio_pci_bus_info); 2384 type_register_static(&virtio_pci_info); 2385 } 2386 2387 type_init(virtio_pci_register_types) 2388 2389