1 /* 2 * Virtio PCI Bindings 3 * 4 * Copyright IBM, Corp. 2007 5 * Copyright (c) 2009 CodeSourcery 6 * 7 * Authors: 8 * Anthony Liguori <aliguori@us.ibm.com> 9 * Paul Brook <paul@codesourcery.com> 10 * 11 * This work is licensed under the terms of the GNU GPL, version 2. See 12 * the COPYING file in the top-level directory. 13 * 14 * Contributions after 2012-01-13 are licensed under the terms of the 15 * GNU GPL, version 2 or (at your option) any later version. 16 */ 17 18 #include "qemu/osdep.h" 19 20 #include "exec/memop.h" 21 #include "standard-headers/linux/virtio_pci.h" 22 #include "hw/virtio/virtio.h" 23 #include "migration/qemu-file-types.h" 24 #include "hw/pci/pci.h" 25 #include "hw/pci/pci_bus.h" 26 #include "hw/qdev-properties.h" 27 #include "qapi/error.h" 28 #include "qemu/error-report.h" 29 #include "qemu/module.h" 30 #include "hw/pci/msi.h" 31 #include "hw/pci/msix.h" 32 #include "hw/loader.h" 33 #include "sysemu/kvm.h" 34 #include "virtio-pci.h" 35 #include "qemu/range.h" 36 #include "hw/virtio/virtio-bus.h" 37 #include "qapi/visitor.h" 38 39 #define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev)) 40 41 #undef VIRTIO_PCI_CONFIG 42 43 /* The remaining space is defined by each driver as the per-driver 44 * configuration space */ 45 #define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev)) 46 47 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size, 48 VirtIOPCIProxy *dev); 49 static void virtio_pci_reset(DeviceState *qdev); 50 51 /* virtio device */ 52 /* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */ 53 static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d) 54 { 55 return container_of(d, VirtIOPCIProxy, pci_dev.qdev); 56 } 57 58 /* DeviceState to VirtIOPCIProxy. Note: used on datapath, 59 * be careful and test performance if you change this. 60 */ 61 static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d) 62 { 63 return container_of(d, VirtIOPCIProxy, pci_dev.qdev); 64 } 65 66 static void virtio_pci_notify(DeviceState *d, uint16_t vector) 67 { 68 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d); 69 70 if (msix_enabled(&proxy->pci_dev)) 71 msix_notify(&proxy->pci_dev, vector); 72 else { 73 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 74 pci_set_irq(&proxy->pci_dev, atomic_read(&vdev->isr) & 1); 75 } 76 } 77 78 static void virtio_pci_save_config(DeviceState *d, QEMUFile *f) 79 { 80 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 81 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 82 83 pci_device_save(&proxy->pci_dev, f); 84 msix_save(&proxy->pci_dev, f); 85 if (msix_present(&proxy->pci_dev)) 86 qemu_put_be16(f, vdev->config_vector); 87 } 88 89 static const VMStateDescription vmstate_virtio_pci_modern_queue_state = { 90 .name = "virtio_pci/modern_queue_state", 91 .version_id = 1, 92 .minimum_version_id = 1, 93 .fields = (VMStateField[]) { 94 VMSTATE_UINT16(num, VirtIOPCIQueue), 95 VMSTATE_UNUSED(1), /* enabled was stored as be16 */ 96 VMSTATE_BOOL(enabled, VirtIOPCIQueue), 97 VMSTATE_UINT32_ARRAY(desc, VirtIOPCIQueue, 2), 98 VMSTATE_UINT32_ARRAY(avail, VirtIOPCIQueue, 2), 99 VMSTATE_UINT32_ARRAY(used, VirtIOPCIQueue, 2), 100 VMSTATE_END_OF_LIST() 101 } 102 }; 103 104 static bool virtio_pci_modern_state_needed(void *opaque) 105 { 106 VirtIOPCIProxy *proxy = opaque; 107 108 return virtio_pci_modern(proxy); 109 } 110 111 static const VMStateDescription vmstate_virtio_pci_modern_state_sub = { 112 .name = "virtio_pci/modern_state", 113 .version_id = 1, 114 .minimum_version_id = 1, 115 .needed = &virtio_pci_modern_state_needed, 116 .fields = (VMStateField[]) { 117 VMSTATE_UINT32(dfselect, VirtIOPCIProxy), 118 VMSTATE_UINT32(gfselect, VirtIOPCIProxy), 119 VMSTATE_UINT32_ARRAY(guest_features, VirtIOPCIProxy, 2), 120 VMSTATE_STRUCT_ARRAY(vqs, VirtIOPCIProxy, VIRTIO_QUEUE_MAX, 0, 121 vmstate_virtio_pci_modern_queue_state, 122 VirtIOPCIQueue), 123 VMSTATE_END_OF_LIST() 124 } 125 }; 126 127 static const VMStateDescription vmstate_virtio_pci = { 128 .name = "virtio_pci", 129 .version_id = 1, 130 .minimum_version_id = 1, 131 .minimum_version_id_old = 1, 132 .fields = (VMStateField[]) { 133 VMSTATE_END_OF_LIST() 134 }, 135 .subsections = (const VMStateDescription*[]) { 136 &vmstate_virtio_pci_modern_state_sub, 137 NULL 138 } 139 }; 140 141 static bool virtio_pci_has_extra_state(DeviceState *d) 142 { 143 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 144 145 return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA; 146 } 147 148 static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f) 149 { 150 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 151 152 vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL); 153 } 154 155 static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f) 156 { 157 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 158 159 return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1); 160 } 161 162 static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f) 163 { 164 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 165 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 166 167 if (msix_present(&proxy->pci_dev)) 168 qemu_put_be16(f, virtio_queue_vector(vdev, n)); 169 } 170 171 static int virtio_pci_load_config(DeviceState *d, QEMUFile *f) 172 { 173 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 174 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 175 176 int ret; 177 ret = pci_device_load(&proxy->pci_dev, f); 178 if (ret) { 179 return ret; 180 } 181 msix_unuse_all_vectors(&proxy->pci_dev); 182 msix_load(&proxy->pci_dev, f); 183 if (msix_present(&proxy->pci_dev)) { 184 qemu_get_be16s(f, &vdev->config_vector); 185 } else { 186 vdev->config_vector = VIRTIO_NO_VECTOR; 187 } 188 if (vdev->config_vector != VIRTIO_NO_VECTOR) { 189 return msix_vector_use(&proxy->pci_dev, vdev->config_vector); 190 } 191 return 0; 192 } 193 194 static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f) 195 { 196 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 197 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 198 199 uint16_t vector; 200 if (msix_present(&proxy->pci_dev)) { 201 qemu_get_be16s(f, &vector); 202 } else { 203 vector = VIRTIO_NO_VECTOR; 204 } 205 virtio_queue_set_vector(vdev, n, vector); 206 if (vector != VIRTIO_NO_VECTOR) { 207 return msix_vector_use(&proxy->pci_dev, vector); 208 } 209 210 return 0; 211 } 212 213 static bool virtio_pci_ioeventfd_enabled(DeviceState *d) 214 { 215 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 216 217 return (proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD) != 0; 218 } 219 220 #define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000 221 222 static inline int virtio_pci_queue_mem_mult(struct VirtIOPCIProxy *proxy) 223 { 224 return (proxy->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ) ? 225 QEMU_VIRTIO_PCI_QUEUE_MEM_MULT : 4; 226 } 227 228 static int virtio_pci_ioeventfd_assign(DeviceState *d, EventNotifier *notifier, 229 int n, bool assign) 230 { 231 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 232 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 233 VirtQueue *vq = virtio_get_queue(vdev, n); 234 bool legacy = virtio_pci_legacy(proxy); 235 bool modern = virtio_pci_modern(proxy); 236 bool fast_mmio = kvm_ioeventfd_any_length_enabled(); 237 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 238 MemoryRegion *modern_mr = &proxy->notify.mr; 239 MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr; 240 MemoryRegion *legacy_mr = &proxy->bar; 241 hwaddr modern_addr = virtio_pci_queue_mem_mult(proxy) * 242 virtio_get_queue_index(vq); 243 hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY; 244 245 if (assign) { 246 if (modern) { 247 if (fast_mmio) { 248 memory_region_add_eventfd(modern_mr, modern_addr, 0, 249 false, n, notifier); 250 } else { 251 memory_region_add_eventfd(modern_mr, modern_addr, 2, 252 false, n, notifier); 253 } 254 if (modern_pio) { 255 memory_region_add_eventfd(modern_notify_mr, 0, 2, 256 true, n, notifier); 257 } 258 } 259 if (legacy) { 260 memory_region_add_eventfd(legacy_mr, legacy_addr, 2, 261 true, n, notifier); 262 } 263 } else { 264 if (modern) { 265 if (fast_mmio) { 266 memory_region_del_eventfd(modern_mr, modern_addr, 0, 267 false, n, notifier); 268 } else { 269 memory_region_del_eventfd(modern_mr, modern_addr, 2, 270 false, n, notifier); 271 } 272 if (modern_pio) { 273 memory_region_del_eventfd(modern_notify_mr, 0, 2, 274 true, n, notifier); 275 } 276 } 277 if (legacy) { 278 memory_region_del_eventfd(legacy_mr, legacy_addr, 2, 279 true, n, notifier); 280 } 281 } 282 return 0; 283 } 284 285 static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy) 286 { 287 virtio_bus_start_ioeventfd(&proxy->bus); 288 } 289 290 static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy) 291 { 292 virtio_bus_stop_ioeventfd(&proxy->bus); 293 } 294 295 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val) 296 { 297 VirtIOPCIProxy *proxy = opaque; 298 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 299 hwaddr pa; 300 301 switch (addr) { 302 case VIRTIO_PCI_GUEST_FEATURES: 303 /* Guest does not negotiate properly? We have to assume nothing. */ 304 if (val & (1 << VIRTIO_F_BAD_FEATURE)) { 305 val = virtio_bus_get_vdev_bad_features(&proxy->bus); 306 } 307 virtio_set_features(vdev, val); 308 break; 309 case VIRTIO_PCI_QUEUE_PFN: 310 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT; 311 if (pa == 0) { 312 virtio_pci_reset(DEVICE(proxy)); 313 } 314 else 315 virtio_queue_set_addr(vdev, vdev->queue_sel, pa); 316 break; 317 case VIRTIO_PCI_QUEUE_SEL: 318 if (val < VIRTIO_QUEUE_MAX) 319 vdev->queue_sel = val; 320 break; 321 case VIRTIO_PCI_QUEUE_NOTIFY: 322 if (val < VIRTIO_QUEUE_MAX) { 323 virtio_queue_notify(vdev, val); 324 } 325 break; 326 case VIRTIO_PCI_STATUS: 327 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) { 328 virtio_pci_stop_ioeventfd(proxy); 329 } 330 331 virtio_set_status(vdev, val & 0xFF); 332 333 if (val & VIRTIO_CONFIG_S_DRIVER_OK) { 334 virtio_pci_start_ioeventfd(proxy); 335 } 336 337 if (vdev->status == 0) { 338 virtio_pci_reset(DEVICE(proxy)); 339 } 340 341 /* Linux before 2.6.34 drives the device without enabling 342 the PCI device bus master bit. Enable it automatically 343 for the guest. This is a PCI spec violation but so is 344 initiating DMA with bus master bit clear. */ 345 if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) { 346 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND, 347 proxy->pci_dev.config[PCI_COMMAND] | 348 PCI_COMMAND_MASTER, 1); 349 } 350 break; 351 case VIRTIO_MSI_CONFIG_VECTOR: 352 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector); 353 /* Make it possible for guest to discover an error took place. */ 354 if (msix_vector_use(&proxy->pci_dev, val) < 0) 355 val = VIRTIO_NO_VECTOR; 356 vdev->config_vector = val; 357 break; 358 case VIRTIO_MSI_QUEUE_VECTOR: 359 msix_vector_unuse(&proxy->pci_dev, 360 virtio_queue_vector(vdev, vdev->queue_sel)); 361 /* Make it possible for guest to discover an error took place. */ 362 if (msix_vector_use(&proxy->pci_dev, val) < 0) 363 val = VIRTIO_NO_VECTOR; 364 virtio_queue_set_vector(vdev, vdev->queue_sel, val); 365 break; 366 default: 367 error_report("%s: unexpected address 0x%x value 0x%x", 368 __func__, addr, val); 369 break; 370 } 371 } 372 373 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr) 374 { 375 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 376 uint32_t ret = 0xFFFFFFFF; 377 378 switch (addr) { 379 case VIRTIO_PCI_HOST_FEATURES: 380 ret = vdev->host_features; 381 break; 382 case VIRTIO_PCI_GUEST_FEATURES: 383 ret = vdev->guest_features; 384 break; 385 case VIRTIO_PCI_QUEUE_PFN: 386 ret = virtio_queue_get_addr(vdev, vdev->queue_sel) 387 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT; 388 break; 389 case VIRTIO_PCI_QUEUE_NUM: 390 ret = virtio_queue_get_num(vdev, vdev->queue_sel); 391 break; 392 case VIRTIO_PCI_QUEUE_SEL: 393 ret = vdev->queue_sel; 394 break; 395 case VIRTIO_PCI_STATUS: 396 ret = vdev->status; 397 break; 398 case VIRTIO_PCI_ISR: 399 /* reading from the ISR also clears it. */ 400 ret = atomic_xchg(&vdev->isr, 0); 401 pci_irq_deassert(&proxy->pci_dev); 402 break; 403 case VIRTIO_MSI_CONFIG_VECTOR: 404 ret = vdev->config_vector; 405 break; 406 case VIRTIO_MSI_QUEUE_VECTOR: 407 ret = virtio_queue_vector(vdev, vdev->queue_sel); 408 break; 409 default: 410 break; 411 } 412 413 return ret; 414 } 415 416 static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr, 417 unsigned size) 418 { 419 VirtIOPCIProxy *proxy = opaque; 420 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 421 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev); 422 uint64_t val = 0; 423 if (addr < config) { 424 return virtio_ioport_read(proxy, addr); 425 } 426 addr -= config; 427 428 switch (size) { 429 case 1: 430 val = virtio_config_readb(vdev, addr); 431 break; 432 case 2: 433 val = virtio_config_readw(vdev, addr); 434 if (virtio_is_big_endian(vdev)) { 435 val = bswap16(val); 436 } 437 break; 438 case 4: 439 val = virtio_config_readl(vdev, addr); 440 if (virtio_is_big_endian(vdev)) { 441 val = bswap32(val); 442 } 443 break; 444 } 445 return val; 446 } 447 448 static void virtio_pci_config_write(void *opaque, hwaddr addr, 449 uint64_t val, unsigned size) 450 { 451 VirtIOPCIProxy *proxy = opaque; 452 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev); 453 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 454 if (addr < config) { 455 virtio_ioport_write(proxy, addr, val); 456 return; 457 } 458 addr -= config; 459 /* 460 * Virtio-PCI is odd. Ioports are LE but config space is target native 461 * endian. 462 */ 463 switch (size) { 464 case 1: 465 virtio_config_writeb(vdev, addr, val); 466 break; 467 case 2: 468 if (virtio_is_big_endian(vdev)) { 469 val = bswap16(val); 470 } 471 virtio_config_writew(vdev, addr, val); 472 break; 473 case 4: 474 if (virtio_is_big_endian(vdev)) { 475 val = bswap32(val); 476 } 477 virtio_config_writel(vdev, addr, val); 478 break; 479 } 480 } 481 482 static const MemoryRegionOps virtio_pci_config_ops = { 483 .read = virtio_pci_config_read, 484 .write = virtio_pci_config_write, 485 .impl = { 486 .min_access_size = 1, 487 .max_access_size = 4, 488 }, 489 .endianness = DEVICE_LITTLE_ENDIAN, 490 }; 491 492 static MemoryRegion *virtio_address_space_lookup(VirtIOPCIProxy *proxy, 493 hwaddr *off, int len) 494 { 495 int i; 496 VirtIOPCIRegion *reg; 497 498 for (i = 0; i < ARRAY_SIZE(proxy->regs); ++i) { 499 reg = &proxy->regs[i]; 500 if (*off >= reg->offset && 501 *off + len <= reg->offset + reg->size) { 502 *off -= reg->offset; 503 return ®->mr; 504 } 505 } 506 507 return NULL; 508 } 509 510 /* Below are generic functions to do memcpy from/to an address space, 511 * without byteswaps, with input validation. 512 * 513 * As regular address_space_* APIs all do some kind of byteswap at least for 514 * some host/target combinations, we are forced to explicitly convert to a 515 * known-endianness integer value. 516 * It doesn't really matter which endian format to go through, so the code 517 * below selects the endian that causes the least amount of work on the given 518 * host. 519 * 520 * Note: host pointer must be aligned. 521 */ 522 static 523 void virtio_address_space_write(VirtIOPCIProxy *proxy, hwaddr addr, 524 const uint8_t *buf, int len) 525 { 526 uint64_t val; 527 MemoryRegion *mr; 528 529 /* address_space_* APIs assume an aligned address. 530 * As address is under guest control, handle illegal values. 531 */ 532 addr &= ~(len - 1); 533 534 mr = virtio_address_space_lookup(proxy, &addr, len); 535 if (!mr) { 536 return; 537 } 538 539 /* Make sure caller aligned buf properly */ 540 assert(!(((uintptr_t)buf) & (len - 1))); 541 542 switch (len) { 543 case 1: 544 val = pci_get_byte(buf); 545 break; 546 case 2: 547 val = pci_get_word(buf); 548 break; 549 case 4: 550 val = pci_get_long(buf); 551 break; 552 default: 553 /* As length is under guest control, handle illegal values. */ 554 return; 555 } 556 memory_region_dispatch_write(mr, addr, val, size_memop(len) | MO_LE, 557 MEMTXATTRS_UNSPECIFIED); 558 } 559 560 static void 561 virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr, 562 uint8_t *buf, int len) 563 { 564 uint64_t val; 565 MemoryRegion *mr; 566 567 /* address_space_* APIs assume an aligned address. 568 * As address is under guest control, handle illegal values. 569 */ 570 addr &= ~(len - 1); 571 572 mr = virtio_address_space_lookup(proxy, &addr, len); 573 if (!mr) { 574 return; 575 } 576 577 /* Make sure caller aligned buf properly */ 578 assert(!(((uintptr_t)buf) & (len - 1))); 579 580 memory_region_dispatch_read(mr, addr, &val, size_memop(len) | MO_LE, 581 MEMTXATTRS_UNSPECIFIED); 582 switch (len) { 583 case 1: 584 pci_set_byte(buf, val); 585 break; 586 case 2: 587 pci_set_word(buf, val); 588 break; 589 case 4: 590 pci_set_long(buf, val); 591 break; 592 default: 593 /* As length is under guest control, handle illegal values. */ 594 break; 595 } 596 } 597 598 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address, 599 uint32_t val, int len) 600 { 601 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 602 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 603 struct virtio_pci_cfg_cap *cfg; 604 605 pci_default_write_config(pci_dev, address, val, len); 606 607 if (range_covers_byte(address, len, PCI_COMMAND) && 608 !(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { 609 virtio_pci_stop_ioeventfd(proxy); 610 virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK); 611 } 612 613 if (proxy->config_cap && 614 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap, 615 pci_cfg_data), 616 sizeof cfg->pci_cfg_data)) { 617 uint32_t off; 618 uint32_t len; 619 620 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap); 621 off = le32_to_cpu(cfg->cap.offset); 622 len = le32_to_cpu(cfg->cap.length); 623 624 if (len == 1 || len == 2 || len == 4) { 625 assert(len <= sizeof cfg->pci_cfg_data); 626 virtio_address_space_write(proxy, off, cfg->pci_cfg_data, len); 627 } 628 } 629 } 630 631 static uint32_t virtio_read_config(PCIDevice *pci_dev, 632 uint32_t address, int len) 633 { 634 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 635 struct virtio_pci_cfg_cap *cfg; 636 637 if (proxy->config_cap && 638 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap, 639 pci_cfg_data), 640 sizeof cfg->pci_cfg_data)) { 641 uint32_t off; 642 uint32_t len; 643 644 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap); 645 off = le32_to_cpu(cfg->cap.offset); 646 len = le32_to_cpu(cfg->cap.length); 647 648 if (len == 1 || len == 2 || len == 4) { 649 assert(len <= sizeof cfg->pci_cfg_data); 650 virtio_address_space_read(proxy, off, cfg->pci_cfg_data, len); 651 } 652 } 653 654 return pci_default_read_config(pci_dev, address, len); 655 } 656 657 static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy, 658 unsigned int queue_no, 659 unsigned int vector) 660 { 661 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 662 int ret; 663 664 if (irqfd->users == 0) { 665 ret = kvm_irqchip_add_msi_route(kvm_state, vector, &proxy->pci_dev); 666 if (ret < 0) { 667 return ret; 668 } 669 irqfd->virq = ret; 670 } 671 irqfd->users++; 672 return 0; 673 } 674 675 static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy, 676 unsigned int vector) 677 { 678 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 679 if (--irqfd->users == 0) { 680 kvm_irqchip_release_virq(kvm_state, irqfd->virq); 681 } 682 } 683 684 static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy, 685 unsigned int queue_no, 686 unsigned int vector) 687 { 688 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 689 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 690 VirtQueue *vq = virtio_get_queue(vdev, queue_no); 691 EventNotifier *n = virtio_queue_get_guest_notifier(vq); 692 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq); 693 } 694 695 static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy, 696 unsigned int queue_no, 697 unsigned int vector) 698 { 699 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 700 VirtQueue *vq = virtio_get_queue(vdev, queue_no); 701 EventNotifier *n = virtio_queue_get_guest_notifier(vq); 702 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 703 int ret; 704 705 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq); 706 assert(ret == 0); 707 } 708 709 static int kvm_virtio_pci_vector_use(VirtIOPCIProxy *proxy, int nvqs) 710 { 711 PCIDevice *dev = &proxy->pci_dev; 712 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 713 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 714 unsigned int vector; 715 int ret, queue_no; 716 717 for (queue_no = 0; queue_no < nvqs; queue_no++) { 718 if (!virtio_queue_get_num(vdev, queue_no)) { 719 break; 720 } 721 vector = virtio_queue_vector(vdev, queue_no); 722 if (vector >= msix_nr_vectors_allocated(dev)) { 723 continue; 724 } 725 ret = kvm_virtio_pci_vq_vector_use(proxy, queue_no, vector); 726 if (ret < 0) { 727 goto undo; 728 } 729 /* If guest supports masking, set up irqfd now. 730 * Otherwise, delay until unmasked in the frontend. 731 */ 732 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 733 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector); 734 if (ret < 0) { 735 kvm_virtio_pci_vq_vector_release(proxy, vector); 736 goto undo; 737 } 738 } 739 } 740 return 0; 741 742 undo: 743 while (--queue_no >= 0) { 744 vector = virtio_queue_vector(vdev, queue_no); 745 if (vector >= msix_nr_vectors_allocated(dev)) { 746 continue; 747 } 748 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 749 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); 750 } 751 kvm_virtio_pci_vq_vector_release(proxy, vector); 752 } 753 return ret; 754 } 755 756 static void kvm_virtio_pci_vector_release(VirtIOPCIProxy *proxy, int nvqs) 757 { 758 PCIDevice *dev = &proxy->pci_dev; 759 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 760 unsigned int vector; 761 int queue_no; 762 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 763 764 for (queue_no = 0; queue_no < nvqs; queue_no++) { 765 if (!virtio_queue_get_num(vdev, queue_no)) { 766 break; 767 } 768 vector = virtio_queue_vector(vdev, queue_no); 769 if (vector >= msix_nr_vectors_allocated(dev)) { 770 continue; 771 } 772 /* If guest supports masking, clean up irqfd now. 773 * Otherwise, it was cleaned when masked in the frontend. 774 */ 775 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 776 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); 777 } 778 kvm_virtio_pci_vq_vector_release(proxy, vector); 779 } 780 } 781 782 static int virtio_pci_vq_vector_unmask(VirtIOPCIProxy *proxy, 783 unsigned int queue_no, 784 unsigned int vector, 785 MSIMessage msg) 786 { 787 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 788 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 789 VirtQueue *vq = virtio_get_queue(vdev, queue_no); 790 EventNotifier *n = virtio_queue_get_guest_notifier(vq); 791 VirtIOIRQFD *irqfd; 792 int ret = 0; 793 794 if (proxy->vector_irqfd) { 795 irqfd = &proxy->vector_irqfd[vector]; 796 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) { 797 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg, 798 &proxy->pci_dev); 799 if (ret < 0) { 800 return ret; 801 } 802 kvm_irqchip_commit_routes(kvm_state); 803 } 804 } 805 806 /* If guest supports masking, irqfd is already setup, unmask it. 807 * Otherwise, set it up now. 808 */ 809 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 810 k->guest_notifier_mask(vdev, queue_no, false); 811 /* Test after unmasking to avoid losing events. */ 812 if (k->guest_notifier_pending && 813 k->guest_notifier_pending(vdev, queue_no)) { 814 event_notifier_set(n); 815 } 816 } else { 817 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector); 818 } 819 return ret; 820 } 821 822 static void virtio_pci_vq_vector_mask(VirtIOPCIProxy *proxy, 823 unsigned int queue_no, 824 unsigned int vector) 825 { 826 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 827 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 828 829 /* If guest supports masking, keep irqfd but mask it. 830 * Otherwise, clean it up now. 831 */ 832 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 833 k->guest_notifier_mask(vdev, queue_no, true); 834 } else { 835 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); 836 } 837 } 838 839 static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector, 840 MSIMessage msg) 841 { 842 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 843 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 844 VirtQueue *vq = virtio_vector_first_queue(vdev, vector); 845 int ret, index, unmasked = 0; 846 847 while (vq) { 848 index = virtio_get_queue_index(vq); 849 if (!virtio_queue_get_num(vdev, index)) { 850 break; 851 } 852 if (index < proxy->nvqs_with_notifiers) { 853 ret = virtio_pci_vq_vector_unmask(proxy, index, vector, msg); 854 if (ret < 0) { 855 goto undo; 856 } 857 ++unmasked; 858 } 859 vq = virtio_vector_next_queue(vq); 860 } 861 862 return 0; 863 864 undo: 865 vq = virtio_vector_first_queue(vdev, vector); 866 while (vq && unmasked >= 0) { 867 index = virtio_get_queue_index(vq); 868 if (index < proxy->nvqs_with_notifiers) { 869 virtio_pci_vq_vector_mask(proxy, index, vector); 870 --unmasked; 871 } 872 vq = virtio_vector_next_queue(vq); 873 } 874 return ret; 875 } 876 877 static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector) 878 { 879 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 880 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 881 VirtQueue *vq = virtio_vector_first_queue(vdev, vector); 882 int index; 883 884 while (vq) { 885 index = virtio_get_queue_index(vq); 886 if (!virtio_queue_get_num(vdev, index)) { 887 break; 888 } 889 if (index < proxy->nvqs_with_notifiers) { 890 virtio_pci_vq_vector_mask(proxy, index, vector); 891 } 892 vq = virtio_vector_next_queue(vq); 893 } 894 } 895 896 static void virtio_pci_vector_poll(PCIDevice *dev, 897 unsigned int vector_start, 898 unsigned int vector_end) 899 { 900 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 901 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 902 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 903 int queue_no; 904 unsigned int vector; 905 EventNotifier *notifier; 906 VirtQueue *vq; 907 908 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) { 909 if (!virtio_queue_get_num(vdev, queue_no)) { 910 break; 911 } 912 vector = virtio_queue_vector(vdev, queue_no); 913 if (vector < vector_start || vector >= vector_end || 914 !msix_is_masked(dev, vector)) { 915 continue; 916 } 917 vq = virtio_get_queue(vdev, queue_no); 918 notifier = virtio_queue_get_guest_notifier(vq); 919 if (k->guest_notifier_pending) { 920 if (k->guest_notifier_pending(vdev, queue_no)) { 921 msix_set_pending(dev, vector); 922 } 923 } else if (event_notifier_test_and_clear(notifier)) { 924 msix_set_pending(dev, vector); 925 } 926 } 927 } 928 929 static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign, 930 bool with_irqfd) 931 { 932 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 933 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 934 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev); 935 VirtQueue *vq = virtio_get_queue(vdev, n); 936 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq); 937 938 if (assign) { 939 int r = event_notifier_init(notifier, 0); 940 if (r < 0) { 941 return r; 942 } 943 virtio_queue_set_guest_notifier_fd_handler(vq, true, with_irqfd); 944 } else { 945 virtio_queue_set_guest_notifier_fd_handler(vq, false, with_irqfd); 946 event_notifier_cleanup(notifier); 947 } 948 949 if (!msix_enabled(&proxy->pci_dev) && 950 vdev->use_guest_notifier_mask && 951 vdc->guest_notifier_mask) { 952 vdc->guest_notifier_mask(vdev, n, !assign); 953 } 954 955 return 0; 956 } 957 958 static bool virtio_pci_query_guest_notifiers(DeviceState *d) 959 { 960 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 961 return msix_enabled(&proxy->pci_dev); 962 } 963 964 static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign) 965 { 966 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 967 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 968 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 969 int r, n; 970 bool with_irqfd = msix_enabled(&proxy->pci_dev) && 971 kvm_msi_via_irqfd_enabled(); 972 973 nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX); 974 975 /* When deassigning, pass a consistent nvqs value 976 * to avoid leaking notifiers. 977 */ 978 assert(assign || nvqs == proxy->nvqs_with_notifiers); 979 980 proxy->nvqs_with_notifiers = nvqs; 981 982 /* Must unset vector notifier while guest notifier is still assigned */ 983 if ((proxy->vector_irqfd || k->guest_notifier_mask) && !assign) { 984 msix_unset_vector_notifiers(&proxy->pci_dev); 985 if (proxy->vector_irqfd) { 986 kvm_virtio_pci_vector_release(proxy, nvqs); 987 g_free(proxy->vector_irqfd); 988 proxy->vector_irqfd = NULL; 989 } 990 } 991 992 for (n = 0; n < nvqs; n++) { 993 if (!virtio_queue_get_num(vdev, n)) { 994 break; 995 } 996 997 r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd); 998 if (r < 0) { 999 goto assign_error; 1000 } 1001 } 1002 1003 /* Must set vector notifier after guest notifier has been assigned */ 1004 if ((with_irqfd || k->guest_notifier_mask) && assign) { 1005 if (with_irqfd) { 1006 proxy->vector_irqfd = 1007 g_malloc0(sizeof(*proxy->vector_irqfd) * 1008 msix_nr_vectors_allocated(&proxy->pci_dev)); 1009 r = kvm_virtio_pci_vector_use(proxy, nvqs); 1010 if (r < 0) { 1011 goto assign_error; 1012 } 1013 } 1014 r = msix_set_vector_notifiers(&proxy->pci_dev, 1015 virtio_pci_vector_unmask, 1016 virtio_pci_vector_mask, 1017 virtio_pci_vector_poll); 1018 if (r < 0) { 1019 goto notifiers_error; 1020 } 1021 } 1022 1023 return 0; 1024 1025 notifiers_error: 1026 if (with_irqfd) { 1027 assert(assign); 1028 kvm_virtio_pci_vector_release(proxy, nvqs); 1029 } 1030 1031 assign_error: 1032 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */ 1033 assert(assign); 1034 while (--n >= 0) { 1035 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd); 1036 } 1037 return r; 1038 } 1039 1040 static int virtio_pci_set_host_notifier_mr(DeviceState *d, int n, 1041 MemoryRegion *mr, bool assign) 1042 { 1043 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1044 int offset; 1045 1046 if (n >= VIRTIO_QUEUE_MAX || !virtio_pci_modern(proxy) || 1047 virtio_pci_queue_mem_mult(proxy) != memory_region_size(mr)) { 1048 return -1; 1049 } 1050 1051 if (assign) { 1052 offset = virtio_pci_queue_mem_mult(proxy) * n; 1053 memory_region_add_subregion_overlap(&proxy->notify.mr, offset, mr, 1); 1054 } else { 1055 memory_region_del_subregion(&proxy->notify.mr, mr); 1056 } 1057 1058 return 0; 1059 } 1060 1061 static void virtio_pci_vmstate_change(DeviceState *d, bool running) 1062 { 1063 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1064 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1065 1066 if (running) { 1067 /* Old QEMU versions did not set bus master enable on status write. 1068 * Detect DRIVER set and enable it. 1069 */ 1070 if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) && 1071 (vdev->status & VIRTIO_CONFIG_S_DRIVER) && 1072 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { 1073 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND, 1074 proxy->pci_dev.config[PCI_COMMAND] | 1075 PCI_COMMAND_MASTER, 1); 1076 } 1077 virtio_pci_start_ioeventfd(proxy); 1078 } else { 1079 virtio_pci_stop_ioeventfd(proxy); 1080 } 1081 } 1082 1083 /* 1084 * virtio-pci: This is the PCIDevice which has a virtio-pci-bus. 1085 */ 1086 1087 static int virtio_pci_query_nvectors(DeviceState *d) 1088 { 1089 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1090 1091 return proxy->nvectors; 1092 } 1093 1094 static AddressSpace *virtio_pci_get_dma_as(DeviceState *d) 1095 { 1096 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1097 PCIDevice *dev = &proxy->pci_dev; 1098 1099 return pci_get_address_space(dev); 1100 } 1101 1102 static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy, 1103 struct virtio_pci_cap *cap) 1104 { 1105 PCIDevice *dev = &proxy->pci_dev; 1106 int offset; 1107 1108 offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0, 1109 cap->cap_len, &error_abort); 1110 1111 assert(cap->cap_len >= sizeof *cap); 1112 memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len, 1113 cap->cap_len - PCI_CAP_FLAGS); 1114 1115 return offset; 1116 } 1117 1118 static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, 1119 unsigned size) 1120 { 1121 VirtIOPCIProxy *proxy = opaque; 1122 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1123 uint32_t val = 0; 1124 int i; 1125 1126 switch (addr) { 1127 case VIRTIO_PCI_COMMON_DFSELECT: 1128 val = proxy->dfselect; 1129 break; 1130 case VIRTIO_PCI_COMMON_DF: 1131 if (proxy->dfselect <= 1) { 1132 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev); 1133 1134 val = (vdev->host_features & ~vdc->legacy_features) >> 1135 (32 * proxy->dfselect); 1136 } 1137 break; 1138 case VIRTIO_PCI_COMMON_GFSELECT: 1139 val = proxy->gfselect; 1140 break; 1141 case VIRTIO_PCI_COMMON_GF: 1142 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) { 1143 val = proxy->guest_features[proxy->gfselect]; 1144 } 1145 break; 1146 case VIRTIO_PCI_COMMON_MSIX: 1147 val = vdev->config_vector; 1148 break; 1149 case VIRTIO_PCI_COMMON_NUMQ: 1150 for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) { 1151 if (virtio_queue_get_num(vdev, i)) { 1152 val = i + 1; 1153 } 1154 } 1155 break; 1156 case VIRTIO_PCI_COMMON_STATUS: 1157 val = vdev->status; 1158 break; 1159 case VIRTIO_PCI_COMMON_CFGGENERATION: 1160 val = vdev->generation; 1161 break; 1162 case VIRTIO_PCI_COMMON_Q_SELECT: 1163 val = vdev->queue_sel; 1164 break; 1165 case VIRTIO_PCI_COMMON_Q_SIZE: 1166 val = virtio_queue_get_num(vdev, vdev->queue_sel); 1167 break; 1168 case VIRTIO_PCI_COMMON_Q_MSIX: 1169 val = virtio_queue_vector(vdev, vdev->queue_sel); 1170 break; 1171 case VIRTIO_PCI_COMMON_Q_ENABLE: 1172 val = proxy->vqs[vdev->queue_sel].enabled; 1173 break; 1174 case VIRTIO_PCI_COMMON_Q_NOFF: 1175 /* Simply map queues in order */ 1176 val = vdev->queue_sel; 1177 break; 1178 case VIRTIO_PCI_COMMON_Q_DESCLO: 1179 val = proxy->vqs[vdev->queue_sel].desc[0]; 1180 break; 1181 case VIRTIO_PCI_COMMON_Q_DESCHI: 1182 val = proxy->vqs[vdev->queue_sel].desc[1]; 1183 break; 1184 case VIRTIO_PCI_COMMON_Q_AVAILLO: 1185 val = proxy->vqs[vdev->queue_sel].avail[0]; 1186 break; 1187 case VIRTIO_PCI_COMMON_Q_AVAILHI: 1188 val = proxy->vqs[vdev->queue_sel].avail[1]; 1189 break; 1190 case VIRTIO_PCI_COMMON_Q_USEDLO: 1191 val = proxy->vqs[vdev->queue_sel].used[0]; 1192 break; 1193 case VIRTIO_PCI_COMMON_Q_USEDHI: 1194 val = proxy->vqs[vdev->queue_sel].used[1]; 1195 break; 1196 default: 1197 val = 0; 1198 } 1199 1200 return val; 1201 } 1202 1203 static void virtio_pci_common_write(void *opaque, hwaddr addr, 1204 uint64_t val, unsigned size) 1205 { 1206 VirtIOPCIProxy *proxy = opaque; 1207 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1208 1209 switch (addr) { 1210 case VIRTIO_PCI_COMMON_DFSELECT: 1211 proxy->dfselect = val; 1212 break; 1213 case VIRTIO_PCI_COMMON_GFSELECT: 1214 proxy->gfselect = val; 1215 break; 1216 case VIRTIO_PCI_COMMON_GF: 1217 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) { 1218 proxy->guest_features[proxy->gfselect] = val; 1219 virtio_set_features(vdev, 1220 (((uint64_t)proxy->guest_features[1]) << 32) | 1221 proxy->guest_features[0]); 1222 } 1223 break; 1224 case VIRTIO_PCI_COMMON_MSIX: 1225 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector); 1226 /* Make it possible for guest to discover an error took place. */ 1227 if (msix_vector_use(&proxy->pci_dev, val) < 0) { 1228 val = VIRTIO_NO_VECTOR; 1229 } 1230 vdev->config_vector = val; 1231 break; 1232 case VIRTIO_PCI_COMMON_STATUS: 1233 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) { 1234 virtio_pci_stop_ioeventfd(proxy); 1235 } 1236 1237 virtio_set_status(vdev, val & 0xFF); 1238 1239 if (val & VIRTIO_CONFIG_S_DRIVER_OK) { 1240 virtio_pci_start_ioeventfd(proxy); 1241 } 1242 1243 if (vdev->status == 0) { 1244 virtio_pci_reset(DEVICE(proxy)); 1245 } 1246 1247 break; 1248 case VIRTIO_PCI_COMMON_Q_SELECT: 1249 if (val < VIRTIO_QUEUE_MAX) { 1250 vdev->queue_sel = val; 1251 } 1252 break; 1253 case VIRTIO_PCI_COMMON_Q_SIZE: 1254 proxy->vqs[vdev->queue_sel].num = val; 1255 break; 1256 case VIRTIO_PCI_COMMON_Q_MSIX: 1257 msix_vector_unuse(&proxy->pci_dev, 1258 virtio_queue_vector(vdev, vdev->queue_sel)); 1259 /* Make it possible for guest to discover an error took place. */ 1260 if (msix_vector_use(&proxy->pci_dev, val) < 0) { 1261 val = VIRTIO_NO_VECTOR; 1262 } 1263 virtio_queue_set_vector(vdev, vdev->queue_sel, val); 1264 break; 1265 case VIRTIO_PCI_COMMON_Q_ENABLE: 1266 virtio_queue_set_num(vdev, vdev->queue_sel, 1267 proxy->vqs[vdev->queue_sel].num); 1268 virtio_queue_set_rings(vdev, vdev->queue_sel, 1269 ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 | 1270 proxy->vqs[vdev->queue_sel].desc[0], 1271 ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 | 1272 proxy->vqs[vdev->queue_sel].avail[0], 1273 ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 | 1274 proxy->vqs[vdev->queue_sel].used[0]); 1275 proxy->vqs[vdev->queue_sel].enabled = 1; 1276 break; 1277 case VIRTIO_PCI_COMMON_Q_DESCLO: 1278 proxy->vqs[vdev->queue_sel].desc[0] = val; 1279 break; 1280 case VIRTIO_PCI_COMMON_Q_DESCHI: 1281 proxy->vqs[vdev->queue_sel].desc[1] = val; 1282 break; 1283 case VIRTIO_PCI_COMMON_Q_AVAILLO: 1284 proxy->vqs[vdev->queue_sel].avail[0] = val; 1285 break; 1286 case VIRTIO_PCI_COMMON_Q_AVAILHI: 1287 proxy->vqs[vdev->queue_sel].avail[1] = val; 1288 break; 1289 case VIRTIO_PCI_COMMON_Q_USEDLO: 1290 proxy->vqs[vdev->queue_sel].used[0] = val; 1291 break; 1292 case VIRTIO_PCI_COMMON_Q_USEDHI: 1293 proxy->vqs[vdev->queue_sel].used[1] = val; 1294 break; 1295 default: 1296 break; 1297 } 1298 } 1299 1300 1301 static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr, 1302 unsigned size) 1303 { 1304 return 0; 1305 } 1306 1307 static void virtio_pci_notify_write(void *opaque, hwaddr addr, 1308 uint64_t val, unsigned size) 1309 { 1310 VirtIODevice *vdev = opaque; 1311 VirtIOPCIProxy *proxy = VIRTIO_PCI(DEVICE(vdev)->parent_bus->parent); 1312 unsigned queue = addr / virtio_pci_queue_mem_mult(proxy); 1313 1314 if (queue < VIRTIO_QUEUE_MAX) { 1315 virtio_queue_notify(vdev, queue); 1316 } 1317 } 1318 1319 static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr, 1320 uint64_t val, unsigned size) 1321 { 1322 VirtIODevice *vdev = opaque; 1323 unsigned queue = val; 1324 1325 if (queue < VIRTIO_QUEUE_MAX) { 1326 virtio_queue_notify(vdev, queue); 1327 } 1328 } 1329 1330 static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr, 1331 unsigned size) 1332 { 1333 VirtIOPCIProxy *proxy = opaque; 1334 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1335 uint64_t val = atomic_xchg(&vdev->isr, 0); 1336 pci_irq_deassert(&proxy->pci_dev); 1337 1338 return val; 1339 } 1340 1341 static void virtio_pci_isr_write(void *opaque, hwaddr addr, 1342 uint64_t val, unsigned size) 1343 { 1344 } 1345 1346 static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr, 1347 unsigned size) 1348 { 1349 VirtIODevice *vdev = opaque; 1350 uint64_t val = 0; 1351 1352 switch (size) { 1353 case 1: 1354 val = virtio_config_modern_readb(vdev, addr); 1355 break; 1356 case 2: 1357 val = virtio_config_modern_readw(vdev, addr); 1358 break; 1359 case 4: 1360 val = virtio_config_modern_readl(vdev, addr); 1361 break; 1362 } 1363 return val; 1364 } 1365 1366 static void virtio_pci_device_write(void *opaque, hwaddr addr, 1367 uint64_t val, unsigned size) 1368 { 1369 VirtIODevice *vdev = opaque; 1370 switch (size) { 1371 case 1: 1372 virtio_config_modern_writeb(vdev, addr, val); 1373 break; 1374 case 2: 1375 virtio_config_modern_writew(vdev, addr, val); 1376 break; 1377 case 4: 1378 virtio_config_modern_writel(vdev, addr, val); 1379 break; 1380 } 1381 } 1382 1383 static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy) 1384 { 1385 static const MemoryRegionOps common_ops = { 1386 .read = virtio_pci_common_read, 1387 .write = virtio_pci_common_write, 1388 .impl = { 1389 .min_access_size = 1, 1390 .max_access_size = 4, 1391 }, 1392 .endianness = DEVICE_LITTLE_ENDIAN, 1393 }; 1394 static const MemoryRegionOps isr_ops = { 1395 .read = virtio_pci_isr_read, 1396 .write = virtio_pci_isr_write, 1397 .impl = { 1398 .min_access_size = 1, 1399 .max_access_size = 4, 1400 }, 1401 .endianness = DEVICE_LITTLE_ENDIAN, 1402 }; 1403 static const MemoryRegionOps device_ops = { 1404 .read = virtio_pci_device_read, 1405 .write = virtio_pci_device_write, 1406 .impl = { 1407 .min_access_size = 1, 1408 .max_access_size = 4, 1409 }, 1410 .endianness = DEVICE_LITTLE_ENDIAN, 1411 }; 1412 static const MemoryRegionOps notify_ops = { 1413 .read = virtio_pci_notify_read, 1414 .write = virtio_pci_notify_write, 1415 .impl = { 1416 .min_access_size = 1, 1417 .max_access_size = 4, 1418 }, 1419 .endianness = DEVICE_LITTLE_ENDIAN, 1420 }; 1421 static const MemoryRegionOps notify_pio_ops = { 1422 .read = virtio_pci_notify_read, 1423 .write = virtio_pci_notify_write_pio, 1424 .impl = { 1425 .min_access_size = 1, 1426 .max_access_size = 4, 1427 }, 1428 .endianness = DEVICE_LITTLE_ENDIAN, 1429 }; 1430 1431 1432 memory_region_init_io(&proxy->common.mr, OBJECT(proxy), 1433 &common_ops, 1434 proxy, 1435 "virtio-pci-common", 1436 proxy->common.size); 1437 1438 memory_region_init_io(&proxy->isr.mr, OBJECT(proxy), 1439 &isr_ops, 1440 proxy, 1441 "virtio-pci-isr", 1442 proxy->isr.size); 1443 1444 memory_region_init_io(&proxy->device.mr, OBJECT(proxy), 1445 &device_ops, 1446 virtio_bus_get_device(&proxy->bus), 1447 "virtio-pci-device", 1448 proxy->device.size); 1449 1450 memory_region_init_io(&proxy->notify.mr, OBJECT(proxy), 1451 ¬ify_ops, 1452 virtio_bus_get_device(&proxy->bus), 1453 "virtio-pci-notify", 1454 proxy->notify.size); 1455 1456 memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy), 1457 ¬ify_pio_ops, 1458 virtio_bus_get_device(&proxy->bus), 1459 "virtio-pci-notify-pio", 1460 proxy->notify_pio.size); 1461 } 1462 1463 static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy, 1464 VirtIOPCIRegion *region, 1465 struct virtio_pci_cap *cap, 1466 MemoryRegion *mr, 1467 uint8_t bar) 1468 { 1469 memory_region_add_subregion(mr, region->offset, ®ion->mr); 1470 1471 cap->cfg_type = region->type; 1472 cap->bar = bar; 1473 cap->offset = cpu_to_le32(region->offset); 1474 cap->length = cpu_to_le32(region->size); 1475 virtio_pci_add_mem_cap(proxy, cap); 1476 1477 } 1478 1479 static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy, 1480 VirtIOPCIRegion *region, 1481 struct virtio_pci_cap *cap) 1482 { 1483 virtio_pci_modern_region_map(proxy, region, cap, 1484 &proxy->modern_bar, proxy->modern_mem_bar_idx); 1485 } 1486 1487 static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy, 1488 VirtIOPCIRegion *region, 1489 struct virtio_pci_cap *cap) 1490 { 1491 virtio_pci_modern_region_map(proxy, region, cap, 1492 &proxy->io_bar, proxy->modern_io_bar_idx); 1493 } 1494 1495 static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy, 1496 VirtIOPCIRegion *region) 1497 { 1498 memory_region_del_subregion(&proxy->modern_bar, 1499 ®ion->mr); 1500 } 1501 1502 static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy, 1503 VirtIOPCIRegion *region) 1504 { 1505 memory_region_del_subregion(&proxy->io_bar, 1506 ®ion->mr); 1507 } 1508 1509 static void virtio_pci_pre_plugged(DeviceState *d, Error **errp) 1510 { 1511 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1512 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1513 1514 if (virtio_pci_modern(proxy)) { 1515 virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1); 1516 } 1517 1518 virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE); 1519 } 1520 1521 /* This is called by virtio-bus just after the device is plugged. */ 1522 static void virtio_pci_device_plugged(DeviceState *d, Error **errp) 1523 { 1524 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1525 VirtioBusState *bus = &proxy->bus; 1526 bool legacy = virtio_pci_legacy(proxy); 1527 bool modern; 1528 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 1529 uint8_t *config; 1530 uint32_t size; 1531 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1532 1533 /* 1534 * Virtio capabilities present without 1535 * VIRTIO_F_VERSION_1 confuses guests 1536 */ 1537 if (!proxy->ignore_backend_features && 1538 !virtio_has_feature(vdev->host_features, VIRTIO_F_VERSION_1)) { 1539 virtio_pci_disable_modern(proxy); 1540 1541 if (!legacy) { 1542 error_setg(errp, "Device doesn't support modern mode, and legacy" 1543 " mode is disabled"); 1544 error_append_hint(errp, "Set disable-legacy to off\n"); 1545 1546 return; 1547 } 1548 } 1549 1550 modern = virtio_pci_modern(proxy); 1551 1552 config = proxy->pci_dev.config; 1553 if (proxy->class_code) { 1554 pci_config_set_class(config, proxy->class_code); 1555 } 1556 1557 if (legacy) { 1558 if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM)) { 1559 error_setg(errp, "VIRTIO_F_IOMMU_PLATFORM was supported by" 1560 " neither legacy nor transitional device"); 1561 return ; 1562 } 1563 /* 1564 * Legacy and transitional devices use specific subsystem IDs. 1565 * Note that the subsystem vendor ID (config + PCI_SUBSYSTEM_VENDOR_ID) 1566 * is set to PCI_SUBVENDOR_ID_REDHAT_QUMRANET by default. 1567 */ 1568 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus)); 1569 } else { 1570 /* pure virtio-1.0 */ 1571 pci_set_word(config + PCI_VENDOR_ID, 1572 PCI_VENDOR_ID_REDHAT_QUMRANET); 1573 pci_set_word(config + PCI_DEVICE_ID, 1574 0x1040 + virtio_bus_get_vdev_id(bus)); 1575 pci_config_set_revision(config, 1); 1576 } 1577 config[PCI_INTERRUPT_PIN] = 1; 1578 1579 1580 if (modern) { 1581 struct virtio_pci_cap cap = { 1582 .cap_len = sizeof cap, 1583 }; 1584 struct virtio_pci_notify_cap notify = { 1585 .cap.cap_len = sizeof notify, 1586 .notify_off_multiplier = 1587 cpu_to_le32(virtio_pci_queue_mem_mult(proxy)), 1588 }; 1589 struct virtio_pci_cfg_cap cfg = { 1590 .cap.cap_len = sizeof cfg, 1591 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG, 1592 }; 1593 struct virtio_pci_notify_cap notify_pio = { 1594 .cap.cap_len = sizeof notify, 1595 .notify_off_multiplier = cpu_to_le32(0x0), 1596 }; 1597 1598 struct virtio_pci_cfg_cap *cfg_mask; 1599 1600 virtio_pci_modern_regions_init(proxy); 1601 1602 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap); 1603 virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap); 1604 virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap); 1605 virtio_pci_modern_mem_region_map(proxy, &proxy->notify, ¬ify.cap); 1606 1607 if (modern_pio) { 1608 memory_region_init(&proxy->io_bar, OBJECT(proxy), 1609 "virtio-pci-io", 0x4); 1610 1611 pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar_idx, 1612 PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar); 1613 1614 virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio, 1615 ¬ify_pio.cap); 1616 } 1617 1618 pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar_idx, 1619 PCI_BASE_ADDRESS_SPACE_MEMORY | 1620 PCI_BASE_ADDRESS_MEM_PREFETCH | 1621 PCI_BASE_ADDRESS_MEM_TYPE_64, 1622 &proxy->modern_bar); 1623 1624 proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap); 1625 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap); 1626 pci_set_byte(&cfg_mask->cap.bar, ~0x0); 1627 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0); 1628 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0); 1629 pci_set_long(cfg_mask->pci_cfg_data, ~0x0); 1630 } 1631 1632 if (proxy->nvectors) { 1633 int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors, 1634 proxy->msix_bar_idx, NULL); 1635 if (err) { 1636 /* Notice when a system that supports MSIx can't initialize it */ 1637 if (err != -ENOTSUP) { 1638 warn_report("unable to init msix vectors to %" PRIu32, 1639 proxy->nvectors); 1640 } 1641 proxy->nvectors = 0; 1642 } 1643 } 1644 1645 proxy->pci_dev.config_write = virtio_write_config; 1646 proxy->pci_dev.config_read = virtio_read_config; 1647 1648 if (legacy) { 1649 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) 1650 + virtio_bus_get_vdev_config_len(bus); 1651 size = pow2ceil(size); 1652 1653 memory_region_init_io(&proxy->bar, OBJECT(proxy), 1654 &virtio_pci_config_ops, 1655 proxy, "virtio-pci", size); 1656 1657 pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar_idx, 1658 PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar); 1659 } 1660 } 1661 1662 static void virtio_pci_device_unplugged(DeviceState *d) 1663 { 1664 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1665 bool modern = virtio_pci_modern(proxy); 1666 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 1667 1668 virtio_pci_stop_ioeventfd(proxy); 1669 1670 if (modern) { 1671 virtio_pci_modern_mem_region_unmap(proxy, &proxy->common); 1672 virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr); 1673 virtio_pci_modern_mem_region_unmap(proxy, &proxy->device); 1674 virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify); 1675 if (modern_pio) { 1676 virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio); 1677 } 1678 } 1679 } 1680 1681 static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) 1682 { 1683 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 1684 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev); 1685 bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) && 1686 !pci_bus_is_root(pci_get_bus(pci_dev)); 1687 1688 if (kvm_enabled() && !kvm_has_many_ioeventfds()) { 1689 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD; 1690 } 1691 1692 /* 1693 * virtio pci bar layout used by default. 1694 * subclasses can re-arrange things if needed. 1695 * 1696 * region 0 -- virtio legacy io bar 1697 * region 1 -- msi-x bar 1698 * region 4+5 -- virtio modern memory (64bit) bar 1699 * 1700 */ 1701 proxy->legacy_io_bar_idx = 0; 1702 proxy->msix_bar_idx = 1; 1703 proxy->modern_io_bar_idx = 2; 1704 proxy->modern_mem_bar_idx = 4; 1705 1706 proxy->common.offset = 0x0; 1707 proxy->common.size = 0x1000; 1708 proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG; 1709 1710 proxy->isr.offset = 0x1000; 1711 proxy->isr.size = 0x1000; 1712 proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG; 1713 1714 proxy->device.offset = 0x2000; 1715 proxy->device.size = 0x1000; 1716 proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG; 1717 1718 proxy->notify.offset = 0x3000; 1719 proxy->notify.size = virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE_MAX; 1720 proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG; 1721 1722 proxy->notify_pio.offset = 0x0; 1723 proxy->notify_pio.size = 0x4; 1724 proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG; 1725 1726 /* subclasses can enforce modern, so do this unconditionally */ 1727 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci", 1728 /* PCI BAR regions must be powers of 2 */ 1729 pow2ceil(proxy->notify.offset + proxy->notify.size)); 1730 1731 if (proxy->disable_legacy == ON_OFF_AUTO_AUTO) { 1732 proxy->disable_legacy = pcie_port ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; 1733 } 1734 1735 if (!virtio_pci_modern(proxy) && !virtio_pci_legacy(proxy)) { 1736 error_setg(errp, "device cannot work as neither modern nor legacy mode" 1737 " is enabled"); 1738 error_append_hint(errp, "Set either disable-modern or disable-legacy" 1739 " to off\n"); 1740 return; 1741 } 1742 1743 if (pcie_port && pci_is_express(pci_dev)) { 1744 int pos; 1745 1746 pos = pcie_endpoint_cap_init(pci_dev, 0); 1747 assert(pos > 0); 1748 1749 pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, 1750 PCI_PM_SIZEOF, errp); 1751 if (pos < 0) { 1752 return; 1753 } 1754 1755 pci_dev->exp.pm_cap = pos; 1756 1757 /* 1758 * Indicates that this function complies with revision 1.2 of the 1759 * PCI Power Management Interface Specification. 1760 */ 1761 pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3); 1762 1763 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) { 1764 /* Init error enabling flags */ 1765 pcie_cap_deverr_init(pci_dev); 1766 } 1767 1768 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_LNKCTL) { 1769 /* Init Link Control Register */ 1770 pcie_cap_lnkctl_init(pci_dev); 1771 } 1772 1773 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) { 1774 /* Init Power Management Control Register */ 1775 pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL, 1776 PCI_PM_CTRL_STATE_MASK); 1777 } 1778 1779 if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { 1780 pcie_ats_init(pci_dev, 256); 1781 } 1782 1783 } else { 1784 /* 1785 * make future invocations of pci_is_express() return false 1786 * and pci_config_size() return PCI_CONFIG_SPACE_SIZE. 1787 */ 1788 pci_dev->cap_present &= ~QEMU_PCI_CAP_EXPRESS; 1789 } 1790 1791 virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy); 1792 if (k->realize) { 1793 k->realize(proxy, errp); 1794 } 1795 } 1796 1797 static void virtio_pci_exit(PCIDevice *pci_dev) 1798 { 1799 msix_uninit_exclusive_bar(pci_dev); 1800 } 1801 1802 static void virtio_pci_reset(DeviceState *qdev) 1803 { 1804 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); 1805 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus); 1806 PCIDevice *dev = PCI_DEVICE(qdev); 1807 int i; 1808 1809 virtio_pci_stop_ioeventfd(proxy); 1810 virtio_bus_reset(bus); 1811 msix_unuse_all_vectors(&proxy->pci_dev); 1812 1813 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { 1814 proxy->vqs[i].enabled = 0; 1815 proxy->vqs[i].num = 0; 1816 proxy->vqs[i].desc[0] = proxy->vqs[i].desc[1] = 0; 1817 proxy->vqs[i].avail[0] = proxy->vqs[i].avail[1] = 0; 1818 proxy->vqs[i].used[0] = proxy->vqs[i].used[1] = 0; 1819 } 1820 1821 if (pci_is_express(dev)) { 1822 pcie_cap_deverr_reset(dev); 1823 pcie_cap_lnkctl_reset(dev); 1824 1825 pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0); 1826 } 1827 } 1828 1829 static Property virtio_pci_properties[] = { 1830 DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags, 1831 VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false), 1832 DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags, 1833 VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true), 1834 DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags, 1835 VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false), 1836 DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags, 1837 VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false), 1838 DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags, 1839 VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false), 1840 DEFINE_PROP_BOOL("x-ignore-backend-features", VirtIOPCIProxy, 1841 ignore_backend_features, false), 1842 DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags, 1843 VIRTIO_PCI_FLAG_ATS_BIT, false), 1844 DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags, 1845 VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true), 1846 DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags, 1847 VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true), 1848 DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags, 1849 VIRTIO_PCI_FLAG_INIT_PM_BIT, true), 1850 DEFINE_PROP_END_OF_LIST(), 1851 }; 1852 1853 static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp) 1854 { 1855 VirtioPCIClass *vpciklass = VIRTIO_PCI_GET_CLASS(qdev); 1856 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); 1857 PCIDevice *pci_dev = &proxy->pci_dev; 1858 1859 if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) && 1860 virtio_pci_modern(proxy)) { 1861 pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; 1862 } 1863 1864 vpciklass->parent_dc_realize(qdev, errp); 1865 } 1866 1867 static void virtio_pci_class_init(ObjectClass *klass, void *data) 1868 { 1869 DeviceClass *dc = DEVICE_CLASS(klass); 1870 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1871 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass); 1872 1873 dc->props = virtio_pci_properties; 1874 k->realize = virtio_pci_realize; 1875 k->exit = virtio_pci_exit; 1876 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 1877 k->revision = VIRTIO_PCI_ABI_VERSION; 1878 k->class_id = PCI_CLASS_OTHERS; 1879 device_class_set_parent_realize(dc, virtio_pci_dc_realize, 1880 &vpciklass->parent_dc_realize); 1881 dc->reset = virtio_pci_reset; 1882 } 1883 1884 static const TypeInfo virtio_pci_info = { 1885 .name = TYPE_VIRTIO_PCI, 1886 .parent = TYPE_PCI_DEVICE, 1887 .instance_size = sizeof(VirtIOPCIProxy), 1888 .class_init = virtio_pci_class_init, 1889 .class_size = sizeof(VirtioPCIClass), 1890 .abstract = true, 1891 }; 1892 1893 static Property virtio_pci_generic_properties[] = { 1894 DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy, 1895 ON_OFF_AUTO_AUTO), 1896 DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false), 1897 DEFINE_PROP_END_OF_LIST(), 1898 }; 1899 1900 static void virtio_pci_base_class_init(ObjectClass *klass, void *data) 1901 { 1902 const VirtioPCIDeviceTypeInfo *t = data; 1903 if (t->class_init) { 1904 t->class_init(klass, NULL); 1905 } 1906 } 1907 1908 static void virtio_pci_generic_class_init(ObjectClass *klass, void *data) 1909 { 1910 DeviceClass *dc = DEVICE_CLASS(klass); 1911 1912 dc->props = virtio_pci_generic_properties; 1913 } 1914 1915 static void virtio_pci_transitional_instance_init(Object *obj) 1916 { 1917 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj); 1918 1919 proxy->disable_legacy = ON_OFF_AUTO_OFF; 1920 proxy->disable_modern = false; 1921 } 1922 1923 static void virtio_pci_non_transitional_instance_init(Object *obj) 1924 { 1925 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj); 1926 1927 proxy->disable_legacy = ON_OFF_AUTO_ON; 1928 proxy->disable_modern = false; 1929 } 1930 1931 void virtio_pci_types_register(const VirtioPCIDeviceTypeInfo *t) 1932 { 1933 char *base_name = NULL; 1934 TypeInfo base_type_info = { 1935 .name = t->base_name, 1936 .parent = t->parent ? t->parent : TYPE_VIRTIO_PCI, 1937 .instance_size = t->instance_size, 1938 .instance_init = t->instance_init, 1939 .class_size = t->class_size, 1940 .abstract = true, 1941 .interfaces = t->interfaces, 1942 }; 1943 TypeInfo generic_type_info = { 1944 .name = t->generic_name, 1945 .parent = base_type_info.name, 1946 .class_init = virtio_pci_generic_class_init, 1947 .interfaces = (InterfaceInfo[]) { 1948 { INTERFACE_PCIE_DEVICE }, 1949 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 1950 { } 1951 }, 1952 }; 1953 1954 if (!base_type_info.name) { 1955 /* No base type -> register a single generic device type */ 1956 /* use intermediate %s-base-type to add generic device props */ 1957 base_name = g_strdup_printf("%s-base-type", t->generic_name); 1958 base_type_info.name = base_name; 1959 base_type_info.class_init = virtio_pci_generic_class_init; 1960 1961 generic_type_info.parent = base_name; 1962 generic_type_info.class_init = virtio_pci_base_class_init; 1963 generic_type_info.class_data = (void *)t; 1964 1965 assert(!t->non_transitional_name); 1966 assert(!t->transitional_name); 1967 } else { 1968 base_type_info.class_init = virtio_pci_base_class_init; 1969 base_type_info.class_data = (void *)t; 1970 } 1971 1972 type_register(&base_type_info); 1973 if (generic_type_info.name) { 1974 type_register(&generic_type_info); 1975 } 1976 1977 if (t->non_transitional_name) { 1978 const TypeInfo non_transitional_type_info = { 1979 .name = t->non_transitional_name, 1980 .parent = base_type_info.name, 1981 .instance_init = virtio_pci_non_transitional_instance_init, 1982 .interfaces = (InterfaceInfo[]) { 1983 { INTERFACE_PCIE_DEVICE }, 1984 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 1985 { } 1986 }, 1987 }; 1988 type_register(&non_transitional_type_info); 1989 } 1990 1991 if (t->transitional_name) { 1992 const TypeInfo transitional_type_info = { 1993 .name = t->transitional_name, 1994 .parent = base_type_info.name, 1995 .instance_init = virtio_pci_transitional_instance_init, 1996 .interfaces = (InterfaceInfo[]) { 1997 /* 1998 * Transitional virtio devices work only as Conventional PCI 1999 * devices because they require PIO ports. 2000 */ 2001 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 2002 { } 2003 }, 2004 }; 2005 type_register(&transitional_type_info); 2006 } 2007 g_free(base_name); 2008 } 2009 2010 /* virtio-pci-bus */ 2011 2012 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size, 2013 VirtIOPCIProxy *dev) 2014 { 2015 DeviceState *qdev = DEVICE(dev); 2016 char virtio_bus_name[] = "virtio-bus"; 2017 2018 qbus_create_inplace(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev, 2019 virtio_bus_name); 2020 } 2021 2022 static void virtio_pci_bus_class_init(ObjectClass *klass, void *data) 2023 { 2024 BusClass *bus_class = BUS_CLASS(klass); 2025 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass); 2026 bus_class->max_dev = 1; 2027 k->notify = virtio_pci_notify; 2028 k->save_config = virtio_pci_save_config; 2029 k->load_config = virtio_pci_load_config; 2030 k->save_queue = virtio_pci_save_queue; 2031 k->load_queue = virtio_pci_load_queue; 2032 k->save_extra_state = virtio_pci_save_extra_state; 2033 k->load_extra_state = virtio_pci_load_extra_state; 2034 k->has_extra_state = virtio_pci_has_extra_state; 2035 k->query_guest_notifiers = virtio_pci_query_guest_notifiers; 2036 k->set_guest_notifiers = virtio_pci_set_guest_notifiers; 2037 k->set_host_notifier_mr = virtio_pci_set_host_notifier_mr; 2038 k->vmstate_change = virtio_pci_vmstate_change; 2039 k->pre_plugged = virtio_pci_pre_plugged; 2040 k->device_plugged = virtio_pci_device_plugged; 2041 k->device_unplugged = virtio_pci_device_unplugged; 2042 k->query_nvectors = virtio_pci_query_nvectors; 2043 k->ioeventfd_enabled = virtio_pci_ioeventfd_enabled; 2044 k->ioeventfd_assign = virtio_pci_ioeventfd_assign; 2045 k->get_dma_as = virtio_pci_get_dma_as; 2046 } 2047 2048 static const TypeInfo virtio_pci_bus_info = { 2049 .name = TYPE_VIRTIO_PCI_BUS, 2050 .parent = TYPE_VIRTIO_BUS, 2051 .instance_size = sizeof(VirtioPCIBusState), 2052 .class_init = virtio_pci_bus_class_init, 2053 }; 2054 2055 static void virtio_pci_register_types(void) 2056 { 2057 /* Base types: */ 2058 type_register_static(&virtio_pci_bus_info); 2059 type_register_static(&virtio_pci_info); 2060 } 2061 2062 type_init(virtio_pci_register_types) 2063 2064