1 /* 2 * Virtio PCI Bindings 3 * 4 * Copyright IBM, Corp. 2007 5 * Copyright (c) 2009 CodeSourcery 6 * 7 * Authors: 8 * Anthony Liguori <aliguori@us.ibm.com> 9 * Paul Brook <paul@codesourcery.com> 10 * 11 * This work is licensed under the terms of the GNU GPL, version 2. See 12 * the COPYING file in the top-level directory. 13 * 14 * Contributions after 2012-01-13 are licensed under the terms of the 15 * GNU GPL, version 2 or (at your option) any later version. 16 */ 17 18 #include "qemu/osdep.h" 19 20 #include "standard-headers/linux/virtio_pci.h" 21 #include "hw/virtio/virtio.h" 22 #include "hw/virtio/virtio-blk.h" 23 #include "hw/virtio/virtio-net.h" 24 #include "hw/virtio/virtio-serial.h" 25 #include "hw/virtio/virtio-scsi.h" 26 #include "hw/virtio/virtio-balloon.h" 27 #include "hw/virtio/virtio-input.h" 28 #include "hw/pci/pci.h" 29 #include "qapi/error.h" 30 #include "qemu/error-report.h" 31 #include "hw/pci/msi.h" 32 #include "hw/pci/msix.h" 33 #include "hw/loader.h" 34 #include "sysemu/kvm.h" 35 #include "sysemu/block-backend.h" 36 #include "virtio-pci.h" 37 #include "qemu/range.h" 38 #include "hw/virtio/virtio-bus.h" 39 #include "qapi/visitor.h" 40 41 #define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev)) 42 43 #undef VIRTIO_PCI_CONFIG 44 45 /* The remaining space is defined by each driver as the per-driver 46 * configuration space */ 47 #define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev)) 48 49 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size, 50 VirtIOPCIProxy *dev); 51 static void virtio_pci_reset(DeviceState *qdev); 52 53 /* virtio device */ 54 /* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */ 55 static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d) 56 { 57 return container_of(d, VirtIOPCIProxy, pci_dev.qdev); 58 } 59 60 /* DeviceState to VirtIOPCIProxy. Note: used on datapath, 61 * be careful and test performance if you change this. 62 */ 63 static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d) 64 { 65 return container_of(d, VirtIOPCIProxy, pci_dev.qdev); 66 } 67 68 static void virtio_pci_notify(DeviceState *d, uint16_t vector) 69 { 70 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d); 71 72 if (msix_enabled(&proxy->pci_dev)) 73 msix_notify(&proxy->pci_dev, vector); 74 else { 75 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 76 pci_set_irq(&proxy->pci_dev, atomic_read(&vdev->isr) & 1); 77 } 78 } 79 80 static void virtio_pci_save_config(DeviceState *d, QEMUFile *f) 81 { 82 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 83 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 84 85 pci_device_save(&proxy->pci_dev, f); 86 msix_save(&proxy->pci_dev, f); 87 if (msix_present(&proxy->pci_dev)) 88 qemu_put_be16(f, vdev->config_vector); 89 } 90 91 static void virtio_pci_load_modern_queue_state(VirtIOPCIQueue *vq, 92 QEMUFile *f) 93 { 94 vq->num = qemu_get_be16(f); 95 vq->enabled = qemu_get_be16(f); 96 vq->desc[0] = qemu_get_be32(f); 97 vq->desc[1] = qemu_get_be32(f); 98 vq->avail[0] = qemu_get_be32(f); 99 vq->avail[1] = qemu_get_be32(f); 100 vq->used[0] = qemu_get_be32(f); 101 vq->used[1] = qemu_get_be32(f); 102 } 103 104 static bool virtio_pci_has_extra_state(DeviceState *d) 105 { 106 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 107 108 return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA; 109 } 110 111 static int get_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size) 112 { 113 VirtIOPCIProxy *proxy = pv; 114 int i; 115 116 proxy->dfselect = qemu_get_be32(f); 117 proxy->gfselect = qemu_get_be32(f); 118 proxy->guest_features[0] = qemu_get_be32(f); 119 proxy->guest_features[1] = qemu_get_be32(f); 120 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { 121 virtio_pci_load_modern_queue_state(&proxy->vqs[i], f); 122 } 123 124 return 0; 125 } 126 127 static void virtio_pci_save_modern_queue_state(VirtIOPCIQueue *vq, 128 QEMUFile *f) 129 { 130 qemu_put_be16(f, vq->num); 131 qemu_put_be16(f, vq->enabled); 132 qemu_put_be32(f, vq->desc[0]); 133 qemu_put_be32(f, vq->desc[1]); 134 qemu_put_be32(f, vq->avail[0]); 135 qemu_put_be32(f, vq->avail[1]); 136 qemu_put_be32(f, vq->used[0]); 137 qemu_put_be32(f, vq->used[1]); 138 } 139 140 static void put_virtio_pci_modern_state(QEMUFile *f, void *pv, size_t size) 141 { 142 VirtIOPCIProxy *proxy = pv; 143 int i; 144 145 qemu_put_be32(f, proxy->dfselect); 146 qemu_put_be32(f, proxy->gfselect); 147 qemu_put_be32(f, proxy->guest_features[0]); 148 qemu_put_be32(f, proxy->guest_features[1]); 149 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { 150 virtio_pci_save_modern_queue_state(&proxy->vqs[i], f); 151 } 152 } 153 154 static const VMStateInfo vmstate_info_virtio_pci_modern_state = { 155 .name = "virtqueue_state", 156 .get = get_virtio_pci_modern_state, 157 .put = put_virtio_pci_modern_state, 158 }; 159 160 static bool virtio_pci_modern_state_needed(void *opaque) 161 { 162 VirtIOPCIProxy *proxy = opaque; 163 164 return virtio_pci_modern(proxy); 165 } 166 167 static const VMStateDescription vmstate_virtio_pci_modern_state = { 168 .name = "virtio_pci/modern_state", 169 .version_id = 1, 170 .minimum_version_id = 1, 171 .needed = &virtio_pci_modern_state_needed, 172 .fields = (VMStateField[]) { 173 { 174 .name = "modern_state", 175 .version_id = 0, 176 .field_exists = NULL, 177 .size = 0, 178 .info = &vmstate_info_virtio_pci_modern_state, 179 .flags = VMS_SINGLE, 180 .offset = 0, 181 }, 182 VMSTATE_END_OF_LIST() 183 } 184 }; 185 186 static const VMStateDescription vmstate_virtio_pci = { 187 .name = "virtio_pci", 188 .version_id = 1, 189 .minimum_version_id = 1, 190 .minimum_version_id_old = 1, 191 .fields = (VMStateField[]) { 192 VMSTATE_END_OF_LIST() 193 }, 194 .subsections = (const VMStateDescription*[]) { 195 &vmstate_virtio_pci_modern_state, 196 NULL 197 } 198 }; 199 200 static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f) 201 { 202 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 203 204 vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL); 205 } 206 207 static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f) 208 { 209 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 210 211 return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1); 212 } 213 214 static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f) 215 { 216 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 217 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 218 219 if (msix_present(&proxy->pci_dev)) 220 qemu_put_be16(f, virtio_queue_vector(vdev, n)); 221 } 222 223 static int virtio_pci_load_config(DeviceState *d, QEMUFile *f) 224 { 225 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 226 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 227 228 int ret; 229 ret = pci_device_load(&proxy->pci_dev, f); 230 if (ret) { 231 return ret; 232 } 233 msix_unuse_all_vectors(&proxy->pci_dev); 234 msix_load(&proxy->pci_dev, f); 235 if (msix_present(&proxy->pci_dev)) { 236 qemu_get_be16s(f, &vdev->config_vector); 237 } else { 238 vdev->config_vector = VIRTIO_NO_VECTOR; 239 } 240 if (vdev->config_vector != VIRTIO_NO_VECTOR) { 241 return msix_vector_use(&proxy->pci_dev, vdev->config_vector); 242 } 243 return 0; 244 } 245 246 static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f) 247 { 248 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 249 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 250 251 uint16_t vector; 252 if (msix_present(&proxy->pci_dev)) { 253 qemu_get_be16s(f, &vector); 254 } else { 255 vector = VIRTIO_NO_VECTOR; 256 } 257 virtio_queue_set_vector(vdev, n, vector); 258 if (vector != VIRTIO_NO_VECTOR) { 259 return msix_vector_use(&proxy->pci_dev, vector); 260 } 261 262 return 0; 263 } 264 265 static bool virtio_pci_ioeventfd_enabled(DeviceState *d) 266 { 267 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 268 269 return (proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD) != 0; 270 } 271 272 #define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000 273 274 static inline int virtio_pci_queue_mem_mult(struct VirtIOPCIProxy *proxy) 275 { 276 return (proxy->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ) ? 277 QEMU_VIRTIO_PCI_QUEUE_MEM_MULT : 4; 278 } 279 280 static int virtio_pci_ioeventfd_assign(DeviceState *d, EventNotifier *notifier, 281 int n, bool assign) 282 { 283 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 284 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 285 VirtQueue *vq = virtio_get_queue(vdev, n); 286 bool legacy = virtio_pci_legacy(proxy); 287 bool modern = virtio_pci_modern(proxy); 288 bool fast_mmio = kvm_ioeventfd_any_length_enabled(); 289 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 290 MemoryRegion *modern_mr = &proxy->notify.mr; 291 MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr; 292 MemoryRegion *legacy_mr = &proxy->bar; 293 hwaddr modern_addr = virtio_pci_queue_mem_mult(proxy) * 294 virtio_get_queue_index(vq); 295 hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY; 296 297 if (assign) { 298 if (modern) { 299 if (fast_mmio) { 300 memory_region_add_eventfd(modern_mr, modern_addr, 0, 301 false, n, notifier); 302 } else { 303 memory_region_add_eventfd(modern_mr, modern_addr, 2, 304 false, n, notifier); 305 } 306 if (modern_pio) { 307 memory_region_add_eventfd(modern_notify_mr, 0, 2, 308 true, n, notifier); 309 } 310 } 311 if (legacy) { 312 memory_region_add_eventfd(legacy_mr, legacy_addr, 2, 313 true, n, notifier); 314 } 315 } else { 316 if (modern) { 317 if (fast_mmio) { 318 memory_region_del_eventfd(modern_mr, modern_addr, 0, 319 false, n, notifier); 320 } else { 321 memory_region_del_eventfd(modern_mr, modern_addr, 2, 322 false, n, notifier); 323 } 324 if (modern_pio) { 325 memory_region_del_eventfd(modern_notify_mr, 0, 2, 326 true, n, notifier); 327 } 328 } 329 if (legacy) { 330 memory_region_del_eventfd(legacy_mr, legacy_addr, 2, 331 true, n, notifier); 332 } 333 } 334 return 0; 335 } 336 337 static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy) 338 { 339 virtio_bus_start_ioeventfd(&proxy->bus); 340 } 341 342 static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy) 343 { 344 virtio_bus_stop_ioeventfd(&proxy->bus); 345 } 346 347 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val) 348 { 349 VirtIOPCIProxy *proxy = opaque; 350 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 351 hwaddr pa; 352 353 switch (addr) { 354 case VIRTIO_PCI_GUEST_FEATURES: 355 /* Guest does not negotiate properly? We have to assume nothing. */ 356 if (val & (1 << VIRTIO_F_BAD_FEATURE)) { 357 val = virtio_bus_get_vdev_bad_features(&proxy->bus); 358 } 359 virtio_set_features(vdev, val); 360 break; 361 case VIRTIO_PCI_QUEUE_PFN: 362 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT; 363 if (pa == 0) { 364 virtio_pci_reset(DEVICE(proxy)); 365 } 366 else 367 virtio_queue_set_addr(vdev, vdev->queue_sel, pa); 368 break; 369 case VIRTIO_PCI_QUEUE_SEL: 370 if (val < VIRTIO_QUEUE_MAX) 371 vdev->queue_sel = val; 372 break; 373 case VIRTIO_PCI_QUEUE_NOTIFY: 374 if (val < VIRTIO_QUEUE_MAX) { 375 virtio_queue_notify(vdev, val); 376 } 377 break; 378 case VIRTIO_PCI_STATUS: 379 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) { 380 virtio_pci_stop_ioeventfd(proxy); 381 } 382 383 virtio_set_status(vdev, val & 0xFF); 384 385 if (val & VIRTIO_CONFIG_S_DRIVER_OK) { 386 virtio_pci_start_ioeventfd(proxy); 387 } 388 389 if (vdev->status == 0) { 390 virtio_pci_reset(DEVICE(proxy)); 391 } 392 393 /* Linux before 2.6.34 drives the device without enabling 394 the PCI device bus master bit. Enable it automatically 395 for the guest. This is a PCI spec violation but so is 396 initiating DMA with bus master bit clear. */ 397 if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) { 398 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND, 399 proxy->pci_dev.config[PCI_COMMAND] | 400 PCI_COMMAND_MASTER, 1); 401 } 402 break; 403 case VIRTIO_MSI_CONFIG_VECTOR: 404 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector); 405 /* Make it possible for guest to discover an error took place. */ 406 if (msix_vector_use(&proxy->pci_dev, val) < 0) 407 val = VIRTIO_NO_VECTOR; 408 vdev->config_vector = val; 409 break; 410 case VIRTIO_MSI_QUEUE_VECTOR: 411 msix_vector_unuse(&proxy->pci_dev, 412 virtio_queue_vector(vdev, vdev->queue_sel)); 413 /* Make it possible for guest to discover an error took place. */ 414 if (msix_vector_use(&proxy->pci_dev, val) < 0) 415 val = VIRTIO_NO_VECTOR; 416 virtio_queue_set_vector(vdev, vdev->queue_sel, val); 417 break; 418 default: 419 error_report("%s: unexpected address 0x%x value 0x%x", 420 __func__, addr, val); 421 break; 422 } 423 } 424 425 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr) 426 { 427 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 428 uint32_t ret = 0xFFFFFFFF; 429 430 switch (addr) { 431 case VIRTIO_PCI_HOST_FEATURES: 432 ret = vdev->host_features; 433 break; 434 case VIRTIO_PCI_GUEST_FEATURES: 435 ret = vdev->guest_features; 436 break; 437 case VIRTIO_PCI_QUEUE_PFN: 438 ret = virtio_queue_get_addr(vdev, vdev->queue_sel) 439 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT; 440 break; 441 case VIRTIO_PCI_QUEUE_NUM: 442 ret = virtio_queue_get_num(vdev, vdev->queue_sel); 443 break; 444 case VIRTIO_PCI_QUEUE_SEL: 445 ret = vdev->queue_sel; 446 break; 447 case VIRTIO_PCI_STATUS: 448 ret = vdev->status; 449 break; 450 case VIRTIO_PCI_ISR: 451 /* reading from the ISR also clears it. */ 452 ret = atomic_xchg(&vdev->isr, 0); 453 pci_irq_deassert(&proxy->pci_dev); 454 break; 455 case VIRTIO_MSI_CONFIG_VECTOR: 456 ret = vdev->config_vector; 457 break; 458 case VIRTIO_MSI_QUEUE_VECTOR: 459 ret = virtio_queue_vector(vdev, vdev->queue_sel); 460 break; 461 default: 462 break; 463 } 464 465 return ret; 466 } 467 468 static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr, 469 unsigned size) 470 { 471 VirtIOPCIProxy *proxy = opaque; 472 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 473 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev); 474 uint64_t val = 0; 475 if (addr < config) { 476 return virtio_ioport_read(proxy, addr); 477 } 478 addr -= config; 479 480 switch (size) { 481 case 1: 482 val = virtio_config_readb(vdev, addr); 483 break; 484 case 2: 485 val = virtio_config_readw(vdev, addr); 486 if (virtio_is_big_endian(vdev)) { 487 val = bswap16(val); 488 } 489 break; 490 case 4: 491 val = virtio_config_readl(vdev, addr); 492 if (virtio_is_big_endian(vdev)) { 493 val = bswap32(val); 494 } 495 break; 496 } 497 return val; 498 } 499 500 static void virtio_pci_config_write(void *opaque, hwaddr addr, 501 uint64_t val, unsigned size) 502 { 503 VirtIOPCIProxy *proxy = opaque; 504 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev); 505 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 506 if (addr < config) { 507 virtio_ioport_write(proxy, addr, val); 508 return; 509 } 510 addr -= config; 511 /* 512 * Virtio-PCI is odd. Ioports are LE but config space is target native 513 * endian. 514 */ 515 switch (size) { 516 case 1: 517 virtio_config_writeb(vdev, addr, val); 518 break; 519 case 2: 520 if (virtio_is_big_endian(vdev)) { 521 val = bswap16(val); 522 } 523 virtio_config_writew(vdev, addr, val); 524 break; 525 case 4: 526 if (virtio_is_big_endian(vdev)) { 527 val = bswap32(val); 528 } 529 virtio_config_writel(vdev, addr, val); 530 break; 531 } 532 } 533 534 static const MemoryRegionOps virtio_pci_config_ops = { 535 .read = virtio_pci_config_read, 536 .write = virtio_pci_config_write, 537 .impl = { 538 .min_access_size = 1, 539 .max_access_size = 4, 540 }, 541 .endianness = DEVICE_LITTLE_ENDIAN, 542 }; 543 544 /* Below are generic functions to do memcpy from/to an address space, 545 * without byteswaps, with input validation. 546 * 547 * As regular address_space_* APIs all do some kind of byteswap at least for 548 * some host/target combinations, we are forced to explicitly convert to a 549 * known-endianness integer value. 550 * It doesn't really matter which endian format to go through, so the code 551 * below selects the endian that causes the least amount of work on the given 552 * host. 553 * 554 * Note: host pointer must be aligned. 555 */ 556 static 557 void virtio_address_space_write(AddressSpace *as, hwaddr addr, 558 const uint8_t *buf, int len) 559 { 560 uint32_t val; 561 562 /* address_space_* APIs assume an aligned address. 563 * As address is under guest control, handle illegal values. 564 */ 565 addr &= ~(len - 1); 566 567 /* Make sure caller aligned buf properly */ 568 assert(!(((uintptr_t)buf) & (len - 1))); 569 570 switch (len) { 571 case 1: 572 val = pci_get_byte(buf); 573 address_space_stb(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); 574 break; 575 case 2: 576 val = pci_get_word(buf); 577 address_space_stw_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); 578 break; 579 case 4: 580 val = pci_get_long(buf); 581 address_space_stl_le(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL); 582 break; 583 default: 584 /* As length is under guest control, handle illegal values. */ 585 break; 586 } 587 } 588 589 static void 590 virtio_address_space_read(AddressSpace *as, hwaddr addr, uint8_t *buf, int len) 591 { 592 uint32_t val; 593 594 /* address_space_* APIs assume an aligned address. 595 * As address is under guest control, handle illegal values. 596 */ 597 addr &= ~(len - 1); 598 599 /* Make sure caller aligned buf properly */ 600 assert(!(((uintptr_t)buf) & (len - 1))); 601 602 switch (len) { 603 case 1: 604 val = address_space_ldub(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); 605 pci_set_byte(buf, val); 606 break; 607 case 2: 608 val = address_space_lduw_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); 609 pci_set_word(buf, val); 610 break; 611 case 4: 612 val = address_space_ldl_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL); 613 pci_set_long(buf, val); 614 break; 615 default: 616 /* As length is under guest control, handle illegal values. */ 617 break; 618 } 619 } 620 621 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address, 622 uint32_t val, int len) 623 { 624 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev); 625 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 626 struct virtio_pci_cfg_cap *cfg; 627 628 pci_default_write_config(pci_dev, address, val, len); 629 630 if (range_covers_byte(address, len, PCI_COMMAND) && 631 !(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { 632 virtio_pci_stop_ioeventfd(proxy); 633 virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK); 634 } 635 636 if (proxy->config_cap && 637 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap, 638 pci_cfg_data), 639 sizeof cfg->pci_cfg_data)) { 640 uint32_t off; 641 uint32_t len; 642 643 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap); 644 off = le32_to_cpu(cfg->cap.offset); 645 len = le32_to_cpu(cfg->cap.length); 646 647 if (len == 1 || len == 2 || len == 4) { 648 assert(len <= sizeof cfg->pci_cfg_data); 649 virtio_address_space_write(&proxy->modern_as, off, 650 cfg->pci_cfg_data, len); 651 } 652 } 653 } 654 655 static uint32_t virtio_read_config(PCIDevice *pci_dev, 656 uint32_t address, int len) 657 { 658 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev); 659 struct virtio_pci_cfg_cap *cfg; 660 661 if (proxy->config_cap && 662 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap, 663 pci_cfg_data), 664 sizeof cfg->pci_cfg_data)) { 665 uint32_t off; 666 uint32_t len; 667 668 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap); 669 off = le32_to_cpu(cfg->cap.offset); 670 len = le32_to_cpu(cfg->cap.length); 671 672 if (len == 1 || len == 2 || len == 4) { 673 assert(len <= sizeof cfg->pci_cfg_data); 674 virtio_address_space_read(&proxy->modern_as, off, 675 cfg->pci_cfg_data, len); 676 } 677 } 678 679 return pci_default_read_config(pci_dev, address, len); 680 } 681 682 static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy, 683 unsigned int queue_no, 684 unsigned int vector) 685 { 686 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 687 int ret; 688 689 if (irqfd->users == 0) { 690 ret = kvm_irqchip_add_msi_route(kvm_state, vector, &proxy->pci_dev); 691 if (ret < 0) { 692 return ret; 693 } 694 irqfd->virq = ret; 695 } 696 irqfd->users++; 697 return 0; 698 } 699 700 static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy, 701 unsigned int vector) 702 { 703 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 704 if (--irqfd->users == 0) { 705 kvm_irqchip_release_virq(kvm_state, irqfd->virq); 706 } 707 } 708 709 static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy, 710 unsigned int queue_no, 711 unsigned int vector) 712 { 713 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 714 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 715 VirtQueue *vq = virtio_get_queue(vdev, queue_no); 716 EventNotifier *n = virtio_queue_get_guest_notifier(vq); 717 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq); 718 } 719 720 static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy, 721 unsigned int queue_no, 722 unsigned int vector) 723 { 724 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 725 VirtQueue *vq = virtio_get_queue(vdev, queue_no); 726 EventNotifier *n = virtio_queue_get_guest_notifier(vq); 727 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector]; 728 int ret; 729 730 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq); 731 assert(ret == 0); 732 } 733 734 static int kvm_virtio_pci_vector_use(VirtIOPCIProxy *proxy, int nvqs) 735 { 736 PCIDevice *dev = &proxy->pci_dev; 737 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 738 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 739 unsigned int vector; 740 int ret, queue_no; 741 742 for (queue_no = 0; queue_no < nvqs; queue_no++) { 743 if (!virtio_queue_get_num(vdev, queue_no)) { 744 break; 745 } 746 vector = virtio_queue_vector(vdev, queue_no); 747 if (vector >= msix_nr_vectors_allocated(dev)) { 748 continue; 749 } 750 ret = kvm_virtio_pci_vq_vector_use(proxy, queue_no, vector); 751 if (ret < 0) { 752 goto undo; 753 } 754 /* If guest supports masking, set up irqfd now. 755 * Otherwise, delay until unmasked in the frontend. 756 */ 757 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 758 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector); 759 if (ret < 0) { 760 kvm_virtio_pci_vq_vector_release(proxy, vector); 761 goto undo; 762 } 763 } 764 } 765 return 0; 766 767 undo: 768 while (--queue_no >= 0) { 769 vector = virtio_queue_vector(vdev, queue_no); 770 if (vector >= msix_nr_vectors_allocated(dev)) { 771 continue; 772 } 773 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 774 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); 775 } 776 kvm_virtio_pci_vq_vector_release(proxy, vector); 777 } 778 return ret; 779 } 780 781 static void kvm_virtio_pci_vector_release(VirtIOPCIProxy *proxy, int nvqs) 782 { 783 PCIDevice *dev = &proxy->pci_dev; 784 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 785 unsigned int vector; 786 int queue_no; 787 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 788 789 for (queue_no = 0; queue_no < nvqs; queue_no++) { 790 if (!virtio_queue_get_num(vdev, queue_no)) { 791 break; 792 } 793 vector = virtio_queue_vector(vdev, queue_no); 794 if (vector >= msix_nr_vectors_allocated(dev)) { 795 continue; 796 } 797 /* If guest supports masking, clean up irqfd now. 798 * Otherwise, it was cleaned when masked in the frontend. 799 */ 800 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 801 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); 802 } 803 kvm_virtio_pci_vq_vector_release(proxy, vector); 804 } 805 } 806 807 static int virtio_pci_vq_vector_unmask(VirtIOPCIProxy *proxy, 808 unsigned int queue_no, 809 unsigned int vector, 810 MSIMessage msg) 811 { 812 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 813 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 814 VirtQueue *vq = virtio_get_queue(vdev, queue_no); 815 EventNotifier *n = virtio_queue_get_guest_notifier(vq); 816 VirtIOIRQFD *irqfd; 817 int ret = 0; 818 819 if (proxy->vector_irqfd) { 820 irqfd = &proxy->vector_irqfd[vector]; 821 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) { 822 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg, 823 &proxy->pci_dev); 824 if (ret < 0) { 825 return ret; 826 } 827 kvm_irqchip_commit_routes(kvm_state); 828 } 829 } 830 831 /* If guest supports masking, irqfd is already setup, unmask it. 832 * Otherwise, set it up now. 833 */ 834 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 835 k->guest_notifier_mask(vdev, queue_no, false); 836 /* Test after unmasking to avoid losing events. */ 837 if (k->guest_notifier_pending && 838 k->guest_notifier_pending(vdev, queue_no)) { 839 event_notifier_set(n); 840 } 841 } else { 842 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector); 843 } 844 return ret; 845 } 846 847 static void virtio_pci_vq_vector_mask(VirtIOPCIProxy *proxy, 848 unsigned int queue_no, 849 unsigned int vector) 850 { 851 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 852 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 853 854 /* If guest supports masking, keep irqfd but mask it. 855 * Otherwise, clean it up now. 856 */ 857 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) { 858 k->guest_notifier_mask(vdev, queue_no, true); 859 } else { 860 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector); 861 } 862 } 863 864 static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector, 865 MSIMessage msg) 866 { 867 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 868 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 869 VirtQueue *vq = virtio_vector_first_queue(vdev, vector); 870 int ret, index, unmasked = 0; 871 872 while (vq) { 873 index = virtio_get_queue_index(vq); 874 if (!virtio_queue_get_num(vdev, index)) { 875 break; 876 } 877 if (index < proxy->nvqs_with_notifiers) { 878 ret = virtio_pci_vq_vector_unmask(proxy, index, vector, msg); 879 if (ret < 0) { 880 goto undo; 881 } 882 ++unmasked; 883 } 884 vq = virtio_vector_next_queue(vq); 885 } 886 887 return 0; 888 889 undo: 890 vq = virtio_vector_first_queue(vdev, vector); 891 while (vq && unmasked >= 0) { 892 index = virtio_get_queue_index(vq); 893 if (index < proxy->nvqs_with_notifiers) { 894 virtio_pci_vq_vector_mask(proxy, index, vector); 895 --unmasked; 896 } 897 vq = virtio_vector_next_queue(vq); 898 } 899 return ret; 900 } 901 902 static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector) 903 { 904 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 905 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 906 VirtQueue *vq = virtio_vector_first_queue(vdev, vector); 907 int index; 908 909 while (vq) { 910 index = virtio_get_queue_index(vq); 911 if (!virtio_queue_get_num(vdev, index)) { 912 break; 913 } 914 if (index < proxy->nvqs_with_notifiers) { 915 virtio_pci_vq_vector_mask(proxy, index, vector); 916 } 917 vq = virtio_vector_next_queue(vq); 918 } 919 } 920 921 static void virtio_pci_vector_poll(PCIDevice *dev, 922 unsigned int vector_start, 923 unsigned int vector_end) 924 { 925 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev); 926 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 927 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 928 int queue_no; 929 unsigned int vector; 930 EventNotifier *notifier; 931 VirtQueue *vq; 932 933 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) { 934 if (!virtio_queue_get_num(vdev, queue_no)) { 935 break; 936 } 937 vector = virtio_queue_vector(vdev, queue_no); 938 if (vector < vector_start || vector >= vector_end || 939 !msix_is_masked(dev, vector)) { 940 continue; 941 } 942 vq = virtio_get_queue(vdev, queue_no); 943 notifier = virtio_queue_get_guest_notifier(vq); 944 if (k->guest_notifier_pending) { 945 if (k->guest_notifier_pending(vdev, queue_no)) { 946 msix_set_pending(dev, vector); 947 } 948 } else if (event_notifier_test_and_clear(notifier)) { 949 msix_set_pending(dev, vector); 950 } 951 } 952 } 953 954 static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign, 955 bool with_irqfd) 956 { 957 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 958 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 959 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev); 960 VirtQueue *vq = virtio_get_queue(vdev, n); 961 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq); 962 963 if (assign) { 964 int r = event_notifier_init(notifier, 0); 965 if (r < 0) { 966 return r; 967 } 968 virtio_queue_set_guest_notifier_fd_handler(vq, true, with_irqfd); 969 } else { 970 virtio_queue_set_guest_notifier_fd_handler(vq, false, with_irqfd); 971 event_notifier_cleanup(notifier); 972 } 973 974 if (!msix_enabled(&proxy->pci_dev) && 975 vdev->use_guest_notifier_mask && 976 vdc->guest_notifier_mask) { 977 vdc->guest_notifier_mask(vdev, n, !assign); 978 } 979 980 return 0; 981 } 982 983 static bool virtio_pci_query_guest_notifiers(DeviceState *d) 984 { 985 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 986 return msix_enabled(&proxy->pci_dev); 987 } 988 989 static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign) 990 { 991 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 992 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 993 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev); 994 int r, n; 995 bool with_irqfd = msix_enabled(&proxy->pci_dev) && 996 kvm_msi_via_irqfd_enabled(); 997 998 nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX); 999 1000 /* When deassigning, pass a consistent nvqs value 1001 * to avoid leaking notifiers. 1002 */ 1003 assert(assign || nvqs == proxy->nvqs_with_notifiers); 1004 1005 proxy->nvqs_with_notifiers = nvqs; 1006 1007 /* Must unset vector notifier while guest notifier is still assigned */ 1008 if ((proxy->vector_irqfd || k->guest_notifier_mask) && !assign) { 1009 msix_unset_vector_notifiers(&proxy->pci_dev); 1010 if (proxy->vector_irqfd) { 1011 kvm_virtio_pci_vector_release(proxy, nvqs); 1012 g_free(proxy->vector_irqfd); 1013 proxy->vector_irqfd = NULL; 1014 } 1015 } 1016 1017 for (n = 0; n < nvqs; n++) { 1018 if (!virtio_queue_get_num(vdev, n)) { 1019 break; 1020 } 1021 1022 r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd); 1023 if (r < 0) { 1024 goto assign_error; 1025 } 1026 } 1027 1028 /* Must set vector notifier after guest notifier has been assigned */ 1029 if ((with_irqfd || k->guest_notifier_mask) && assign) { 1030 if (with_irqfd) { 1031 proxy->vector_irqfd = 1032 g_malloc0(sizeof(*proxy->vector_irqfd) * 1033 msix_nr_vectors_allocated(&proxy->pci_dev)); 1034 r = kvm_virtio_pci_vector_use(proxy, nvqs); 1035 if (r < 0) { 1036 goto assign_error; 1037 } 1038 } 1039 r = msix_set_vector_notifiers(&proxy->pci_dev, 1040 virtio_pci_vector_unmask, 1041 virtio_pci_vector_mask, 1042 virtio_pci_vector_poll); 1043 if (r < 0) { 1044 goto notifiers_error; 1045 } 1046 } 1047 1048 return 0; 1049 1050 notifiers_error: 1051 if (with_irqfd) { 1052 assert(assign); 1053 kvm_virtio_pci_vector_release(proxy, nvqs); 1054 } 1055 1056 assign_error: 1057 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */ 1058 assert(assign); 1059 while (--n >= 0) { 1060 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd); 1061 } 1062 return r; 1063 } 1064 1065 static void virtio_pci_vmstate_change(DeviceState *d, bool running) 1066 { 1067 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d); 1068 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1069 1070 if (running) { 1071 /* Old QEMU versions did not set bus master enable on status write. 1072 * Detect DRIVER set and enable it. 1073 */ 1074 if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) && 1075 (vdev->status & VIRTIO_CONFIG_S_DRIVER) && 1076 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) { 1077 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND, 1078 proxy->pci_dev.config[PCI_COMMAND] | 1079 PCI_COMMAND_MASTER, 1); 1080 } 1081 virtio_pci_start_ioeventfd(proxy); 1082 } else { 1083 virtio_pci_stop_ioeventfd(proxy); 1084 } 1085 } 1086 1087 #ifdef CONFIG_VIRTFS 1088 static void virtio_9p_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 1089 { 1090 V9fsPCIState *dev = VIRTIO_9P_PCI(vpci_dev); 1091 DeviceState *vdev = DEVICE(&dev->vdev); 1092 1093 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 1094 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 1095 } 1096 1097 static Property virtio_9p_pci_properties[] = { 1098 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, 1099 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), 1100 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), 1101 DEFINE_PROP_END_OF_LIST(), 1102 }; 1103 1104 static void virtio_9p_pci_class_init(ObjectClass *klass, void *data) 1105 { 1106 DeviceClass *dc = DEVICE_CLASS(klass); 1107 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 1108 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 1109 1110 k->realize = virtio_9p_pci_realize; 1111 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 1112 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_9P; 1113 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; 1114 pcidev_k->class_id = 0x2; 1115 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 1116 dc->props = virtio_9p_pci_properties; 1117 } 1118 1119 static void virtio_9p_pci_instance_init(Object *obj) 1120 { 1121 V9fsPCIState *dev = VIRTIO_9P_PCI(obj); 1122 1123 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 1124 TYPE_VIRTIO_9P); 1125 } 1126 1127 static const TypeInfo virtio_9p_pci_info = { 1128 .name = TYPE_VIRTIO_9P_PCI, 1129 .parent = TYPE_VIRTIO_PCI, 1130 .instance_size = sizeof(V9fsPCIState), 1131 .instance_init = virtio_9p_pci_instance_init, 1132 .class_init = virtio_9p_pci_class_init, 1133 }; 1134 #endif /* CONFIG_VIRTFS */ 1135 1136 /* 1137 * virtio-pci: This is the PCIDevice which has a virtio-pci-bus. 1138 */ 1139 1140 static int virtio_pci_query_nvectors(DeviceState *d) 1141 { 1142 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1143 1144 return proxy->nvectors; 1145 } 1146 1147 static AddressSpace *virtio_pci_get_dma_as(DeviceState *d) 1148 { 1149 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1150 PCIDevice *dev = &proxy->pci_dev; 1151 1152 return pci_get_address_space(dev); 1153 } 1154 1155 static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy, 1156 struct virtio_pci_cap *cap) 1157 { 1158 PCIDevice *dev = &proxy->pci_dev; 1159 int offset; 1160 1161 offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0, cap->cap_len); 1162 assert(offset > 0); 1163 1164 assert(cap->cap_len >= sizeof *cap); 1165 memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len, 1166 cap->cap_len - PCI_CAP_FLAGS); 1167 1168 return offset; 1169 } 1170 1171 static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, 1172 unsigned size) 1173 { 1174 VirtIOPCIProxy *proxy = opaque; 1175 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1176 uint32_t val = 0; 1177 int i; 1178 1179 switch (addr) { 1180 case VIRTIO_PCI_COMMON_DFSELECT: 1181 val = proxy->dfselect; 1182 break; 1183 case VIRTIO_PCI_COMMON_DF: 1184 if (proxy->dfselect <= 1) { 1185 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev); 1186 1187 val = (vdev->host_features & ~vdc->legacy_features) >> 1188 (32 * proxy->dfselect); 1189 } 1190 break; 1191 case VIRTIO_PCI_COMMON_GFSELECT: 1192 val = proxy->gfselect; 1193 break; 1194 case VIRTIO_PCI_COMMON_GF: 1195 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) { 1196 val = proxy->guest_features[proxy->gfselect]; 1197 } 1198 break; 1199 case VIRTIO_PCI_COMMON_MSIX: 1200 val = vdev->config_vector; 1201 break; 1202 case VIRTIO_PCI_COMMON_NUMQ: 1203 for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) { 1204 if (virtio_queue_get_num(vdev, i)) { 1205 val = i + 1; 1206 } 1207 } 1208 break; 1209 case VIRTIO_PCI_COMMON_STATUS: 1210 val = vdev->status; 1211 break; 1212 case VIRTIO_PCI_COMMON_CFGGENERATION: 1213 val = vdev->generation; 1214 break; 1215 case VIRTIO_PCI_COMMON_Q_SELECT: 1216 val = vdev->queue_sel; 1217 break; 1218 case VIRTIO_PCI_COMMON_Q_SIZE: 1219 val = virtio_queue_get_num(vdev, vdev->queue_sel); 1220 break; 1221 case VIRTIO_PCI_COMMON_Q_MSIX: 1222 val = virtio_queue_vector(vdev, vdev->queue_sel); 1223 break; 1224 case VIRTIO_PCI_COMMON_Q_ENABLE: 1225 val = proxy->vqs[vdev->queue_sel].enabled; 1226 break; 1227 case VIRTIO_PCI_COMMON_Q_NOFF: 1228 /* Simply map queues in order */ 1229 val = vdev->queue_sel; 1230 break; 1231 case VIRTIO_PCI_COMMON_Q_DESCLO: 1232 val = proxy->vqs[vdev->queue_sel].desc[0]; 1233 break; 1234 case VIRTIO_PCI_COMMON_Q_DESCHI: 1235 val = proxy->vqs[vdev->queue_sel].desc[1]; 1236 break; 1237 case VIRTIO_PCI_COMMON_Q_AVAILLO: 1238 val = proxy->vqs[vdev->queue_sel].avail[0]; 1239 break; 1240 case VIRTIO_PCI_COMMON_Q_AVAILHI: 1241 val = proxy->vqs[vdev->queue_sel].avail[1]; 1242 break; 1243 case VIRTIO_PCI_COMMON_Q_USEDLO: 1244 val = proxy->vqs[vdev->queue_sel].used[0]; 1245 break; 1246 case VIRTIO_PCI_COMMON_Q_USEDHI: 1247 val = proxy->vqs[vdev->queue_sel].used[1]; 1248 break; 1249 default: 1250 val = 0; 1251 } 1252 1253 return val; 1254 } 1255 1256 static void virtio_pci_common_write(void *opaque, hwaddr addr, 1257 uint64_t val, unsigned size) 1258 { 1259 VirtIOPCIProxy *proxy = opaque; 1260 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1261 1262 switch (addr) { 1263 case VIRTIO_PCI_COMMON_DFSELECT: 1264 proxy->dfselect = val; 1265 break; 1266 case VIRTIO_PCI_COMMON_GFSELECT: 1267 proxy->gfselect = val; 1268 break; 1269 case VIRTIO_PCI_COMMON_GF: 1270 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) { 1271 proxy->guest_features[proxy->gfselect] = val; 1272 virtio_set_features(vdev, 1273 (((uint64_t)proxy->guest_features[1]) << 32) | 1274 proxy->guest_features[0]); 1275 } 1276 break; 1277 case VIRTIO_PCI_COMMON_MSIX: 1278 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector); 1279 /* Make it possible for guest to discover an error took place. */ 1280 if (msix_vector_use(&proxy->pci_dev, val) < 0) { 1281 val = VIRTIO_NO_VECTOR; 1282 } 1283 vdev->config_vector = val; 1284 break; 1285 case VIRTIO_PCI_COMMON_STATUS: 1286 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) { 1287 virtio_pci_stop_ioeventfd(proxy); 1288 } 1289 1290 virtio_set_status(vdev, val & 0xFF); 1291 1292 if (val & VIRTIO_CONFIG_S_DRIVER_OK) { 1293 virtio_pci_start_ioeventfd(proxy); 1294 } 1295 1296 if (vdev->status == 0) { 1297 virtio_pci_reset(DEVICE(proxy)); 1298 } 1299 1300 break; 1301 case VIRTIO_PCI_COMMON_Q_SELECT: 1302 if (val < VIRTIO_QUEUE_MAX) { 1303 vdev->queue_sel = val; 1304 } 1305 break; 1306 case VIRTIO_PCI_COMMON_Q_SIZE: 1307 proxy->vqs[vdev->queue_sel].num = val; 1308 break; 1309 case VIRTIO_PCI_COMMON_Q_MSIX: 1310 msix_vector_unuse(&proxy->pci_dev, 1311 virtio_queue_vector(vdev, vdev->queue_sel)); 1312 /* Make it possible for guest to discover an error took place. */ 1313 if (msix_vector_use(&proxy->pci_dev, val) < 0) { 1314 val = VIRTIO_NO_VECTOR; 1315 } 1316 virtio_queue_set_vector(vdev, vdev->queue_sel, val); 1317 break; 1318 case VIRTIO_PCI_COMMON_Q_ENABLE: 1319 virtio_queue_set_num(vdev, vdev->queue_sel, 1320 proxy->vqs[vdev->queue_sel].num); 1321 virtio_queue_set_rings(vdev, vdev->queue_sel, 1322 ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 | 1323 proxy->vqs[vdev->queue_sel].desc[0], 1324 ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 | 1325 proxy->vqs[vdev->queue_sel].avail[0], 1326 ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 | 1327 proxy->vqs[vdev->queue_sel].used[0]); 1328 proxy->vqs[vdev->queue_sel].enabled = 1; 1329 break; 1330 case VIRTIO_PCI_COMMON_Q_DESCLO: 1331 proxy->vqs[vdev->queue_sel].desc[0] = val; 1332 break; 1333 case VIRTIO_PCI_COMMON_Q_DESCHI: 1334 proxy->vqs[vdev->queue_sel].desc[1] = val; 1335 break; 1336 case VIRTIO_PCI_COMMON_Q_AVAILLO: 1337 proxy->vqs[vdev->queue_sel].avail[0] = val; 1338 break; 1339 case VIRTIO_PCI_COMMON_Q_AVAILHI: 1340 proxy->vqs[vdev->queue_sel].avail[1] = val; 1341 break; 1342 case VIRTIO_PCI_COMMON_Q_USEDLO: 1343 proxy->vqs[vdev->queue_sel].used[0] = val; 1344 break; 1345 case VIRTIO_PCI_COMMON_Q_USEDHI: 1346 proxy->vqs[vdev->queue_sel].used[1] = val; 1347 break; 1348 default: 1349 break; 1350 } 1351 } 1352 1353 1354 static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr, 1355 unsigned size) 1356 { 1357 return 0; 1358 } 1359 1360 static void virtio_pci_notify_write(void *opaque, hwaddr addr, 1361 uint64_t val, unsigned size) 1362 { 1363 VirtIODevice *vdev = opaque; 1364 VirtIOPCIProxy *proxy = VIRTIO_PCI(DEVICE(vdev)->parent_bus->parent); 1365 unsigned queue = addr / virtio_pci_queue_mem_mult(proxy); 1366 1367 if (queue < VIRTIO_QUEUE_MAX) { 1368 virtio_queue_notify(vdev, queue); 1369 } 1370 } 1371 1372 static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr, 1373 uint64_t val, unsigned size) 1374 { 1375 VirtIODevice *vdev = opaque; 1376 unsigned queue = val; 1377 1378 if (queue < VIRTIO_QUEUE_MAX) { 1379 virtio_queue_notify(vdev, queue); 1380 } 1381 } 1382 1383 static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr, 1384 unsigned size) 1385 { 1386 VirtIOPCIProxy *proxy = opaque; 1387 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1388 uint64_t val = atomic_xchg(&vdev->isr, 0); 1389 pci_irq_deassert(&proxy->pci_dev); 1390 1391 return val; 1392 } 1393 1394 static void virtio_pci_isr_write(void *opaque, hwaddr addr, 1395 uint64_t val, unsigned size) 1396 { 1397 } 1398 1399 static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr, 1400 unsigned size) 1401 { 1402 VirtIODevice *vdev = opaque; 1403 uint64_t val = 0; 1404 1405 switch (size) { 1406 case 1: 1407 val = virtio_config_modern_readb(vdev, addr); 1408 break; 1409 case 2: 1410 val = virtio_config_modern_readw(vdev, addr); 1411 break; 1412 case 4: 1413 val = virtio_config_modern_readl(vdev, addr); 1414 break; 1415 } 1416 return val; 1417 } 1418 1419 static void virtio_pci_device_write(void *opaque, hwaddr addr, 1420 uint64_t val, unsigned size) 1421 { 1422 VirtIODevice *vdev = opaque; 1423 switch (size) { 1424 case 1: 1425 virtio_config_modern_writeb(vdev, addr, val); 1426 break; 1427 case 2: 1428 virtio_config_modern_writew(vdev, addr, val); 1429 break; 1430 case 4: 1431 virtio_config_modern_writel(vdev, addr, val); 1432 break; 1433 } 1434 } 1435 1436 static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy) 1437 { 1438 static const MemoryRegionOps common_ops = { 1439 .read = virtio_pci_common_read, 1440 .write = virtio_pci_common_write, 1441 .impl = { 1442 .min_access_size = 1, 1443 .max_access_size = 4, 1444 }, 1445 .endianness = DEVICE_LITTLE_ENDIAN, 1446 }; 1447 static const MemoryRegionOps isr_ops = { 1448 .read = virtio_pci_isr_read, 1449 .write = virtio_pci_isr_write, 1450 .impl = { 1451 .min_access_size = 1, 1452 .max_access_size = 4, 1453 }, 1454 .endianness = DEVICE_LITTLE_ENDIAN, 1455 }; 1456 static const MemoryRegionOps device_ops = { 1457 .read = virtio_pci_device_read, 1458 .write = virtio_pci_device_write, 1459 .impl = { 1460 .min_access_size = 1, 1461 .max_access_size = 4, 1462 }, 1463 .endianness = DEVICE_LITTLE_ENDIAN, 1464 }; 1465 static const MemoryRegionOps notify_ops = { 1466 .read = virtio_pci_notify_read, 1467 .write = virtio_pci_notify_write, 1468 .impl = { 1469 .min_access_size = 1, 1470 .max_access_size = 4, 1471 }, 1472 .endianness = DEVICE_LITTLE_ENDIAN, 1473 }; 1474 static const MemoryRegionOps notify_pio_ops = { 1475 .read = virtio_pci_notify_read, 1476 .write = virtio_pci_notify_write_pio, 1477 .impl = { 1478 .min_access_size = 1, 1479 .max_access_size = 4, 1480 }, 1481 .endianness = DEVICE_LITTLE_ENDIAN, 1482 }; 1483 1484 1485 memory_region_init_io(&proxy->common.mr, OBJECT(proxy), 1486 &common_ops, 1487 proxy, 1488 "virtio-pci-common", 1489 proxy->common.size); 1490 1491 memory_region_init_io(&proxy->isr.mr, OBJECT(proxy), 1492 &isr_ops, 1493 proxy, 1494 "virtio-pci-isr", 1495 proxy->isr.size); 1496 1497 memory_region_init_io(&proxy->device.mr, OBJECT(proxy), 1498 &device_ops, 1499 virtio_bus_get_device(&proxy->bus), 1500 "virtio-pci-device", 1501 proxy->device.size); 1502 1503 memory_region_init_io(&proxy->notify.mr, OBJECT(proxy), 1504 ¬ify_ops, 1505 virtio_bus_get_device(&proxy->bus), 1506 "virtio-pci-notify", 1507 proxy->notify.size); 1508 1509 memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy), 1510 ¬ify_pio_ops, 1511 virtio_bus_get_device(&proxy->bus), 1512 "virtio-pci-notify-pio", 1513 proxy->notify_pio.size); 1514 } 1515 1516 static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy, 1517 VirtIOPCIRegion *region, 1518 struct virtio_pci_cap *cap, 1519 MemoryRegion *mr, 1520 uint8_t bar) 1521 { 1522 memory_region_add_subregion(mr, region->offset, ®ion->mr); 1523 1524 cap->cfg_type = region->type; 1525 cap->bar = bar; 1526 cap->offset = cpu_to_le32(region->offset); 1527 cap->length = cpu_to_le32(region->size); 1528 virtio_pci_add_mem_cap(proxy, cap); 1529 1530 } 1531 1532 static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy, 1533 VirtIOPCIRegion *region, 1534 struct virtio_pci_cap *cap) 1535 { 1536 virtio_pci_modern_region_map(proxy, region, cap, 1537 &proxy->modern_bar, proxy->modern_mem_bar_idx); 1538 } 1539 1540 static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy, 1541 VirtIOPCIRegion *region, 1542 struct virtio_pci_cap *cap) 1543 { 1544 virtio_pci_modern_region_map(proxy, region, cap, 1545 &proxy->io_bar, proxy->modern_io_bar_idx); 1546 } 1547 1548 static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy, 1549 VirtIOPCIRegion *region) 1550 { 1551 memory_region_del_subregion(&proxy->modern_bar, 1552 ®ion->mr); 1553 } 1554 1555 static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy, 1556 VirtIOPCIRegion *region) 1557 { 1558 memory_region_del_subregion(&proxy->io_bar, 1559 ®ion->mr); 1560 } 1561 1562 static void virtio_pci_pre_plugged(DeviceState *d, Error **errp) 1563 { 1564 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1565 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1566 1567 if (virtio_pci_modern(proxy)) { 1568 virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1); 1569 } 1570 1571 virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE); 1572 } 1573 1574 /* This is called by virtio-bus just after the device is plugged. */ 1575 static void virtio_pci_device_plugged(DeviceState *d, Error **errp) 1576 { 1577 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1578 VirtioBusState *bus = &proxy->bus; 1579 bool legacy = virtio_pci_legacy(proxy); 1580 bool modern; 1581 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 1582 uint8_t *config; 1583 uint32_t size; 1584 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); 1585 1586 /* 1587 * Virtio capabilities present without 1588 * VIRTIO_F_VERSION_1 confuses guests 1589 */ 1590 if (!proxy->ignore_backend_features && 1591 !virtio_has_feature(vdev->host_features, VIRTIO_F_VERSION_1)) { 1592 virtio_pci_disable_modern(proxy); 1593 1594 if (!legacy) { 1595 error_setg(errp, "Device doesn't support modern mode, and legacy" 1596 " mode is disabled"); 1597 error_append_hint(errp, "Set disable-legacy to off\n"); 1598 1599 return; 1600 } 1601 } 1602 1603 modern = virtio_pci_modern(proxy); 1604 1605 config = proxy->pci_dev.config; 1606 if (proxy->class_code) { 1607 pci_config_set_class(config, proxy->class_code); 1608 } 1609 1610 if (legacy) { 1611 if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM)) { 1612 error_setg(errp, "VIRTIO_F_IOMMU_PLATFORM was supported by" 1613 "neither legacy nor transitional device."); 1614 return ; 1615 } 1616 /* legacy and transitional */ 1617 pci_set_word(config + PCI_SUBSYSTEM_VENDOR_ID, 1618 pci_get_word(config + PCI_VENDOR_ID)); 1619 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus)); 1620 } else { 1621 /* pure virtio-1.0 */ 1622 pci_set_word(config + PCI_VENDOR_ID, 1623 PCI_VENDOR_ID_REDHAT_QUMRANET); 1624 pci_set_word(config + PCI_DEVICE_ID, 1625 0x1040 + virtio_bus_get_vdev_id(bus)); 1626 pci_config_set_revision(config, 1); 1627 } 1628 config[PCI_INTERRUPT_PIN] = 1; 1629 1630 1631 if (modern) { 1632 struct virtio_pci_cap cap = { 1633 .cap_len = sizeof cap, 1634 }; 1635 struct virtio_pci_notify_cap notify = { 1636 .cap.cap_len = sizeof notify, 1637 .notify_off_multiplier = 1638 cpu_to_le32(virtio_pci_queue_mem_mult(proxy)), 1639 }; 1640 struct virtio_pci_cfg_cap cfg = { 1641 .cap.cap_len = sizeof cfg, 1642 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG, 1643 }; 1644 struct virtio_pci_notify_cap notify_pio = { 1645 .cap.cap_len = sizeof notify, 1646 .notify_off_multiplier = cpu_to_le32(0x0), 1647 }; 1648 1649 struct virtio_pci_cfg_cap *cfg_mask; 1650 1651 virtio_pci_modern_regions_init(proxy); 1652 1653 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap); 1654 virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap); 1655 virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap); 1656 virtio_pci_modern_mem_region_map(proxy, &proxy->notify, ¬ify.cap); 1657 1658 if (modern_pio) { 1659 memory_region_init(&proxy->io_bar, OBJECT(proxy), 1660 "virtio-pci-io", 0x4); 1661 1662 pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar_idx, 1663 PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar); 1664 1665 virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio, 1666 ¬ify_pio.cap); 1667 } 1668 1669 pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar_idx, 1670 PCI_BASE_ADDRESS_SPACE_MEMORY | 1671 PCI_BASE_ADDRESS_MEM_PREFETCH | 1672 PCI_BASE_ADDRESS_MEM_TYPE_64, 1673 &proxy->modern_bar); 1674 1675 proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap); 1676 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap); 1677 pci_set_byte(&cfg_mask->cap.bar, ~0x0); 1678 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0); 1679 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0); 1680 pci_set_long(cfg_mask->pci_cfg_data, ~0x0); 1681 } 1682 1683 if (proxy->nvectors) { 1684 int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors, 1685 proxy->msix_bar_idx); 1686 if (err) { 1687 /* Notice when a system that supports MSIx can't initialize it. */ 1688 if (err != -ENOTSUP) { 1689 error_report("unable to init msix vectors to %" PRIu32, 1690 proxy->nvectors); 1691 } 1692 proxy->nvectors = 0; 1693 } 1694 } 1695 1696 proxy->pci_dev.config_write = virtio_write_config; 1697 proxy->pci_dev.config_read = virtio_read_config; 1698 1699 if (legacy) { 1700 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) 1701 + virtio_bus_get_vdev_config_len(bus); 1702 size = pow2ceil(size); 1703 1704 memory_region_init_io(&proxy->bar, OBJECT(proxy), 1705 &virtio_pci_config_ops, 1706 proxy, "virtio-pci", size); 1707 1708 pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar_idx, 1709 PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar); 1710 } 1711 } 1712 1713 static void virtio_pci_device_unplugged(DeviceState *d) 1714 { 1715 VirtIOPCIProxy *proxy = VIRTIO_PCI(d); 1716 bool modern = virtio_pci_modern(proxy); 1717 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY; 1718 1719 virtio_pci_stop_ioeventfd(proxy); 1720 1721 if (modern) { 1722 virtio_pci_modern_mem_region_unmap(proxy, &proxy->common); 1723 virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr); 1724 virtio_pci_modern_mem_region_unmap(proxy, &proxy->device); 1725 virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify); 1726 if (modern_pio) { 1727 virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio); 1728 } 1729 } 1730 } 1731 1732 static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) 1733 { 1734 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 1735 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev); 1736 bool pcie_port = pci_bus_is_express(pci_dev->bus) && 1737 !pci_bus_is_root(pci_dev->bus); 1738 1739 if (!kvm_has_many_ioeventfds()) { 1740 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD; 1741 } 1742 1743 /* 1744 * virtio pci bar layout used by default. 1745 * subclasses can re-arrange things if needed. 1746 * 1747 * region 0 -- virtio legacy io bar 1748 * region 1 -- msi-x bar 1749 * region 4+5 -- virtio modern memory (64bit) bar 1750 * 1751 */ 1752 proxy->legacy_io_bar_idx = 0; 1753 proxy->msix_bar_idx = 1; 1754 proxy->modern_io_bar_idx = 2; 1755 proxy->modern_mem_bar_idx = 4; 1756 1757 proxy->common.offset = 0x0; 1758 proxy->common.size = 0x1000; 1759 proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG; 1760 1761 proxy->isr.offset = 0x1000; 1762 proxy->isr.size = 0x1000; 1763 proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG; 1764 1765 proxy->device.offset = 0x2000; 1766 proxy->device.size = 0x1000; 1767 proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG; 1768 1769 proxy->notify.offset = 0x3000; 1770 proxy->notify.size = virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE_MAX; 1771 proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG; 1772 1773 proxy->notify_pio.offset = 0x0; 1774 proxy->notify_pio.size = 0x4; 1775 proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG; 1776 1777 /* subclasses can enforce modern, so do this unconditionally */ 1778 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci", 1779 /* PCI BAR regions must be powers of 2 */ 1780 pow2ceil(proxy->notify.offset + proxy->notify.size)); 1781 1782 memory_region_init_alias(&proxy->modern_cfg, 1783 OBJECT(proxy), 1784 "virtio-pci-cfg", 1785 &proxy->modern_bar, 1786 0, 1787 memory_region_size(&proxy->modern_bar)); 1788 1789 address_space_init(&proxy->modern_as, &proxy->modern_cfg, "virtio-pci-cfg-as"); 1790 1791 if (proxy->disable_legacy == ON_OFF_AUTO_AUTO) { 1792 proxy->disable_legacy = pcie_port ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; 1793 } 1794 1795 if (!virtio_pci_modern(proxy) && !virtio_pci_legacy(proxy)) { 1796 error_setg(errp, "device cannot work as neither modern nor legacy mode" 1797 " is enabled"); 1798 error_append_hint(errp, "Set either disable-modern or disable-legacy" 1799 " to off\n"); 1800 return; 1801 } 1802 1803 if (pcie_port && pci_is_express(pci_dev)) { 1804 int pos; 1805 1806 pos = pcie_endpoint_cap_init(pci_dev, 0); 1807 assert(pos > 0); 1808 1809 pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF); 1810 assert(pos > 0); 1811 1812 /* 1813 * Indicates that this function complies with revision 1.2 of the 1814 * PCI Power Management Interface Specification. 1815 */ 1816 pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3); 1817 1818 if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { 1819 pcie_ats_init(pci_dev, 256); 1820 } 1821 1822 } else { 1823 /* 1824 * make future invocations of pci_is_express() return false 1825 * and pci_config_size() return PCI_CONFIG_SPACE_SIZE. 1826 */ 1827 pci_dev->cap_present &= ~QEMU_PCI_CAP_EXPRESS; 1828 } 1829 1830 virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy); 1831 if (k->realize) { 1832 k->realize(proxy, errp); 1833 } 1834 } 1835 1836 static void virtio_pci_exit(PCIDevice *pci_dev) 1837 { 1838 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); 1839 1840 msix_uninit_exclusive_bar(pci_dev); 1841 address_space_destroy(&proxy->modern_as); 1842 } 1843 1844 static void virtio_pci_reset(DeviceState *qdev) 1845 { 1846 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); 1847 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus); 1848 int i; 1849 1850 virtio_pci_stop_ioeventfd(proxy); 1851 virtio_bus_reset(bus); 1852 msix_unuse_all_vectors(&proxy->pci_dev); 1853 1854 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { 1855 proxy->vqs[i].enabled = 0; 1856 } 1857 } 1858 1859 static Property virtio_pci_properties[] = { 1860 DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags, 1861 VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false), 1862 DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy, 1863 ON_OFF_AUTO_AUTO), 1864 DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false), 1865 DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags, 1866 VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true), 1867 DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags, 1868 VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false), 1869 DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags, 1870 VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false), 1871 DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags, 1872 VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false), 1873 DEFINE_PROP_BOOL("x-ignore-backend-features", VirtIOPCIProxy, 1874 ignore_backend_features, false), 1875 DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags, 1876 VIRTIO_PCI_FLAG_ATS_BIT, false), 1877 DEFINE_PROP_END_OF_LIST(), 1878 }; 1879 1880 static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp) 1881 { 1882 VirtioPCIClass *vpciklass = VIRTIO_PCI_GET_CLASS(qdev); 1883 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); 1884 PCIDevice *pci_dev = &proxy->pci_dev; 1885 1886 if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) && 1887 virtio_pci_modern(proxy)) { 1888 pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; 1889 } 1890 1891 vpciklass->parent_dc_realize(qdev, errp); 1892 } 1893 1894 static void virtio_pci_class_init(ObjectClass *klass, void *data) 1895 { 1896 DeviceClass *dc = DEVICE_CLASS(klass); 1897 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1898 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass); 1899 1900 dc->props = virtio_pci_properties; 1901 k->realize = virtio_pci_realize; 1902 k->exit = virtio_pci_exit; 1903 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 1904 k->revision = VIRTIO_PCI_ABI_VERSION; 1905 k->class_id = PCI_CLASS_OTHERS; 1906 vpciklass->parent_dc_realize = dc->realize; 1907 dc->realize = virtio_pci_dc_realize; 1908 dc->reset = virtio_pci_reset; 1909 } 1910 1911 static const TypeInfo virtio_pci_info = { 1912 .name = TYPE_VIRTIO_PCI, 1913 .parent = TYPE_PCI_DEVICE, 1914 .instance_size = sizeof(VirtIOPCIProxy), 1915 .class_init = virtio_pci_class_init, 1916 .class_size = sizeof(VirtioPCIClass), 1917 .abstract = true, 1918 }; 1919 1920 /* virtio-blk-pci */ 1921 1922 static Property virtio_blk_pci_properties[] = { 1923 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), 1924 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, 1925 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), 1926 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), 1927 DEFINE_PROP_END_OF_LIST(), 1928 }; 1929 1930 static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 1931 { 1932 VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(vpci_dev); 1933 DeviceState *vdev = DEVICE(&dev->vdev); 1934 1935 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 1936 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 1937 } 1938 1939 static void virtio_blk_pci_class_init(ObjectClass *klass, void *data) 1940 { 1941 DeviceClass *dc = DEVICE_CLASS(klass); 1942 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 1943 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 1944 1945 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 1946 dc->props = virtio_blk_pci_properties; 1947 k->realize = virtio_blk_pci_realize; 1948 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 1949 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BLOCK; 1950 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; 1951 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI; 1952 } 1953 1954 static void virtio_blk_pci_instance_init(Object *obj) 1955 { 1956 VirtIOBlkPCI *dev = VIRTIO_BLK_PCI(obj); 1957 1958 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 1959 TYPE_VIRTIO_BLK); 1960 object_property_add_alias(obj, "iothread", OBJECT(&dev->vdev),"iothread", 1961 &error_abort); 1962 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev), 1963 "bootindex", &error_abort); 1964 } 1965 1966 static const TypeInfo virtio_blk_pci_info = { 1967 .name = TYPE_VIRTIO_BLK_PCI, 1968 .parent = TYPE_VIRTIO_PCI, 1969 .instance_size = sizeof(VirtIOBlkPCI), 1970 .instance_init = virtio_blk_pci_instance_init, 1971 .class_init = virtio_blk_pci_class_init, 1972 }; 1973 1974 /* virtio-scsi-pci */ 1975 1976 static Property virtio_scsi_pci_properties[] = { 1977 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, 1978 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), 1979 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 1980 DEV_NVECTORS_UNSPECIFIED), 1981 DEFINE_PROP_END_OF_LIST(), 1982 }; 1983 1984 static void virtio_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 1985 { 1986 VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(vpci_dev); 1987 DeviceState *vdev = DEVICE(&dev->vdev); 1988 VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(vdev); 1989 DeviceState *proxy = DEVICE(vpci_dev); 1990 char *bus_name; 1991 1992 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) { 1993 vpci_dev->nvectors = vs->conf.num_queues + 3; 1994 } 1995 1996 /* 1997 * For command line compatibility, this sets the virtio-scsi-device bus 1998 * name as before. 1999 */ 2000 if (proxy->id) { 2001 bus_name = g_strdup_printf("%s.0", proxy->id); 2002 virtio_device_set_child_bus_name(VIRTIO_DEVICE(vdev), bus_name); 2003 g_free(bus_name); 2004 } 2005 2006 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 2007 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 2008 } 2009 2010 static void virtio_scsi_pci_class_init(ObjectClass *klass, void *data) 2011 { 2012 DeviceClass *dc = DEVICE_CLASS(klass); 2013 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 2014 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2015 2016 k->realize = virtio_scsi_pci_realize; 2017 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 2018 dc->props = virtio_scsi_pci_properties; 2019 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 2020 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_SCSI; 2021 pcidev_k->revision = 0x00; 2022 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI; 2023 } 2024 2025 static void virtio_scsi_pci_instance_init(Object *obj) 2026 { 2027 VirtIOSCSIPCI *dev = VIRTIO_SCSI_PCI(obj); 2028 2029 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2030 TYPE_VIRTIO_SCSI); 2031 object_property_add_alias(obj, "iothread", OBJECT(&dev->vdev), "iothread", 2032 &error_abort); 2033 } 2034 2035 static const TypeInfo virtio_scsi_pci_info = { 2036 .name = TYPE_VIRTIO_SCSI_PCI, 2037 .parent = TYPE_VIRTIO_PCI, 2038 .instance_size = sizeof(VirtIOSCSIPCI), 2039 .instance_init = virtio_scsi_pci_instance_init, 2040 .class_init = virtio_scsi_pci_class_init, 2041 }; 2042 2043 /* vhost-scsi-pci */ 2044 2045 #ifdef CONFIG_VHOST_SCSI 2046 static Property vhost_scsi_pci_properties[] = { 2047 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2048 DEV_NVECTORS_UNSPECIFIED), 2049 DEFINE_PROP_END_OF_LIST(), 2050 }; 2051 2052 static void vhost_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 2053 { 2054 VHostSCSIPCI *dev = VHOST_SCSI_PCI(vpci_dev); 2055 DeviceState *vdev = DEVICE(&dev->vdev); 2056 VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(vdev); 2057 2058 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) { 2059 vpci_dev->nvectors = vs->conf.num_queues + 3; 2060 } 2061 2062 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 2063 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 2064 } 2065 2066 static void vhost_scsi_pci_class_init(ObjectClass *klass, void *data) 2067 { 2068 DeviceClass *dc = DEVICE_CLASS(klass); 2069 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 2070 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2071 k->realize = vhost_scsi_pci_realize; 2072 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 2073 dc->props = vhost_scsi_pci_properties; 2074 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 2075 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_SCSI; 2076 pcidev_k->revision = 0x00; 2077 pcidev_k->class_id = PCI_CLASS_STORAGE_SCSI; 2078 } 2079 2080 static void vhost_scsi_pci_instance_init(Object *obj) 2081 { 2082 VHostSCSIPCI *dev = VHOST_SCSI_PCI(obj); 2083 2084 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2085 TYPE_VHOST_SCSI); 2086 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev), 2087 "bootindex", &error_abort); 2088 } 2089 2090 static const TypeInfo vhost_scsi_pci_info = { 2091 .name = TYPE_VHOST_SCSI_PCI, 2092 .parent = TYPE_VIRTIO_PCI, 2093 .instance_size = sizeof(VHostSCSIPCI), 2094 .instance_init = vhost_scsi_pci_instance_init, 2095 .class_init = vhost_scsi_pci_class_init, 2096 }; 2097 #endif 2098 2099 /* vhost-vsock-pci */ 2100 2101 #ifdef CONFIG_VHOST_VSOCK 2102 static Property vhost_vsock_pci_properties[] = { 2103 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3), 2104 DEFINE_PROP_END_OF_LIST(), 2105 }; 2106 2107 static void vhost_vsock_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 2108 { 2109 VHostVSockPCI *dev = VHOST_VSOCK_PCI(vpci_dev); 2110 DeviceState *vdev = DEVICE(&dev->vdev); 2111 2112 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 2113 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 2114 } 2115 2116 static void vhost_vsock_pci_class_init(ObjectClass *klass, void *data) 2117 { 2118 DeviceClass *dc = DEVICE_CLASS(klass); 2119 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 2120 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2121 k->realize = vhost_vsock_pci_realize; 2122 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 2123 dc->props = vhost_vsock_pci_properties; 2124 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 2125 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_VSOCK; 2126 pcidev_k->revision = 0x00; 2127 pcidev_k->class_id = PCI_CLASS_COMMUNICATION_OTHER; 2128 } 2129 2130 static void vhost_vsock_pci_instance_init(Object *obj) 2131 { 2132 VHostVSockPCI *dev = VHOST_VSOCK_PCI(obj); 2133 2134 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2135 TYPE_VHOST_VSOCK); 2136 } 2137 2138 static const TypeInfo vhost_vsock_pci_info = { 2139 .name = TYPE_VHOST_VSOCK_PCI, 2140 .parent = TYPE_VIRTIO_PCI, 2141 .instance_size = sizeof(VHostVSockPCI), 2142 .instance_init = vhost_vsock_pci_instance_init, 2143 .class_init = vhost_vsock_pci_class_init, 2144 }; 2145 #endif 2146 2147 /* virtio-balloon-pci */ 2148 2149 static Property virtio_balloon_pci_properties[] = { 2150 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), 2151 DEFINE_PROP_END_OF_LIST(), 2152 }; 2153 2154 static void virtio_balloon_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 2155 { 2156 VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(vpci_dev); 2157 DeviceState *vdev = DEVICE(&dev->vdev); 2158 2159 if (vpci_dev->class_code != PCI_CLASS_OTHERS && 2160 vpci_dev->class_code != PCI_CLASS_MEMORY_RAM) { /* qemu < 1.1 */ 2161 vpci_dev->class_code = PCI_CLASS_OTHERS; 2162 } 2163 2164 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 2165 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 2166 } 2167 2168 static void virtio_balloon_pci_class_init(ObjectClass *klass, void *data) 2169 { 2170 DeviceClass *dc = DEVICE_CLASS(klass); 2171 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 2172 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2173 k->realize = virtio_balloon_pci_realize; 2174 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 2175 dc->props = virtio_balloon_pci_properties; 2176 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 2177 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_BALLOON; 2178 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; 2179 pcidev_k->class_id = PCI_CLASS_OTHERS; 2180 } 2181 2182 static void virtio_balloon_pci_instance_init(Object *obj) 2183 { 2184 VirtIOBalloonPCI *dev = VIRTIO_BALLOON_PCI(obj); 2185 2186 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2187 TYPE_VIRTIO_BALLOON); 2188 object_property_add_alias(obj, "guest-stats", OBJECT(&dev->vdev), 2189 "guest-stats", &error_abort); 2190 object_property_add_alias(obj, "guest-stats-polling-interval", 2191 OBJECT(&dev->vdev), 2192 "guest-stats-polling-interval", &error_abort); 2193 } 2194 2195 static const TypeInfo virtio_balloon_pci_info = { 2196 .name = TYPE_VIRTIO_BALLOON_PCI, 2197 .parent = TYPE_VIRTIO_PCI, 2198 .instance_size = sizeof(VirtIOBalloonPCI), 2199 .instance_init = virtio_balloon_pci_instance_init, 2200 .class_init = virtio_balloon_pci_class_init, 2201 }; 2202 2203 /* virtio-serial-pci */ 2204 2205 static void virtio_serial_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 2206 { 2207 VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(vpci_dev); 2208 DeviceState *vdev = DEVICE(&dev->vdev); 2209 DeviceState *proxy = DEVICE(vpci_dev); 2210 char *bus_name; 2211 2212 if (vpci_dev->class_code != PCI_CLASS_COMMUNICATION_OTHER && 2213 vpci_dev->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */ 2214 vpci_dev->class_code != PCI_CLASS_OTHERS) { /* qemu-kvm */ 2215 vpci_dev->class_code = PCI_CLASS_COMMUNICATION_OTHER; 2216 } 2217 2218 /* backwards-compatibility with machines that were created with 2219 DEV_NVECTORS_UNSPECIFIED */ 2220 if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) { 2221 vpci_dev->nvectors = dev->vdev.serial.max_virtserial_ports + 1; 2222 } 2223 2224 /* 2225 * For command line compatibility, this sets the virtio-serial-device bus 2226 * name as before. 2227 */ 2228 if (proxy->id) { 2229 bus_name = g_strdup_printf("%s.0", proxy->id); 2230 virtio_device_set_child_bus_name(VIRTIO_DEVICE(vdev), bus_name); 2231 g_free(bus_name); 2232 } 2233 2234 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 2235 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 2236 } 2237 2238 static Property virtio_serial_pci_properties[] = { 2239 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, 2240 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), 2241 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), 2242 DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0), 2243 DEFINE_PROP_END_OF_LIST(), 2244 }; 2245 2246 static void virtio_serial_pci_class_init(ObjectClass *klass, void *data) 2247 { 2248 DeviceClass *dc = DEVICE_CLASS(klass); 2249 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 2250 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2251 k->realize = virtio_serial_pci_realize; 2252 set_bit(DEVICE_CATEGORY_INPUT, dc->categories); 2253 dc->props = virtio_serial_pci_properties; 2254 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 2255 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_CONSOLE; 2256 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; 2257 pcidev_k->class_id = PCI_CLASS_COMMUNICATION_OTHER; 2258 } 2259 2260 static void virtio_serial_pci_instance_init(Object *obj) 2261 { 2262 VirtIOSerialPCI *dev = VIRTIO_SERIAL_PCI(obj); 2263 2264 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2265 TYPE_VIRTIO_SERIAL); 2266 } 2267 2268 static const TypeInfo virtio_serial_pci_info = { 2269 .name = TYPE_VIRTIO_SERIAL_PCI, 2270 .parent = TYPE_VIRTIO_PCI, 2271 .instance_size = sizeof(VirtIOSerialPCI), 2272 .instance_init = virtio_serial_pci_instance_init, 2273 .class_init = virtio_serial_pci_class_init, 2274 }; 2275 2276 /* virtio-net-pci */ 2277 2278 static Property virtio_net_properties[] = { 2279 DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags, 2280 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true), 2281 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3), 2282 DEFINE_PROP_END_OF_LIST(), 2283 }; 2284 2285 static void virtio_net_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 2286 { 2287 DeviceState *qdev = DEVICE(vpci_dev); 2288 VirtIONetPCI *dev = VIRTIO_NET_PCI(vpci_dev); 2289 DeviceState *vdev = DEVICE(&dev->vdev); 2290 2291 virtio_net_set_netclient_name(&dev->vdev, qdev->id, 2292 object_get_typename(OBJECT(qdev))); 2293 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 2294 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 2295 } 2296 2297 static void virtio_net_pci_class_init(ObjectClass *klass, void *data) 2298 { 2299 DeviceClass *dc = DEVICE_CLASS(klass); 2300 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 2301 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass); 2302 2303 k->romfile = "efi-virtio.rom"; 2304 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 2305 k->device_id = PCI_DEVICE_ID_VIRTIO_NET; 2306 k->revision = VIRTIO_PCI_ABI_VERSION; 2307 k->class_id = PCI_CLASS_NETWORK_ETHERNET; 2308 set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); 2309 dc->props = virtio_net_properties; 2310 vpciklass->realize = virtio_net_pci_realize; 2311 } 2312 2313 static void virtio_net_pci_instance_init(Object *obj) 2314 { 2315 VirtIONetPCI *dev = VIRTIO_NET_PCI(obj); 2316 2317 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2318 TYPE_VIRTIO_NET); 2319 object_property_add_alias(obj, "bootindex", OBJECT(&dev->vdev), 2320 "bootindex", &error_abort); 2321 } 2322 2323 static const TypeInfo virtio_net_pci_info = { 2324 .name = TYPE_VIRTIO_NET_PCI, 2325 .parent = TYPE_VIRTIO_PCI, 2326 .instance_size = sizeof(VirtIONetPCI), 2327 .instance_init = virtio_net_pci_instance_init, 2328 .class_init = virtio_net_pci_class_init, 2329 }; 2330 2331 /* virtio-rng-pci */ 2332 2333 static void virtio_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 2334 { 2335 VirtIORngPCI *vrng = VIRTIO_RNG_PCI(vpci_dev); 2336 DeviceState *vdev = DEVICE(&vrng->vdev); 2337 Error *err = NULL; 2338 2339 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 2340 object_property_set_bool(OBJECT(vdev), true, "realized", &err); 2341 if (err) { 2342 error_propagate(errp, err); 2343 return; 2344 } 2345 2346 object_property_set_link(OBJECT(vrng), 2347 OBJECT(vrng->vdev.conf.rng), "rng", 2348 NULL); 2349 } 2350 2351 static void virtio_rng_pci_class_init(ObjectClass *klass, void *data) 2352 { 2353 DeviceClass *dc = DEVICE_CLASS(klass); 2354 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 2355 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2356 2357 k->realize = virtio_rng_pci_realize; 2358 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 2359 2360 pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET; 2361 pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_RNG; 2362 pcidev_k->revision = VIRTIO_PCI_ABI_VERSION; 2363 pcidev_k->class_id = PCI_CLASS_OTHERS; 2364 } 2365 2366 static void virtio_rng_initfn(Object *obj) 2367 { 2368 VirtIORngPCI *dev = VIRTIO_RNG_PCI(obj); 2369 2370 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2371 TYPE_VIRTIO_RNG); 2372 object_property_add_alias(obj, "rng", OBJECT(&dev->vdev), "rng", 2373 &error_abort); 2374 } 2375 2376 static const TypeInfo virtio_rng_pci_info = { 2377 .name = TYPE_VIRTIO_RNG_PCI, 2378 .parent = TYPE_VIRTIO_PCI, 2379 .instance_size = sizeof(VirtIORngPCI), 2380 .instance_init = virtio_rng_initfn, 2381 .class_init = virtio_rng_pci_class_init, 2382 }; 2383 2384 /* virtio-input-pci */ 2385 2386 static Property virtio_input_pci_properties[] = { 2387 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2), 2388 DEFINE_PROP_END_OF_LIST(), 2389 }; 2390 2391 static void virtio_input_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 2392 { 2393 VirtIOInputPCI *vinput = VIRTIO_INPUT_PCI(vpci_dev); 2394 DeviceState *vdev = DEVICE(&vinput->vdev); 2395 2396 qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus)); 2397 virtio_pci_force_virtio_1(vpci_dev); 2398 object_property_set_bool(OBJECT(vdev), true, "realized", errp); 2399 } 2400 2401 static void virtio_input_pci_class_init(ObjectClass *klass, void *data) 2402 { 2403 DeviceClass *dc = DEVICE_CLASS(klass); 2404 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 2405 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2406 2407 dc->props = virtio_input_pci_properties; 2408 k->realize = virtio_input_pci_realize; 2409 set_bit(DEVICE_CATEGORY_INPUT, dc->categories); 2410 2411 pcidev_k->class_id = PCI_CLASS_INPUT_OTHER; 2412 } 2413 2414 static void virtio_input_hid_kbd_pci_class_init(ObjectClass *klass, void *data) 2415 { 2416 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2417 2418 pcidev_k->class_id = PCI_CLASS_INPUT_KEYBOARD; 2419 } 2420 2421 static void virtio_input_hid_mouse_pci_class_init(ObjectClass *klass, 2422 void *data) 2423 { 2424 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 2425 2426 pcidev_k->class_id = PCI_CLASS_INPUT_MOUSE; 2427 } 2428 2429 static void virtio_keyboard_initfn(Object *obj) 2430 { 2431 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj); 2432 2433 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2434 TYPE_VIRTIO_KEYBOARD); 2435 } 2436 2437 static void virtio_mouse_initfn(Object *obj) 2438 { 2439 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj); 2440 2441 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2442 TYPE_VIRTIO_MOUSE); 2443 } 2444 2445 static void virtio_tablet_initfn(Object *obj) 2446 { 2447 VirtIOInputHIDPCI *dev = VIRTIO_INPUT_HID_PCI(obj); 2448 2449 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2450 TYPE_VIRTIO_TABLET); 2451 } 2452 2453 static const TypeInfo virtio_input_pci_info = { 2454 .name = TYPE_VIRTIO_INPUT_PCI, 2455 .parent = TYPE_VIRTIO_PCI, 2456 .instance_size = sizeof(VirtIOInputPCI), 2457 .class_init = virtio_input_pci_class_init, 2458 .abstract = true, 2459 }; 2460 2461 static const TypeInfo virtio_input_hid_pci_info = { 2462 .name = TYPE_VIRTIO_INPUT_HID_PCI, 2463 .parent = TYPE_VIRTIO_INPUT_PCI, 2464 .instance_size = sizeof(VirtIOInputHIDPCI), 2465 .abstract = true, 2466 }; 2467 2468 static const TypeInfo virtio_keyboard_pci_info = { 2469 .name = TYPE_VIRTIO_KEYBOARD_PCI, 2470 .parent = TYPE_VIRTIO_INPUT_HID_PCI, 2471 .class_init = virtio_input_hid_kbd_pci_class_init, 2472 .instance_size = sizeof(VirtIOInputHIDPCI), 2473 .instance_init = virtio_keyboard_initfn, 2474 }; 2475 2476 static const TypeInfo virtio_mouse_pci_info = { 2477 .name = TYPE_VIRTIO_MOUSE_PCI, 2478 .parent = TYPE_VIRTIO_INPUT_HID_PCI, 2479 .class_init = virtio_input_hid_mouse_pci_class_init, 2480 .instance_size = sizeof(VirtIOInputHIDPCI), 2481 .instance_init = virtio_mouse_initfn, 2482 }; 2483 2484 static const TypeInfo virtio_tablet_pci_info = { 2485 .name = TYPE_VIRTIO_TABLET_PCI, 2486 .parent = TYPE_VIRTIO_INPUT_HID_PCI, 2487 .instance_size = sizeof(VirtIOInputHIDPCI), 2488 .instance_init = virtio_tablet_initfn, 2489 }; 2490 2491 #ifdef CONFIG_LINUX 2492 static void virtio_host_initfn(Object *obj) 2493 { 2494 VirtIOInputHostPCI *dev = VIRTIO_INPUT_HOST_PCI(obj); 2495 2496 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 2497 TYPE_VIRTIO_INPUT_HOST); 2498 } 2499 2500 static const TypeInfo virtio_host_pci_info = { 2501 .name = TYPE_VIRTIO_INPUT_HOST_PCI, 2502 .parent = TYPE_VIRTIO_INPUT_PCI, 2503 .instance_size = sizeof(VirtIOInputHostPCI), 2504 .instance_init = virtio_host_initfn, 2505 }; 2506 #endif 2507 2508 /* virtio-pci-bus */ 2509 2510 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size, 2511 VirtIOPCIProxy *dev) 2512 { 2513 DeviceState *qdev = DEVICE(dev); 2514 char virtio_bus_name[] = "virtio-bus"; 2515 2516 qbus_create_inplace(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev, 2517 virtio_bus_name); 2518 } 2519 2520 static void virtio_pci_bus_class_init(ObjectClass *klass, void *data) 2521 { 2522 BusClass *bus_class = BUS_CLASS(klass); 2523 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass); 2524 bus_class->max_dev = 1; 2525 k->notify = virtio_pci_notify; 2526 k->save_config = virtio_pci_save_config; 2527 k->load_config = virtio_pci_load_config; 2528 k->save_queue = virtio_pci_save_queue; 2529 k->load_queue = virtio_pci_load_queue; 2530 k->save_extra_state = virtio_pci_save_extra_state; 2531 k->load_extra_state = virtio_pci_load_extra_state; 2532 k->has_extra_state = virtio_pci_has_extra_state; 2533 k->query_guest_notifiers = virtio_pci_query_guest_notifiers; 2534 k->set_guest_notifiers = virtio_pci_set_guest_notifiers; 2535 k->vmstate_change = virtio_pci_vmstate_change; 2536 k->pre_plugged = virtio_pci_pre_plugged; 2537 k->device_plugged = virtio_pci_device_plugged; 2538 k->device_unplugged = virtio_pci_device_unplugged; 2539 k->query_nvectors = virtio_pci_query_nvectors; 2540 k->ioeventfd_enabled = virtio_pci_ioeventfd_enabled; 2541 k->ioeventfd_assign = virtio_pci_ioeventfd_assign; 2542 k->get_dma_as = virtio_pci_get_dma_as; 2543 } 2544 2545 static const TypeInfo virtio_pci_bus_info = { 2546 .name = TYPE_VIRTIO_PCI_BUS, 2547 .parent = TYPE_VIRTIO_BUS, 2548 .instance_size = sizeof(VirtioPCIBusState), 2549 .class_init = virtio_pci_bus_class_init, 2550 }; 2551 2552 static void virtio_pci_register_types(void) 2553 { 2554 type_register_static(&virtio_rng_pci_info); 2555 type_register_static(&virtio_input_pci_info); 2556 type_register_static(&virtio_input_hid_pci_info); 2557 type_register_static(&virtio_keyboard_pci_info); 2558 type_register_static(&virtio_mouse_pci_info); 2559 type_register_static(&virtio_tablet_pci_info); 2560 #ifdef CONFIG_LINUX 2561 type_register_static(&virtio_host_pci_info); 2562 #endif 2563 type_register_static(&virtio_pci_bus_info); 2564 type_register_static(&virtio_pci_info); 2565 #ifdef CONFIG_VIRTFS 2566 type_register_static(&virtio_9p_pci_info); 2567 #endif 2568 type_register_static(&virtio_blk_pci_info); 2569 type_register_static(&virtio_scsi_pci_info); 2570 type_register_static(&virtio_balloon_pci_info); 2571 type_register_static(&virtio_serial_pci_info); 2572 type_register_static(&virtio_net_pci_info); 2573 #ifdef CONFIG_VHOST_SCSI 2574 type_register_static(&vhost_scsi_pci_info); 2575 #endif 2576 #ifdef CONFIG_VHOST_VSOCK 2577 type_register_static(&vhost_vsock_pci_info); 2578 #endif 2579 } 2580 2581 type_init(virtio_pci_register_types) 2582