1# See docs/devel/tracing.txt for syntax documentation. 2 3# hw/vfio/pci.c 4vfio_intx_interrupt(const char *name, char line) " (%s) Pin %c" 5vfio_intx_eoi(const char *name) " (%s) EOI" 6vfio_intx_enable_kvm(const char *name) " (%s) KVM INTx accel enabled" 7vfio_intx_disable_kvm(const char *name) " (%s) KVM INTx accel disabled" 8vfio_intx_update(const char *name, int new_irq, int target_irq) " (%s) IRQ moved %d -> %d" 9vfio_intx_enable(const char *name) " (%s)" 10vfio_intx_disable(const char *name) " (%s)" 11vfio_msi_interrupt(const char *name, int index, uint64_t addr, int data) " (%s) vector %d 0x%"PRIx64"/0x%x" 12vfio_msix_vector_do_use(const char *name, int index) " (%s) vector %d used" 13vfio_msix_vector_release(const char *name, int index) " (%s) vector %d released" 14vfio_msix_enable(const char *name) " (%s)" 15vfio_msix_pba_disable(const char *name) " (%s)" 16vfio_msix_pba_enable(const char *name) " (%s)" 17vfio_msix_disable(const char *name) " (%s)" 18vfio_msix_fixup(const char *name, int bar, uint64_t start, uint64_t end) " (%s) MSI-X region %d mmap fixup [0x%"PRIx64" - 0x%"PRIx64"]" 19vfio_msi_enable(const char *name, int nr_vectors) " (%s) Enabled %d MSI vectors" 20vfio_msi_disable(const char *name) " (%s)" 21vfio_pci_load_rom(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s ROM:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx" 22vfio_rom_read(const char *name, uint64_t addr, int size, uint64_t data) " (%s, 0x%"PRIx64", 0x%x) = 0x%"PRIx64 23vfio_pci_size_rom(const char *name, int size) "%s ROM size 0x%x" 24vfio_vga_write(uint64_t addr, uint64_t data, int size) " (0x%"PRIx64", 0x%"PRIx64", %d)" 25vfio_vga_read(uint64_t addr, int size, uint64_t data) " (0x%"PRIx64", %d) = 0x%"PRIx64 26vfio_pci_read_config(const char *name, int addr, int len, int val) " (%s, @0x%x, len=0x%x) 0x%x" 27vfio_pci_write_config(const char *name, int addr, int val, int len) " (%s, @0x%x, 0x%x, len=0x%x)" 28vfio_msi_setup(const char *name, int pos) "%s PCI MSI CAP @0x%x" 29vfio_msix_early_setup(const char *name, int pos, int table_bar, int offset, int entries) "%s PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d" 30vfio_check_pcie_flr(const char *name) "%s Supports FLR via PCIe cap" 31vfio_check_pm_reset(const char *name) "%s Supports PM reset" 32vfio_check_af_flr(const char *name) "%s Supports FLR via AF cap" 33vfio_pci_hot_reset(const char *name, const char *type) " (%s) %s" 34vfio_pci_hot_reset_has_dep_devices(const char *name) "%s: hot reset dependent devices:" 35vfio_pci_hot_reset_dep_devices(int domain, int bus, int slot, int function, int group_id) "\t%04x:%02x:%02x.%x group %d" 36vfio_pci_hot_reset_result(const char *name, const char *result) "%s hot reset: %s" 37vfio_populate_device_config(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s config:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx" 38vfio_populate_device_get_irq_info_failure(void) "VFIO_DEVICE_GET_IRQ_INFO failure: %m" 39vfio_realize(const char *name, int group_id) " (%s) group %d" 40vfio_add_ext_cap_dropped(const char *name, uint16_t cap, uint16_t offset) "%s 0x%x@0x%x" 41vfio_pci_reset(const char *name) " (%s)" 42vfio_pci_reset_flr(const char *name) "%s FLR/VFIO_DEVICE_RESET" 43vfio_pci_reset_pm(const char *name) "%s PCI PM Reset" 44vfio_pci_emulated_vendor_id(const char *name, uint16_t val) "%s 0x%04x" 45vfio_pci_emulated_device_id(const char *name, uint16_t val) "%s 0x%04x" 46vfio_pci_emulated_sub_vendor_id(const char *name, uint16_t val) "%s 0x%04x" 47vfio_pci_emulated_sub_device_id(const char *name, uint16_t val) "%s 0x%04x" 48 49# hw/vfio/pci-quirks.c 50vfio_quirk_rom_blacklisted(const char *name, uint16_t vid, uint16_t did) "%s %04x:%04x" 51vfio_quirk_generic_window_address_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64 52vfio_quirk_generic_window_data_read(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64 53vfio_quirk_generic_window_data_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64 54vfio_quirk_generic_mirror_read(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64 55vfio_quirk_generic_mirror_write(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64 56vfio_quirk_ati_3c3_read(const char *name, uint64_t data) "%s 0x%"PRIx64 57vfio_quirk_ati_3c3_probe(const char *name) "%s" 58vfio_quirk_ati_bar4_probe(const char *name) "%s" 59vfio_quirk_ati_bar2_probe(const char *name) "%s" 60vfio_quirk_nvidia_3d0_state(const char *name, const char *state) "%s %s" 61vfio_quirk_nvidia_3d0_read(const char *name, uint8_t offset, unsigned size, uint64_t val) " (%s, @0x%x, len=0x%x) 0x%"PRIx64 62vfio_quirk_nvidia_3d0_write(const char *name, uint8_t offset, uint64_t data, unsigned size) "(%s, @0x%x, 0x%"PRIx64", len=0x%x)" 63vfio_quirk_nvidia_3d0_probe(const char *name) "%s" 64vfio_quirk_nvidia_bar5_state(const char *name, const char *state) "%s %s" 65vfio_quirk_nvidia_bar5_probe(const char *name) "%s" 66vfio_quirk_nvidia_bar0_msi_ack(const char *name) "%s" 67vfio_quirk_nvidia_bar0_probe(const char *name) "%s" 68vfio_quirk_rtl8168_fake_latch(const char *name, uint64_t val) "%s 0x%"PRIx64 69vfio_quirk_rtl8168_msix_write(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table write[0x%x]: 0x%"PRIx64 70vfio_quirk_rtl8168_msix_read(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table read[0x%x]: 0x%"PRIx64 71vfio_quirk_rtl8168_probe(const char *name) "%s" 72 73vfio_quirk_ati_bonaire_reset_skipped(const char *name) "%s" 74vfio_quirk_ati_bonaire_reset_no_smc(const char *name) "%s" 75vfio_quirk_ati_bonaire_reset_timeout(const char *name) "%s" 76vfio_quirk_ati_bonaire_reset_done(const char *name) "%s" 77vfio_quirk_ati_bonaire_reset(const char *name) "%s" 78vfio_pci_igd_bar4_write(const char *name, uint32_t index, uint32_t data, uint32_t base) "%s [0x%03x] 0x%08x -> 0x%08x" 79vfio_pci_igd_bdsm_enabled(const char *name, int size) "%s %dMB" 80vfio_pci_igd_opregion_enabled(const char *name) "%s" 81vfio_pci_igd_host_bridge_enabled(const char *name) "%s" 82vfio_pci_igd_lpc_bridge_enabled(const char *name) "%s" 83 84# hw/vfio/common.c 85vfio_region_write(const char *name, int index, uint64_t addr, uint64_t data, unsigned size) " (%s:region%d+0x%"PRIx64", 0x%"PRIx64 ", %d)" 86vfio_region_read(char *name, int index, uint64_t addr, unsigned size, uint64_t data) " (%s:region%d+0x%"PRIx64", %d) = 0x%"PRIx64 87vfio_iommu_map_notify(const char *op, uint64_t iova_start, uint64_t iova_end) "iommu %s @ 0x%"PRIx64" - 0x%"PRIx64 88vfio_listener_region_add_skip(uint64_t start, uint64_t end) "SKIPPING region_add 0x%"PRIx64" - 0x%"PRIx64 89vfio_listener_region_add_iommu(uint64_t start, uint64_t end) "region_add [iommu] 0x%"PRIx64" - 0x%"PRIx64 90vfio_listener_region_add_ram(uint64_t iova_start, uint64_t iova_end, void *vaddr) "region_add [ram] 0x%"PRIx64" - 0x%"PRIx64" [%p]" 91vfio_listener_region_del_skip(uint64_t start, uint64_t end) "SKIPPING region_del 0x%"PRIx64" - 0x%"PRIx64 92vfio_listener_region_del(uint64_t start, uint64_t end) "region_del 0x%"PRIx64" - 0x%"PRIx64 93vfio_disconnect_container(int fd) "close container->fd=%d" 94vfio_put_group(int fd) "close group->fd=%d" 95vfio_get_device(const char * name, unsigned int flags, unsigned int num_regions, unsigned int num_irqs) "Device %s flags: %u, regions: %u, irqs: %u" 96vfio_put_base_device(int fd) "close vdev->fd=%d" 97vfio_region_setup(const char *dev, int index, const char *name, unsigned long flags, unsigned long offset, unsigned long size) "Device %s, region %d \"%s\", flags: 0x%lx, offset: 0x%lx, size: 0x%lx" 98vfio_region_mmap_fault(const char *name, int index, unsigned long offset, unsigned long size, int fault) "Region %s mmaps[%d], [0x%lx - 0x%lx], fault: %d" 99vfio_region_mmap(const char *name, unsigned long offset, unsigned long end) "Region %s [0x%lx - 0x%lx]" 100vfio_region_exit(const char *name, int index) "Device %s, region %d" 101vfio_region_finalize(const char *name, int index) "Device %s, region %d" 102vfio_region_mmaps_set_enabled(const char *name, bool enabled) "Region %s mmaps enabled: %d" 103vfio_region_sparse_mmap_header(const char *name, int index, int nr_areas) "Device %s region %d: %d sparse mmap entries" 104vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long end) "sparse entry %d [0x%lx - 0x%lx]" 105vfio_get_dev_region(const char *name, int index, uint32_t type, uint32_t subtype) "%s index %d, %08x/%0x8" 106 107# hw/vfio/platform.c 108vfio_platform_base_device_init(char *name, int groupid) "%s belongs to group #%d" 109vfio_platform_realize(char *name, char *compat) "vfio device %s, compat = %s" 110vfio_platform_eoi(int pin, int fd) "EOI IRQ pin %d (fd=%d)" 111vfio_platform_intp_mmap_enable(int pin) "IRQ #%d still active, stay in slow path" 112vfio_platform_intp_interrupt(int pin, int fd) "Inject IRQ #%d (fd = %d)" 113vfio_platform_intp_inject_pending_lockheld(int pin, int fd) "Inject pending IRQ #%d (fd = %d)" 114vfio_platform_populate_interrupts(int pin, int count, int flags) "- IRQ index %d: count %d, flags=0x%x" 115vfio_intp_interrupt_set_pending(int index) "irq %d is set PENDING" 116vfio_platform_start_level_irqfd_injection(int index, int fd, int resamplefd) "IRQ index=%d, fd = %d, resamplefd = %d" 117vfio_platform_start_edge_irqfd_injection(int index, int fd) "IRQ index=%d, fd = %d" 118 119# hw/vfio/spapr.c 120vfio_prereg_listener_region_add_skip(uint64_t start, uint64_t end) "0x%"PRIx64" - 0x%"PRIx64 121vfio_prereg_listener_region_del_skip(uint64_t start, uint64_t end) "0x%"PRIx64" - 0x%"PRIx64 122vfio_prereg_register(uint64_t va, uint64_t size, int ret) "va=0x%"PRIx64" size=0x%"PRIx64" ret=%d" 123vfio_prereg_unregister(uint64_t va, uint64_t size, int ret) "va=0x%"PRIx64" size=0x%"PRIx64" ret=%d" 124vfio_spapr_create_window(int ps, uint64_t ws, uint64_t off) "pageshift=0x%x winsize=0x%"PRIx64" offset=0x%"PRIx64 125vfio_spapr_remove_window(uint64_t off) "offset=0x%"PRIx64 126