1 /* 2 * vfio based device assignment support 3 * 4 * Copyright Red Hat, Inc. 2012 5 * 6 * Authors: 7 * Alex Williamson <alex.williamson@redhat.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2. See 10 * the COPYING file in the top-level directory. 11 * 12 * Based on qemu-kvm device-assignment: 13 * Adapted for KVM by Qumranet. 14 * Copyright (c) 2007, Neocleus, Alex Novik (alex@neocleus.com) 15 * Copyright (c) 2007, Neocleus, Guy Zana (guy@neocleus.com) 16 * Copyright (C) 2008, Qumranet, Amit Shah (amit.shah@qumranet.com) 17 * Copyright (C) 2008, Red Hat, Amit Shah (amit.shah@redhat.com) 18 * Copyright (C) 2008, IBM, Muli Ben-Yehuda (muli@il.ibm.com) 19 */ 20 21 #include "qemu/osdep.h" 22 #include <linux/vfio.h> 23 #include <sys/ioctl.h> 24 #include <sys/mman.h> 25 26 #include "hw/pci/msi.h" 27 #include "hw/pci/msix.h" 28 #include "hw/pci/pci_bridge.h" 29 #include "qemu/error-report.h" 30 #include "qemu/range.h" 31 #include "sysemu/kvm.h" 32 #include "sysemu/sysemu.h" 33 #include "pci.h" 34 #include "trace.h" 35 36 #define MSIX_CAP_LENGTH 12 37 38 static void vfio_disable_interrupts(VFIOPCIDevice *vdev); 39 static void vfio_mmap_set_enabled(VFIOPCIDevice *vdev, bool enabled); 40 41 /* 42 * Disabling BAR mmaping can be slow, but toggling it around INTx can 43 * also be a huge overhead. We try to get the best of both worlds by 44 * waiting until an interrupt to disable mmaps (subsequent transitions 45 * to the same state are effectively no overhead). If the interrupt has 46 * been serviced and the time gap is long enough, we re-enable mmaps for 47 * performance. This works well for things like graphics cards, which 48 * may not use their interrupt at all and are penalized to an unusable 49 * level by read/write BAR traps. Other devices, like NICs, have more 50 * regular interrupts and see much better latency by staying in non-mmap 51 * mode. We therefore set the default mmap_timeout such that a ping 52 * is just enough to keep the mmap disabled. Users can experiment with 53 * other options with the x-intx-mmap-timeout-ms parameter (a value of 54 * zero disables the timer). 55 */ 56 static void vfio_intx_mmap_enable(void *opaque) 57 { 58 VFIOPCIDevice *vdev = opaque; 59 60 if (vdev->intx.pending) { 61 timer_mod(vdev->intx.mmap_timer, 62 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + vdev->intx.mmap_timeout); 63 return; 64 } 65 66 vfio_mmap_set_enabled(vdev, true); 67 } 68 69 static void vfio_intx_interrupt(void *opaque) 70 { 71 VFIOPCIDevice *vdev = opaque; 72 73 if (!event_notifier_test_and_clear(&vdev->intx.interrupt)) { 74 return; 75 } 76 77 trace_vfio_intx_interrupt(vdev->vbasedev.name, 'A' + vdev->intx.pin); 78 79 vdev->intx.pending = true; 80 pci_irq_assert(&vdev->pdev); 81 vfio_mmap_set_enabled(vdev, false); 82 if (vdev->intx.mmap_timeout) { 83 timer_mod(vdev->intx.mmap_timer, 84 qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + vdev->intx.mmap_timeout); 85 } 86 } 87 88 static void vfio_intx_eoi(VFIODevice *vbasedev) 89 { 90 VFIOPCIDevice *vdev = container_of(vbasedev, VFIOPCIDevice, vbasedev); 91 92 if (!vdev->intx.pending) { 93 return; 94 } 95 96 trace_vfio_intx_eoi(vbasedev->name); 97 98 vdev->intx.pending = false; 99 pci_irq_deassert(&vdev->pdev); 100 vfio_unmask_single_irqindex(vbasedev, VFIO_PCI_INTX_IRQ_INDEX); 101 } 102 103 static void vfio_intx_enable_kvm(VFIOPCIDevice *vdev) 104 { 105 #ifdef CONFIG_KVM 106 struct kvm_irqfd irqfd = { 107 .fd = event_notifier_get_fd(&vdev->intx.interrupt), 108 .gsi = vdev->intx.route.irq, 109 .flags = KVM_IRQFD_FLAG_RESAMPLE, 110 }; 111 struct vfio_irq_set *irq_set; 112 int ret, argsz; 113 int32_t *pfd; 114 115 if (vdev->no_kvm_intx || !kvm_irqfds_enabled() || 116 vdev->intx.route.mode != PCI_INTX_ENABLED || 117 !kvm_resamplefds_enabled()) { 118 return; 119 } 120 121 /* Get to a known interrupt state */ 122 qemu_set_fd_handler(irqfd.fd, NULL, NULL, vdev); 123 vfio_mask_single_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX); 124 vdev->intx.pending = false; 125 pci_irq_deassert(&vdev->pdev); 126 127 /* Get an eventfd for resample/unmask */ 128 if (event_notifier_init(&vdev->intx.unmask, 0)) { 129 error_report("vfio: Error: event_notifier_init failed eoi"); 130 goto fail; 131 } 132 133 /* KVM triggers it, VFIO listens for it */ 134 irqfd.resamplefd = event_notifier_get_fd(&vdev->intx.unmask); 135 136 if (kvm_vm_ioctl(kvm_state, KVM_IRQFD, &irqfd)) { 137 error_report("vfio: Error: Failed to setup resample irqfd: %m"); 138 goto fail_irqfd; 139 } 140 141 argsz = sizeof(*irq_set) + sizeof(*pfd); 142 143 irq_set = g_malloc0(argsz); 144 irq_set->argsz = argsz; 145 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_UNMASK; 146 irq_set->index = VFIO_PCI_INTX_IRQ_INDEX; 147 irq_set->start = 0; 148 irq_set->count = 1; 149 pfd = (int32_t *)&irq_set->data; 150 151 *pfd = irqfd.resamplefd; 152 153 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set); 154 g_free(irq_set); 155 if (ret) { 156 error_report("vfio: Error: Failed to setup INTx unmask fd: %m"); 157 goto fail_vfio; 158 } 159 160 /* Let'em rip */ 161 vfio_unmask_single_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX); 162 163 vdev->intx.kvm_accel = true; 164 165 trace_vfio_intx_enable_kvm(vdev->vbasedev.name); 166 167 return; 168 169 fail_vfio: 170 irqfd.flags = KVM_IRQFD_FLAG_DEASSIGN; 171 kvm_vm_ioctl(kvm_state, KVM_IRQFD, &irqfd); 172 fail_irqfd: 173 event_notifier_cleanup(&vdev->intx.unmask); 174 fail: 175 qemu_set_fd_handler(irqfd.fd, vfio_intx_interrupt, NULL, vdev); 176 vfio_unmask_single_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX); 177 #endif 178 } 179 180 static void vfio_intx_disable_kvm(VFIOPCIDevice *vdev) 181 { 182 #ifdef CONFIG_KVM 183 struct kvm_irqfd irqfd = { 184 .fd = event_notifier_get_fd(&vdev->intx.interrupt), 185 .gsi = vdev->intx.route.irq, 186 .flags = KVM_IRQFD_FLAG_DEASSIGN, 187 }; 188 189 if (!vdev->intx.kvm_accel) { 190 return; 191 } 192 193 /* 194 * Get to a known state, hardware masked, QEMU ready to accept new 195 * interrupts, QEMU IRQ de-asserted. 196 */ 197 vfio_mask_single_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX); 198 vdev->intx.pending = false; 199 pci_irq_deassert(&vdev->pdev); 200 201 /* Tell KVM to stop listening for an INTx irqfd */ 202 if (kvm_vm_ioctl(kvm_state, KVM_IRQFD, &irqfd)) { 203 error_report("vfio: Error: Failed to disable INTx irqfd: %m"); 204 } 205 206 /* We only need to close the eventfd for VFIO to cleanup the kernel side */ 207 event_notifier_cleanup(&vdev->intx.unmask); 208 209 /* QEMU starts listening for interrupt events. */ 210 qemu_set_fd_handler(irqfd.fd, vfio_intx_interrupt, NULL, vdev); 211 212 vdev->intx.kvm_accel = false; 213 214 /* If we've missed an event, let it re-fire through QEMU */ 215 vfio_unmask_single_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX); 216 217 trace_vfio_intx_disable_kvm(vdev->vbasedev.name); 218 #endif 219 } 220 221 static void vfio_intx_update(PCIDevice *pdev) 222 { 223 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev); 224 PCIINTxRoute route; 225 226 if (vdev->interrupt != VFIO_INT_INTx) { 227 return; 228 } 229 230 route = pci_device_route_intx_to_irq(&vdev->pdev, vdev->intx.pin); 231 232 if (!pci_intx_route_changed(&vdev->intx.route, &route)) { 233 return; /* Nothing changed */ 234 } 235 236 trace_vfio_intx_update(vdev->vbasedev.name, 237 vdev->intx.route.irq, route.irq); 238 239 vfio_intx_disable_kvm(vdev); 240 241 vdev->intx.route = route; 242 243 if (route.mode != PCI_INTX_ENABLED) { 244 return; 245 } 246 247 vfio_intx_enable_kvm(vdev); 248 249 /* Re-enable the interrupt in cased we missed an EOI */ 250 vfio_intx_eoi(&vdev->vbasedev); 251 } 252 253 static int vfio_intx_enable(VFIOPCIDevice *vdev) 254 { 255 uint8_t pin = vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1); 256 int ret, argsz; 257 struct vfio_irq_set *irq_set; 258 int32_t *pfd; 259 260 if (!pin) { 261 return 0; 262 } 263 264 vfio_disable_interrupts(vdev); 265 266 vdev->intx.pin = pin - 1; /* Pin A (1) -> irq[0] */ 267 pci_config_set_interrupt_pin(vdev->pdev.config, pin); 268 269 #ifdef CONFIG_KVM 270 /* 271 * Only conditional to avoid generating error messages on platforms 272 * where we won't actually use the result anyway. 273 */ 274 if (kvm_irqfds_enabled() && kvm_resamplefds_enabled()) { 275 vdev->intx.route = pci_device_route_intx_to_irq(&vdev->pdev, 276 vdev->intx.pin); 277 } 278 #endif 279 280 ret = event_notifier_init(&vdev->intx.interrupt, 0); 281 if (ret) { 282 error_report("vfio: Error: event_notifier_init failed"); 283 return ret; 284 } 285 286 argsz = sizeof(*irq_set) + sizeof(*pfd); 287 288 irq_set = g_malloc0(argsz); 289 irq_set->argsz = argsz; 290 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER; 291 irq_set->index = VFIO_PCI_INTX_IRQ_INDEX; 292 irq_set->start = 0; 293 irq_set->count = 1; 294 pfd = (int32_t *)&irq_set->data; 295 296 *pfd = event_notifier_get_fd(&vdev->intx.interrupt); 297 qemu_set_fd_handler(*pfd, vfio_intx_interrupt, NULL, vdev); 298 299 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set); 300 g_free(irq_set); 301 if (ret) { 302 error_report("vfio: Error: Failed to setup INTx fd: %m"); 303 qemu_set_fd_handler(*pfd, NULL, NULL, vdev); 304 event_notifier_cleanup(&vdev->intx.interrupt); 305 return -errno; 306 } 307 308 vfio_intx_enable_kvm(vdev); 309 310 vdev->interrupt = VFIO_INT_INTx; 311 312 trace_vfio_intx_enable(vdev->vbasedev.name); 313 314 return 0; 315 } 316 317 static void vfio_intx_disable(VFIOPCIDevice *vdev) 318 { 319 int fd; 320 321 timer_del(vdev->intx.mmap_timer); 322 vfio_intx_disable_kvm(vdev); 323 vfio_disable_irqindex(&vdev->vbasedev, VFIO_PCI_INTX_IRQ_INDEX); 324 vdev->intx.pending = false; 325 pci_irq_deassert(&vdev->pdev); 326 vfio_mmap_set_enabled(vdev, true); 327 328 fd = event_notifier_get_fd(&vdev->intx.interrupt); 329 qemu_set_fd_handler(fd, NULL, NULL, vdev); 330 event_notifier_cleanup(&vdev->intx.interrupt); 331 332 vdev->interrupt = VFIO_INT_NONE; 333 334 trace_vfio_intx_disable(vdev->vbasedev.name); 335 } 336 337 /* 338 * MSI/X 339 */ 340 static void vfio_msi_interrupt(void *opaque) 341 { 342 VFIOMSIVector *vector = opaque; 343 VFIOPCIDevice *vdev = vector->vdev; 344 MSIMessage (*get_msg)(PCIDevice *dev, unsigned vector); 345 void (*notify)(PCIDevice *dev, unsigned vector); 346 MSIMessage msg; 347 int nr = vector - vdev->msi_vectors; 348 349 if (!event_notifier_test_and_clear(&vector->interrupt)) { 350 return; 351 } 352 353 if (vdev->interrupt == VFIO_INT_MSIX) { 354 get_msg = msix_get_message; 355 notify = msix_notify; 356 357 /* A masked vector firing needs to use the PBA, enable it */ 358 if (msix_is_masked(&vdev->pdev, nr)) { 359 set_bit(nr, vdev->msix->pending); 360 memory_region_set_enabled(&vdev->pdev.msix_pba_mmio, true); 361 trace_vfio_msix_pba_enable(vdev->vbasedev.name); 362 } 363 } else if (vdev->interrupt == VFIO_INT_MSI) { 364 get_msg = msi_get_message; 365 notify = msi_notify; 366 } else { 367 abort(); 368 } 369 370 msg = get_msg(&vdev->pdev, nr); 371 trace_vfio_msi_interrupt(vdev->vbasedev.name, nr, msg.address, msg.data); 372 notify(&vdev->pdev, nr); 373 } 374 375 static int vfio_enable_vectors(VFIOPCIDevice *vdev, bool msix) 376 { 377 struct vfio_irq_set *irq_set; 378 int ret = 0, i, argsz; 379 int32_t *fds; 380 381 argsz = sizeof(*irq_set) + (vdev->nr_vectors * sizeof(*fds)); 382 383 irq_set = g_malloc0(argsz); 384 irq_set->argsz = argsz; 385 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER; 386 irq_set->index = msix ? VFIO_PCI_MSIX_IRQ_INDEX : VFIO_PCI_MSI_IRQ_INDEX; 387 irq_set->start = 0; 388 irq_set->count = vdev->nr_vectors; 389 fds = (int32_t *)&irq_set->data; 390 391 for (i = 0; i < vdev->nr_vectors; i++) { 392 int fd = -1; 393 394 /* 395 * MSI vs MSI-X - The guest has direct access to MSI mask and pending 396 * bits, therefore we always use the KVM signaling path when setup. 397 * MSI-X mask and pending bits are emulated, so we want to use the 398 * KVM signaling path only when configured and unmasked. 399 */ 400 if (vdev->msi_vectors[i].use) { 401 if (vdev->msi_vectors[i].virq < 0 || 402 (msix && msix_is_masked(&vdev->pdev, i))) { 403 fd = event_notifier_get_fd(&vdev->msi_vectors[i].interrupt); 404 } else { 405 fd = event_notifier_get_fd(&vdev->msi_vectors[i].kvm_interrupt); 406 } 407 } 408 409 fds[i] = fd; 410 } 411 412 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set); 413 414 g_free(irq_set); 415 416 return ret; 417 } 418 419 static void vfio_add_kvm_msi_virq(VFIOPCIDevice *vdev, VFIOMSIVector *vector, 420 MSIMessage *msg, bool msix) 421 { 422 int virq; 423 424 if ((msix && vdev->no_kvm_msix) || (!msix && vdev->no_kvm_msi) || !msg) { 425 return; 426 } 427 428 if (event_notifier_init(&vector->kvm_interrupt, 0)) { 429 return; 430 } 431 432 virq = kvm_irqchip_add_msi_route(kvm_state, *msg, &vdev->pdev); 433 if (virq < 0) { 434 event_notifier_cleanup(&vector->kvm_interrupt); 435 return; 436 } 437 438 if (kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, &vector->kvm_interrupt, 439 NULL, virq) < 0) { 440 kvm_irqchip_release_virq(kvm_state, virq); 441 event_notifier_cleanup(&vector->kvm_interrupt); 442 return; 443 } 444 445 vector->virq = virq; 446 } 447 448 static void vfio_remove_kvm_msi_virq(VFIOMSIVector *vector) 449 { 450 kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, &vector->kvm_interrupt, 451 vector->virq); 452 kvm_irqchip_release_virq(kvm_state, vector->virq); 453 vector->virq = -1; 454 event_notifier_cleanup(&vector->kvm_interrupt); 455 } 456 457 static void vfio_update_kvm_msi_virq(VFIOMSIVector *vector, MSIMessage msg, 458 PCIDevice *pdev) 459 { 460 kvm_irqchip_update_msi_route(kvm_state, vector->virq, msg, pdev); 461 } 462 463 static int vfio_msix_vector_do_use(PCIDevice *pdev, unsigned int nr, 464 MSIMessage *msg, IOHandler *handler) 465 { 466 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev); 467 VFIOMSIVector *vector; 468 int ret; 469 470 trace_vfio_msix_vector_do_use(vdev->vbasedev.name, nr); 471 472 vector = &vdev->msi_vectors[nr]; 473 474 if (!vector->use) { 475 vector->vdev = vdev; 476 vector->virq = -1; 477 if (event_notifier_init(&vector->interrupt, 0)) { 478 error_report("vfio: Error: event_notifier_init failed"); 479 } 480 vector->use = true; 481 msix_vector_use(pdev, nr); 482 } 483 484 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt), 485 handler, NULL, vector); 486 487 /* 488 * Attempt to enable route through KVM irqchip, 489 * default to userspace handling if unavailable. 490 */ 491 if (vector->virq >= 0) { 492 if (!msg) { 493 vfio_remove_kvm_msi_virq(vector); 494 } else { 495 vfio_update_kvm_msi_virq(vector, *msg, pdev); 496 } 497 } else { 498 vfio_add_kvm_msi_virq(vdev, vector, msg, true); 499 } 500 501 /* 502 * We don't want to have the host allocate all possible MSI vectors 503 * for a device if they're not in use, so we shutdown and incrementally 504 * increase them as needed. 505 */ 506 if (vdev->nr_vectors < nr + 1) { 507 vfio_disable_irqindex(&vdev->vbasedev, VFIO_PCI_MSIX_IRQ_INDEX); 508 vdev->nr_vectors = nr + 1; 509 ret = vfio_enable_vectors(vdev, true); 510 if (ret) { 511 error_report("vfio: failed to enable vectors, %d", ret); 512 } 513 } else { 514 int argsz; 515 struct vfio_irq_set *irq_set; 516 int32_t *pfd; 517 518 argsz = sizeof(*irq_set) + sizeof(*pfd); 519 520 irq_set = g_malloc0(argsz); 521 irq_set->argsz = argsz; 522 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | 523 VFIO_IRQ_SET_ACTION_TRIGGER; 524 irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX; 525 irq_set->start = nr; 526 irq_set->count = 1; 527 pfd = (int32_t *)&irq_set->data; 528 529 if (vector->virq >= 0) { 530 *pfd = event_notifier_get_fd(&vector->kvm_interrupt); 531 } else { 532 *pfd = event_notifier_get_fd(&vector->interrupt); 533 } 534 535 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set); 536 g_free(irq_set); 537 if (ret) { 538 error_report("vfio: failed to modify vector, %d", ret); 539 } 540 } 541 542 /* Disable PBA emulation when nothing more is pending. */ 543 clear_bit(nr, vdev->msix->pending); 544 if (find_first_bit(vdev->msix->pending, 545 vdev->nr_vectors) == vdev->nr_vectors) { 546 memory_region_set_enabled(&vdev->pdev.msix_pba_mmio, false); 547 trace_vfio_msix_pba_disable(vdev->vbasedev.name); 548 } 549 550 return 0; 551 } 552 553 static int vfio_msix_vector_use(PCIDevice *pdev, 554 unsigned int nr, MSIMessage msg) 555 { 556 return vfio_msix_vector_do_use(pdev, nr, &msg, vfio_msi_interrupt); 557 } 558 559 static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr) 560 { 561 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev); 562 VFIOMSIVector *vector = &vdev->msi_vectors[nr]; 563 564 trace_vfio_msix_vector_release(vdev->vbasedev.name, nr); 565 566 /* 567 * There are still old guests that mask and unmask vectors on every 568 * interrupt. If we're using QEMU bypass with a KVM irqfd, leave all of 569 * the KVM setup in place, simply switch VFIO to use the non-bypass 570 * eventfd. We'll then fire the interrupt through QEMU and the MSI-X 571 * core will mask the interrupt and set pending bits, allowing it to 572 * be re-asserted on unmask. Nothing to do if already using QEMU mode. 573 */ 574 if (vector->virq >= 0) { 575 int argsz; 576 struct vfio_irq_set *irq_set; 577 int32_t *pfd; 578 579 argsz = sizeof(*irq_set) + sizeof(*pfd); 580 581 irq_set = g_malloc0(argsz); 582 irq_set->argsz = argsz; 583 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | 584 VFIO_IRQ_SET_ACTION_TRIGGER; 585 irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX; 586 irq_set->start = nr; 587 irq_set->count = 1; 588 pfd = (int32_t *)&irq_set->data; 589 590 *pfd = event_notifier_get_fd(&vector->interrupt); 591 592 ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set); 593 594 g_free(irq_set); 595 } 596 } 597 598 static void vfio_msix_enable(VFIOPCIDevice *vdev) 599 { 600 vfio_disable_interrupts(vdev); 601 602 vdev->msi_vectors = g_new0(VFIOMSIVector, vdev->msix->entries); 603 604 vdev->interrupt = VFIO_INT_MSIX; 605 606 /* 607 * Some communication channels between VF & PF or PF & fw rely on the 608 * physical state of the device and expect that enabling MSI-X from the 609 * guest enables the same on the host. When our guest is Linux, the 610 * guest driver call to pci_enable_msix() sets the enabling bit in the 611 * MSI-X capability, but leaves the vector table masked. We therefore 612 * can't rely on a vector_use callback (from request_irq() in the guest) 613 * to switch the physical device into MSI-X mode because that may come a 614 * long time after pci_enable_msix(). This code enables vector 0 with 615 * triggering to userspace, then immediately release the vector, leaving 616 * the physical device with no vectors enabled, but MSI-X enabled, just 617 * like the guest view. 618 */ 619 vfio_msix_vector_do_use(&vdev->pdev, 0, NULL, NULL); 620 vfio_msix_vector_release(&vdev->pdev, 0); 621 622 if (msix_set_vector_notifiers(&vdev->pdev, vfio_msix_vector_use, 623 vfio_msix_vector_release, NULL)) { 624 error_report("vfio: msix_set_vector_notifiers failed"); 625 } 626 627 trace_vfio_msix_enable(vdev->vbasedev.name); 628 } 629 630 static void vfio_msi_enable(VFIOPCIDevice *vdev) 631 { 632 int ret, i; 633 634 vfio_disable_interrupts(vdev); 635 636 vdev->nr_vectors = msi_nr_vectors_allocated(&vdev->pdev); 637 retry: 638 vdev->msi_vectors = g_new0(VFIOMSIVector, vdev->nr_vectors); 639 640 for (i = 0; i < vdev->nr_vectors; i++) { 641 VFIOMSIVector *vector = &vdev->msi_vectors[i]; 642 MSIMessage msg = msi_get_message(&vdev->pdev, i); 643 644 vector->vdev = vdev; 645 vector->virq = -1; 646 vector->use = true; 647 648 if (event_notifier_init(&vector->interrupt, 0)) { 649 error_report("vfio: Error: event_notifier_init failed"); 650 } 651 652 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt), 653 vfio_msi_interrupt, NULL, vector); 654 655 /* 656 * Attempt to enable route through KVM irqchip, 657 * default to userspace handling if unavailable. 658 */ 659 vfio_add_kvm_msi_virq(vdev, vector, &msg, false); 660 } 661 662 /* Set interrupt type prior to possible interrupts */ 663 vdev->interrupt = VFIO_INT_MSI; 664 665 ret = vfio_enable_vectors(vdev, false); 666 if (ret) { 667 if (ret < 0) { 668 error_report("vfio: Error: Failed to setup MSI fds: %m"); 669 } else if (ret != vdev->nr_vectors) { 670 error_report("vfio: Error: Failed to enable %d " 671 "MSI vectors, retry with %d", vdev->nr_vectors, ret); 672 } 673 674 for (i = 0; i < vdev->nr_vectors; i++) { 675 VFIOMSIVector *vector = &vdev->msi_vectors[i]; 676 if (vector->virq >= 0) { 677 vfio_remove_kvm_msi_virq(vector); 678 } 679 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt), 680 NULL, NULL, NULL); 681 event_notifier_cleanup(&vector->interrupt); 682 } 683 684 g_free(vdev->msi_vectors); 685 686 if (ret > 0 && ret != vdev->nr_vectors) { 687 vdev->nr_vectors = ret; 688 goto retry; 689 } 690 vdev->nr_vectors = 0; 691 692 /* 693 * Failing to setup MSI doesn't really fall within any specification. 694 * Let's try leaving interrupts disabled and hope the guest figures 695 * out to fall back to INTx for this device. 696 */ 697 error_report("vfio: Error: Failed to enable MSI"); 698 vdev->interrupt = VFIO_INT_NONE; 699 700 return; 701 } 702 703 trace_vfio_msi_enable(vdev->vbasedev.name, vdev->nr_vectors); 704 } 705 706 static void vfio_msi_disable_common(VFIOPCIDevice *vdev) 707 { 708 int i; 709 710 for (i = 0; i < vdev->nr_vectors; i++) { 711 VFIOMSIVector *vector = &vdev->msi_vectors[i]; 712 if (vdev->msi_vectors[i].use) { 713 if (vector->virq >= 0) { 714 vfio_remove_kvm_msi_virq(vector); 715 } 716 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt), 717 NULL, NULL, NULL); 718 event_notifier_cleanup(&vector->interrupt); 719 } 720 } 721 722 g_free(vdev->msi_vectors); 723 vdev->msi_vectors = NULL; 724 vdev->nr_vectors = 0; 725 vdev->interrupt = VFIO_INT_NONE; 726 727 vfio_intx_enable(vdev); 728 } 729 730 static void vfio_msix_disable(VFIOPCIDevice *vdev) 731 { 732 int i; 733 734 msix_unset_vector_notifiers(&vdev->pdev); 735 736 /* 737 * MSI-X will only release vectors if MSI-X is still enabled on the 738 * device, check through the rest and release it ourselves if necessary. 739 */ 740 for (i = 0; i < vdev->nr_vectors; i++) { 741 if (vdev->msi_vectors[i].use) { 742 vfio_msix_vector_release(&vdev->pdev, i); 743 msix_vector_unuse(&vdev->pdev, i); 744 } 745 } 746 747 if (vdev->nr_vectors) { 748 vfio_disable_irqindex(&vdev->vbasedev, VFIO_PCI_MSIX_IRQ_INDEX); 749 } 750 751 vfio_msi_disable_common(vdev); 752 753 memset(vdev->msix->pending, 0, 754 BITS_TO_LONGS(vdev->msix->entries) * sizeof(unsigned long)); 755 756 trace_vfio_msix_disable(vdev->vbasedev.name); 757 } 758 759 static void vfio_msi_disable(VFIOPCIDevice *vdev) 760 { 761 vfio_disable_irqindex(&vdev->vbasedev, VFIO_PCI_MSI_IRQ_INDEX); 762 vfio_msi_disable_common(vdev); 763 764 trace_vfio_msi_disable(vdev->vbasedev.name); 765 } 766 767 static void vfio_update_msi(VFIOPCIDevice *vdev) 768 { 769 int i; 770 771 for (i = 0; i < vdev->nr_vectors; i++) { 772 VFIOMSIVector *vector = &vdev->msi_vectors[i]; 773 MSIMessage msg; 774 775 if (!vector->use || vector->virq < 0) { 776 continue; 777 } 778 779 msg = msi_get_message(&vdev->pdev, i); 780 vfio_update_kvm_msi_virq(vector, msg, &vdev->pdev); 781 } 782 } 783 784 static void vfio_pci_load_rom(VFIOPCIDevice *vdev) 785 { 786 struct vfio_region_info reg_info = { 787 .argsz = sizeof(reg_info), 788 .index = VFIO_PCI_ROM_REGION_INDEX 789 }; 790 uint64_t size; 791 off_t off = 0; 792 ssize_t bytes; 793 794 if (ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) { 795 error_report("vfio: Error getting ROM info: %m"); 796 return; 797 } 798 799 trace_vfio_pci_load_rom(vdev->vbasedev.name, (unsigned long)reg_info.size, 800 (unsigned long)reg_info.offset, 801 (unsigned long)reg_info.flags); 802 803 vdev->rom_size = size = reg_info.size; 804 vdev->rom_offset = reg_info.offset; 805 806 if (!vdev->rom_size) { 807 vdev->rom_read_failed = true; 808 error_report("vfio-pci: Cannot read device rom at " 809 "%s", vdev->vbasedev.name); 810 error_printf("Device option ROM contents are probably invalid " 811 "(check dmesg).\nSkip option ROM probe with rombar=0, " 812 "or load from file with romfile=\n"); 813 return; 814 } 815 816 vdev->rom = g_malloc(size); 817 memset(vdev->rom, 0xff, size); 818 819 while (size) { 820 bytes = pread(vdev->vbasedev.fd, vdev->rom + off, 821 size, vdev->rom_offset + off); 822 if (bytes == 0) { 823 break; 824 } else if (bytes > 0) { 825 off += bytes; 826 size -= bytes; 827 } else { 828 if (errno == EINTR || errno == EAGAIN) { 829 continue; 830 } 831 error_report("vfio: Error reading device ROM: %m"); 832 break; 833 } 834 } 835 } 836 837 static uint64_t vfio_rom_read(void *opaque, hwaddr addr, unsigned size) 838 { 839 VFIOPCIDevice *vdev = opaque; 840 union { 841 uint8_t byte; 842 uint16_t word; 843 uint32_t dword; 844 uint64_t qword; 845 } val; 846 uint64_t data = 0; 847 848 /* Load the ROM lazily when the guest tries to read it */ 849 if (unlikely(!vdev->rom && !vdev->rom_read_failed)) { 850 vfio_pci_load_rom(vdev); 851 } 852 853 memcpy(&val, vdev->rom + addr, 854 (addr < vdev->rom_size) ? MIN(size, vdev->rom_size - addr) : 0); 855 856 switch (size) { 857 case 1: 858 data = val.byte; 859 break; 860 case 2: 861 data = le16_to_cpu(val.word); 862 break; 863 case 4: 864 data = le32_to_cpu(val.dword); 865 break; 866 default: 867 hw_error("vfio: unsupported read size, %d bytes\n", size); 868 break; 869 } 870 871 trace_vfio_rom_read(vdev->vbasedev.name, addr, size, data); 872 873 return data; 874 } 875 876 static void vfio_rom_write(void *opaque, hwaddr addr, 877 uint64_t data, unsigned size) 878 { 879 } 880 881 static const MemoryRegionOps vfio_rom_ops = { 882 .read = vfio_rom_read, 883 .write = vfio_rom_write, 884 .endianness = DEVICE_LITTLE_ENDIAN, 885 }; 886 887 static void vfio_pci_size_rom(VFIOPCIDevice *vdev) 888 { 889 uint32_t orig, size = cpu_to_le32((uint32_t)PCI_ROM_ADDRESS_MASK); 890 off_t offset = vdev->config_offset + PCI_ROM_ADDRESS; 891 DeviceState *dev = DEVICE(vdev); 892 char name[32]; 893 int fd = vdev->vbasedev.fd; 894 895 if (vdev->pdev.romfile || !vdev->pdev.rom_bar) { 896 /* Since pci handles romfile, just print a message and return */ 897 if (vfio_blacklist_opt_rom(vdev) && vdev->pdev.romfile) { 898 error_printf("Warning : Device at %04x:%02x:%02x.%x " 899 "is known to cause system instability issues during " 900 "option rom execution. " 901 "Proceeding anyway since user specified romfile\n", 902 vdev->host.domain, vdev->host.bus, vdev->host.slot, 903 vdev->host.function); 904 } 905 return; 906 } 907 908 /* 909 * Use the same size ROM BAR as the physical device. The contents 910 * will get filled in later when the guest tries to read it. 911 */ 912 if (pread(fd, &orig, 4, offset) != 4 || 913 pwrite(fd, &size, 4, offset) != 4 || 914 pread(fd, &size, 4, offset) != 4 || 915 pwrite(fd, &orig, 4, offset) != 4) { 916 error_report("%s(%04x:%02x:%02x.%x) failed: %m", 917 __func__, vdev->host.domain, vdev->host.bus, 918 vdev->host.slot, vdev->host.function); 919 return; 920 } 921 922 size = ~(le32_to_cpu(size) & PCI_ROM_ADDRESS_MASK) + 1; 923 924 if (!size) { 925 return; 926 } 927 928 if (vfio_blacklist_opt_rom(vdev)) { 929 if (dev->opts && qemu_opt_get(dev->opts, "rombar")) { 930 error_printf("Warning : Device at %04x:%02x:%02x.%x " 931 "is known to cause system instability issues during " 932 "option rom execution. " 933 "Proceeding anyway since user specified non zero value for " 934 "rombar\n", 935 vdev->host.domain, vdev->host.bus, vdev->host.slot, 936 vdev->host.function); 937 } else { 938 error_printf("Warning : Rom loading for device at " 939 "%04x:%02x:%02x.%x has been disabled due to " 940 "system instability issues. " 941 "Specify rombar=1 or romfile to force\n", 942 vdev->host.domain, vdev->host.bus, vdev->host.slot, 943 vdev->host.function); 944 return; 945 } 946 } 947 948 trace_vfio_pci_size_rom(vdev->vbasedev.name, size); 949 950 snprintf(name, sizeof(name), "vfio[%04x:%02x:%02x.%x].rom", 951 vdev->host.domain, vdev->host.bus, vdev->host.slot, 952 vdev->host.function); 953 954 memory_region_init_io(&vdev->pdev.rom, OBJECT(vdev), 955 &vfio_rom_ops, vdev, name, size); 956 957 pci_register_bar(&vdev->pdev, PCI_ROM_SLOT, 958 PCI_BASE_ADDRESS_SPACE_MEMORY, &vdev->pdev.rom); 959 960 vdev->pdev.has_rom = true; 961 vdev->rom_read_failed = false; 962 } 963 964 void vfio_vga_write(void *opaque, hwaddr addr, 965 uint64_t data, unsigned size) 966 { 967 VFIOVGARegion *region = opaque; 968 VFIOVGA *vga = container_of(region, VFIOVGA, region[region->nr]); 969 union { 970 uint8_t byte; 971 uint16_t word; 972 uint32_t dword; 973 uint64_t qword; 974 } buf; 975 off_t offset = vga->fd_offset + region->offset + addr; 976 977 switch (size) { 978 case 1: 979 buf.byte = data; 980 break; 981 case 2: 982 buf.word = cpu_to_le16(data); 983 break; 984 case 4: 985 buf.dword = cpu_to_le32(data); 986 break; 987 default: 988 hw_error("vfio: unsupported write size, %d bytes", size); 989 break; 990 } 991 992 if (pwrite(vga->fd, &buf, size, offset) != size) { 993 error_report("%s(,0x%"HWADDR_PRIx", 0x%"PRIx64", %d) failed: %m", 994 __func__, region->offset + addr, data, size); 995 } 996 997 trace_vfio_vga_write(region->offset + addr, data, size); 998 } 999 1000 uint64_t vfio_vga_read(void *opaque, hwaddr addr, unsigned size) 1001 { 1002 VFIOVGARegion *region = opaque; 1003 VFIOVGA *vga = container_of(region, VFIOVGA, region[region->nr]); 1004 union { 1005 uint8_t byte; 1006 uint16_t word; 1007 uint32_t dword; 1008 uint64_t qword; 1009 } buf; 1010 uint64_t data = 0; 1011 off_t offset = vga->fd_offset + region->offset + addr; 1012 1013 if (pread(vga->fd, &buf, size, offset) != size) { 1014 error_report("%s(,0x%"HWADDR_PRIx", %d) failed: %m", 1015 __func__, region->offset + addr, size); 1016 return (uint64_t)-1; 1017 } 1018 1019 switch (size) { 1020 case 1: 1021 data = buf.byte; 1022 break; 1023 case 2: 1024 data = le16_to_cpu(buf.word); 1025 break; 1026 case 4: 1027 data = le32_to_cpu(buf.dword); 1028 break; 1029 default: 1030 hw_error("vfio: unsupported read size, %d bytes", size); 1031 break; 1032 } 1033 1034 trace_vfio_vga_read(region->offset + addr, size, data); 1035 1036 return data; 1037 } 1038 1039 static const MemoryRegionOps vfio_vga_ops = { 1040 .read = vfio_vga_read, 1041 .write = vfio_vga_write, 1042 .endianness = DEVICE_LITTLE_ENDIAN, 1043 }; 1044 1045 /* 1046 * PCI config space 1047 */ 1048 uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len) 1049 { 1050 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev); 1051 uint32_t emu_bits = 0, emu_val = 0, phys_val = 0, val; 1052 1053 memcpy(&emu_bits, vdev->emulated_config_bits + addr, len); 1054 emu_bits = le32_to_cpu(emu_bits); 1055 1056 if (emu_bits) { 1057 emu_val = pci_default_read_config(pdev, addr, len); 1058 } 1059 1060 if (~emu_bits & (0xffffffffU >> (32 - len * 8))) { 1061 ssize_t ret; 1062 1063 ret = pread(vdev->vbasedev.fd, &phys_val, len, 1064 vdev->config_offset + addr); 1065 if (ret != len) { 1066 error_report("%s(%04x:%02x:%02x.%x, 0x%x, 0x%x) failed: %m", 1067 __func__, vdev->host.domain, vdev->host.bus, 1068 vdev->host.slot, vdev->host.function, addr, len); 1069 return -errno; 1070 } 1071 phys_val = le32_to_cpu(phys_val); 1072 } 1073 1074 val = (emu_val & emu_bits) | (phys_val & ~emu_bits); 1075 1076 trace_vfio_pci_read_config(vdev->vbasedev.name, addr, len, val); 1077 1078 return val; 1079 } 1080 1081 void vfio_pci_write_config(PCIDevice *pdev, 1082 uint32_t addr, uint32_t val, int len) 1083 { 1084 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev); 1085 uint32_t val_le = cpu_to_le32(val); 1086 1087 trace_vfio_pci_write_config(vdev->vbasedev.name, addr, val, len); 1088 1089 /* Write everything to VFIO, let it filter out what we can't write */ 1090 if (pwrite(vdev->vbasedev.fd, &val_le, len, vdev->config_offset + addr) 1091 != len) { 1092 error_report("%s(%04x:%02x:%02x.%x, 0x%x, 0x%x, 0x%x) failed: %m", 1093 __func__, vdev->host.domain, vdev->host.bus, 1094 vdev->host.slot, vdev->host.function, addr, val, len); 1095 } 1096 1097 /* MSI/MSI-X Enabling/Disabling */ 1098 if (pdev->cap_present & QEMU_PCI_CAP_MSI && 1099 ranges_overlap(addr, len, pdev->msi_cap, vdev->msi_cap_size)) { 1100 int is_enabled, was_enabled = msi_enabled(pdev); 1101 1102 pci_default_write_config(pdev, addr, val, len); 1103 1104 is_enabled = msi_enabled(pdev); 1105 1106 if (!was_enabled) { 1107 if (is_enabled) { 1108 vfio_msi_enable(vdev); 1109 } 1110 } else { 1111 if (!is_enabled) { 1112 vfio_msi_disable(vdev); 1113 } else { 1114 vfio_update_msi(vdev); 1115 } 1116 } 1117 } else if (pdev->cap_present & QEMU_PCI_CAP_MSIX && 1118 ranges_overlap(addr, len, pdev->msix_cap, MSIX_CAP_LENGTH)) { 1119 int is_enabled, was_enabled = msix_enabled(pdev); 1120 1121 pci_default_write_config(pdev, addr, val, len); 1122 1123 is_enabled = msix_enabled(pdev); 1124 1125 if (!was_enabled && is_enabled) { 1126 vfio_msix_enable(vdev); 1127 } else if (was_enabled && !is_enabled) { 1128 vfio_msix_disable(vdev); 1129 } 1130 } else { 1131 /* Write everything to QEMU to keep emulated bits correct */ 1132 pci_default_write_config(pdev, addr, val, len); 1133 } 1134 } 1135 1136 /* 1137 * Interrupt setup 1138 */ 1139 static void vfio_disable_interrupts(VFIOPCIDevice *vdev) 1140 { 1141 /* 1142 * More complicated than it looks. Disabling MSI/X transitions the 1143 * device to INTx mode (if supported). Therefore we need to first 1144 * disable MSI/X and then cleanup by disabling INTx. 1145 */ 1146 if (vdev->interrupt == VFIO_INT_MSIX) { 1147 vfio_msix_disable(vdev); 1148 } else if (vdev->interrupt == VFIO_INT_MSI) { 1149 vfio_msi_disable(vdev); 1150 } 1151 1152 if (vdev->interrupt == VFIO_INT_INTx) { 1153 vfio_intx_disable(vdev); 1154 } 1155 } 1156 1157 static int vfio_msi_setup(VFIOPCIDevice *vdev, int pos) 1158 { 1159 uint16_t ctrl; 1160 bool msi_64bit, msi_maskbit; 1161 int ret, entries; 1162 1163 if (pread(vdev->vbasedev.fd, &ctrl, sizeof(ctrl), 1164 vdev->config_offset + pos + PCI_CAP_FLAGS) != sizeof(ctrl)) { 1165 return -errno; 1166 } 1167 ctrl = le16_to_cpu(ctrl); 1168 1169 msi_64bit = !!(ctrl & PCI_MSI_FLAGS_64BIT); 1170 msi_maskbit = !!(ctrl & PCI_MSI_FLAGS_MASKBIT); 1171 entries = 1 << ((ctrl & PCI_MSI_FLAGS_QMASK) >> 1); 1172 1173 trace_vfio_msi_setup(vdev->vbasedev.name, pos); 1174 1175 ret = msi_init(&vdev->pdev, pos, entries, msi_64bit, msi_maskbit); 1176 if (ret < 0) { 1177 if (ret == -ENOTSUP) { 1178 return 0; 1179 } 1180 error_report("vfio: msi_init failed"); 1181 return ret; 1182 } 1183 vdev->msi_cap_size = 0xa + (msi_maskbit ? 0xa : 0) + (msi_64bit ? 0x4 : 0); 1184 1185 return 0; 1186 } 1187 1188 /* 1189 * We don't have any control over how pci_add_capability() inserts 1190 * capabilities into the chain. In order to setup MSI-X we need a 1191 * MemoryRegion for the BAR. In order to setup the BAR and not 1192 * attempt to mmap the MSI-X table area, which VFIO won't allow, we 1193 * need to first look for where the MSI-X table lives. So we 1194 * unfortunately split MSI-X setup across two functions. 1195 */ 1196 static int vfio_msix_early_setup(VFIOPCIDevice *vdev) 1197 { 1198 uint8_t pos; 1199 uint16_t ctrl; 1200 uint32_t table, pba; 1201 int fd = vdev->vbasedev.fd; 1202 VFIOMSIXInfo *msix; 1203 1204 pos = pci_find_capability(&vdev->pdev, PCI_CAP_ID_MSIX); 1205 if (!pos) { 1206 return 0; 1207 } 1208 1209 if (pread(fd, &ctrl, sizeof(ctrl), 1210 vdev->config_offset + pos + PCI_MSIX_FLAGS) != sizeof(ctrl)) { 1211 return -errno; 1212 } 1213 1214 if (pread(fd, &table, sizeof(table), 1215 vdev->config_offset + pos + PCI_MSIX_TABLE) != sizeof(table)) { 1216 return -errno; 1217 } 1218 1219 if (pread(fd, &pba, sizeof(pba), 1220 vdev->config_offset + pos + PCI_MSIX_PBA) != sizeof(pba)) { 1221 return -errno; 1222 } 1223 1224 ctrl = le16_to_cpu(ctrl); 1225 table = le32_to_cpu(table); 1226 pba = le32_to_cpu(pba); 1227 1228 msix = g_malloc0(sizeof(*msix)); 1229 msix->table_bar = table & PCI_MSIX_FLAGS_BIRMASK; 1230 msix->table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK; 1231 msix->pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK; 1232 msix->pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK; 1233 msix->entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1; 1234 1235 /* 1236 * Test the size of the pba_offset variable and catch if it extends outside 1237 * of the specified BAR. If it is the case, we need to apply a hardware 1238 * specific quirk if the device is known or we have a broken configuration. 1239 */ 1240 if (msix->pba_offset >= vdev->bars[msix->pba_bar].region.size) { 1241 /* 1242 * Chelsio T5 Virtual Function devices are encoded as 0x58xx for T5 1243 * adapters. The T5 hardware returns an incorrect value of 0x8000 for 1244 * the VF PBA offset while the BAR itself is only 8k. The correct value 1245 * is 0x1000, so we hard code that here. 1246 */ 1247 if (vdev->vendor_id == PCI_VENDOR_ID_CHELSIO && 1248 (vdev->device_id & 0xff00) == 0x5800) { 1249 msix->pba_offset = 0x1000; 1250 } else { 1251 error_report("vfio: Hardware reports invalid configuration, " 1252 "MSIX PBA outside of specified BAR"); 1253 g_free(msix); 1254 return -EINVAL; 1255 } 1256 } 1257 1258 trace_vfio_msix_early_setup(vdev->vbasedev.name, pos, msix->table_bar, 1259 msix->table_offset, msix->entries); 1260 vdev->msix = msix; 1261 1262 return 0; 1263 } 1264 1265 static int vfio_msix_setup(VFIOPCIDevice *vdev, int pos) 1266 { 1267 int ret; 1268 1269 vdev->msix->pending = g_malloc0(BITS_TO_LONGS(vdev->msix->entries) * 1270 sizeof(unsigned long)); 1271 ret = msix_init(&vdev->pdev, vdev->msix->entries, 1272 &vdev->bars[vdev->msix->table_bar].region.mem, 1273 vdev->msix->table_bar, vdev->msix->table_offset, 1274 &vdev->bars[vdev->msix->pba_bar].region.mem, 1275 vdev->msix->pba_bar, vdev->msix->pba_offset, pos); 1276 if (ret < 0) { 1277 if (ret == -ENOTSUP) { 1278 return 0; 1279 } 1280 error_report("vfio: msix_init failed"); 1281 return ret; 1282 } 1283 1284 /* 1285 * The PCI spec suggests that devices provide additional alignment for 1286 * MSI-X structures and avoid overlapping non-MSI-X related registers. 1287 * For an assigned device, this hopefully means that emulation of MSI-X 1288 * structures does not affect the performance of the device. If devices 1289 * fail to provide that alignment, a significant performance penalty may 1290 * result, for instance Mellanox MT27500 VFs: 1291 * http://www.spinics.net/lists/kvm/msg125881.html 1292 * 1293 * The PBA is simply not that important for such a serious regression and 1294 * most drivers do not appear to look at it. The solution for this is to 1295 * disable the PBA MemoryRegion unless it's being used. We disable it 1296 * here and only enable it if a masked vector fires through QEMU. As the 1297 * vector-use notifier is called, which occurs on unmask, we test whether 1298 * PBA emulation is needed and again disable if not. 1299 */ 1300 memory_region_set_enabled(&vdev->pdev.msix_pba_mmio, false); 1301 1302 return 0; 1303 } 1304 1305 static void vfio_teardown_msi(VFIOPCIDevice *vdev) 1306 { 1307 msi_uninit(&vdev->pdev); 1308 1309 if (vdev->msix) { 1310 msix_uninit(&vdev->pdev, 1311 &vdev->bars[vdev->msix->table_bar].region.mem, 1312 &vdev->bars[vdev->msix->pba_bar].region.mem); 1313 g_free(vdev->msix->pending); 1314 } 1315 } 1316 1317 /* 1318 * Resource setup 1319 */ 1320 static void vfio_mmap_set_enabled(VFIOPCIDevice *vdev, bool enabled) 1321 { 1322 int i; 1323 1324 for (i = 0; i < PCI_ROM_SLOT; i++) { 1325 VFIOBAR *bar = &vdev->bars[i]; 1326 1327 if (!bar->region.size) { 1328 continue; 1329 } 1330 1331 memory_region_set_enabled(&bar->region.mmap_mem, enabled); 1332 if (vdev->msix && vdev->msix->table_bar == i) { 1333 memory_region_set_enabled(&vdev->msix->mmap_mem, enabled); 1334 } 1335 } 1336 } 1337 1338 static void vfio_unregister_bar(VFIOPCIDevice *vdev, int nr) 1339 { 1340 VFIOBAR *bar = &vdev->bars[nr]; 1341 1342 if (!bar->region.size) { 1343 return; 1344 } 1345 1346 vfio_bar_quirk_teardown(vdev, nr); 1347 1348 memory_region_del_subregion(&bar->region.mem, &bar->region.mmap_mem); 1349 1350 if (vdev->msix && vdev->msix->table_bar == nr) { 1351 memory_region_del_subregion(&bar->region.mem, &vdev->msix->mmap_mem); 1352 } 1353 } 1354 1355 static void vfio_unmap_bar(VFIOPCIDevice *vdev, int nr) 1356 { 1357 VFIOBAR *bar = &vdev->bars[nr]; 1358 1359 if (!bar->region.size) { 1360 return; 1361 } 1362 1363 vfio_bar_quirk_free(vdev, nr); 1364 1365 munmap(bar->region.mmap, memory_region_size(&bar->region.mmap_mem)); 1366 1367 if (vdev->msix && vdev->msix->table_bar == nr) { 1368 munmap(vdev->msix->mmap, memory_region_size(&vdev->msix->mmap_mem)); 1369 } 1370 } 1371 1372 static void vfio_map_bar(VFIOPCIDevice *vdev, int nr) 1373 { 1374 VFIOBAR *bar = &vdev->bars[nr]; 1375 uint64_t size = bar->region.size; 1376 char name[64]; 1377 uint32_t pci_bar; 1378 uint8_t type; 1379 int ret; 1380 1381 /* Skip both unimplemented BARs and the upper half of 64bit BARS. */ 1382 if (!size) { 1383 return; 1384 } 1385 1386 snprintf(name, sizeof(name), "VFIO %04x:%02x:%02x.%x BAR %d", 1387 vdev->host.domain, vdev->host.bus, vdev->host.slot, 1388 vdev->host.function, nr); 1389 1390 /* Determine what type of BAR this is for registration */ 1391 ret = pread(vdev->vbasedev.fd, &pci_bar, sizeof(pci_bar), 1392 vdev->config_offset + PCI_BASE_ADDRESS_0 + (4 * nr)); 1393 if (ret != sizeof(pci_bar)) { 1394 error_report("vfio: Failed to read BAR %d (%m)", nr); 1395 return; 1396 } 1397 1398 pci_bar = le32_to_cpu(pci_bar); 1399 bar->ioport = (pci_bar & PCI_BASE_ADDRESS_SPACE_IO); 1400 bar->mem64 = bar->ioport ? 0 : (pci_bar & PCI_BASE_ADDRESS_MEM_TYPE_64); 1401 type = pci_bar & (bar->ioport ? ~PCI_BASE_ADDRESS_IO_MASK : 1402 ~PCI_BASE_ADDRESS_MEM_MASK); 1403 1404 /* A "slow" read/write mapping underlies all BARs */ 1405 memory_region_init_io(&bar->region.mem, OBJECT(vdev), &vfio_region_ops, 1406 bar, name, size); 1407 pci_register_bar(&vdev->pdev, nr, type, &bar->region.mem); 1408 1409 /* 1410 * We can't mmap areas overlapping the MSIX vector table, so we 1411 * potentially insert a direct-mapped subregion before and after it. 1412 */ 1413 if (vdev->msix && vdev->msix->table_bar == nr) { 1414 size = vdev->msix->table_offset & qemu_real_host_page_mask; 1415 } 1416 1417 strncat(name, " mmap", sizeof(name) - strlen(name) - 1); 1418 if (vfio_mmap_region(OBJECT(vdev), &bar->region, &bar->region.mem, 1419 &bar->region.mmap_mem, &bar->region.mmap, 1420 size, 0, name)) { 1421 error_report("%s unsupported. Performance may be slow", name); 1422 } 1423 1424 if (vdev->msix && vdev->msix->table_bar == nr) { 1425 uint64_t start; 1426 1427 start = REAL_HOST_PAGE_ALIGN((uint64_t)vdev->msix->table_offset + 1428 (vdev->msix->entries * 1429 PCI_MSIX_ENTRY_SIZE)); 1430 1431 size = start < bar->region.size ? bar->region.size - start : 0; 1432 strncat(name, " msix-hi", sizeof(name) - strlen(name) - 1); 1433 /* VFIOMSIXInfo contains another MemoryRegion for this mapping */ 1434 if (vfio_mmap_region(OBJECT(vdev), &bar->region, &bar->region.mem, 1435 &vdev->msix->mmap_mem, 1436 &vdev->msix->mmap, size, start, name)) { 1437 error_report("%s unsupported. Performance may be slow", name); 1438 } 1439 } 1440 1441 vfio_bar_quirk_setup(vdev, nr); 1442 } 1443 1444 static void vfio_map_bars(VFIOPCIDevice *vdev) 1445 { 1446 int i; 1447 1448 for (i = 0; i < PCI_ROM_SLOT; i++) { 1449 vfio_map_bar(vdev, i); 1450 } 1451 1452 if (vdev->has_vga) { 1453 memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_MEM].mem, 1454 OBJECT(vdev), &vfio_vga_ops, 1455 &vdev->vga.region[QEMU_PCI_VGA_MEM], 1456 "vfio-vga-mmio@0xa0000", 1457 QEMU_PCI_VGA_MEM_SIZE); 1458 memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_IO_LO].mem, 1459 OBJECT(vdev), &vfio_vga_ops, 1460 &vdev->vga.region[QEMU_PCI_VGA_IO_LO], 1461 "vfio-vga-io@0x3b0", 1462 QEMU_PCI_VGA_IO_LO_SIZE); 1463 memory_region_init_io(&vdev->vga.region[QEMU_PCI_VGA_IO_HI].mem, 1464 OBJECT(vdev), &vfio_vga_ops, 1465 &vdev->vga.region[QEMU_PCI_VGA_IO_HI], 1466 "vfio-vga-io@0x3c0", 1467 QEMU_PCI_VGA_IO_HI_SIZE); 1468 1469 pci_register_vga(&vdev->pdev, &vdev->vga.region[QEMU_PCI_VGA_MEM].mem, 1470 &vdev->vga.region[QEMU_PCI_VGA_IO_LO].mem, 1471 &vdev->vga.region[QEMU_PCI_VGA_IO_HI].mem); 1472 vfio_vga_quirk_setup(vdev); 1473 } 1474 } 1475 1476 static void vfio_unregister_bars(VFIOPCIDevice *vdev) 1477 { 1478 int i; 1479 1480 for (i = 0; i < PCI_ROM_SLOT; i++) { 1481 vfio_unregister_bar(vdev, i); 1482 } 1483 1484 if (vdev->has_vga) { 1485 vfio_vga_quirk_teardown(vdev); 1486 pci_unregister_vga(&vdev->pdev); 1487 } 1488 } 1489 1490 static void vfio_unmap_bars(VFIOPCIDevice *vdev) 1491 { 1492 int i; 1493 1494 for (i = 0; i < PCI_ROM_SLOT; i++) { 1495 vfio_unmap_bar(vdev, i); 1496 } 1497 1498 if (vdev->has_vga) { 1499 vfio_vga_quirk_free(vdev); 1500 } 1501 } 1502 1503 /* 1504 * General setup 1505 */ 1506 static uint8_t vfio_std_cap_max_size(PCIDevice *pdev, uint8_t pos) 1507 { 1508 uint8_t tmp; 1509 uint16_t next = PCI_CONFIG_SPACE_SIZE; 1510 1511 for (tmp = pdev->config[PCI_CAPABILITY_LIST]; tmp; 1512 tmp = pdev->config[tmp + PCI_CAP_LIST_NEXT]) { 1513 if (tmp > pos && tmp < next) { 1514 next = tmp; 1515 } 1516 } 1517 1518 return next - pos; 1519 } 1520 1521 static void vfio_set_word_bits(uint8_t *buf, uint16_t val, uint16_t mask) 1522 { 1523 pci_set_word(buf, (pci_get_word(buf) & ~mask) | val); 1524 } 1525 1526 static void vfio_add_emulated_word(VFIOPCIDevice *vdev, int pos, 1527 uint16_t val, uint16_t mask) 1528 { 1529 vfio_set_word_bits(vdev->pdev.config + pos, val, mask); 1530 vfio_set_word_bits(vdev->pdev.wmask + pos, ~mask, mask); 1531 vfio_set_word_bits(vdev->emulated_config_bits + pos, mask, mask); 1532 } 1533 1534 static void vfio_set_long_bits(uint8_t *buf, uint32_t val, uint32_t mask) 1535 { 1536 pci_set_long(buf, (pci_get_long(buf) & ~mask) | val); 1537 } 1538 1539 static void vfio_add_emulated_long(VFIOPCIDevice *vdev, int pos, 1540 uint32_t val, uint32_t mask) 1541 { 1542 vfio_set_long_bits(vdev->pdev.config + pos, val, mask); 1543 vfio_set_long_bits(vdev->pdev.wmask + pos, ~mask, mask); 1544 vfio_set_long_bits(vdev->emulated_config_bits + pos, mask, mask); 1545 } 1546 1547 static int vfio_setup_pcie_cap(VFIOPCIDevice *vdev, int pos, uint8_t size) 1548 { 1549 uint16_t flags; 1550 uint8_t type; 1551 1552 flags = pci_get_word(vdev->pdev.config + pos + PCI_CAP_FLAGS); 1553 type = (flags & PCI_EXP_FLAGS_TYPE) >> 4; 1554 1555 if (type != PCI_EXP_TYPE_ENDPOINT && 1556 type != PCI_EXP_TYPE_LEG_END && 1557 type != PCI_EXP_TYPE_RC_END) { 1558 1559 error_report("vfio: Assignment of PCIe type 0x%x " 1560 "devices is not currently supported", type); 1561 return -EINVAL; 1562 } 1563 1564 if (!pci_bus_is_express(vdev->pdev.bus)) { 1565 PCIBus *bus = vdev->pdev.bus; 1566 PCIDevice *bridge; 1567 1568 /* 1569 * Traditionally PCI device assignment exposes the PCIe capability 1570 * as-is on non-express buses. The reason being that some drivers 1571 * simply assume that it's there, for example tg3. However when 1572 * we're running on a native PCIe machine type, like Q35, we need 1573 * to hide the PCIe capability. The reason for this is twofold; 1574 * first Windows guests get a Code 10 error when the PCIe capability 1575 * is exposed in this configuration. Therefore express devices won't 1576 * work at all unless they're attached to express buses in the VM. 1577 * Second, a native PCIe machine introduces the possibility of fine 1578 * granularity IOMMUs supporting both translation and isolation. 1579 * Guest code to discover the IOMMU visibility of a device, such as 1580 * IOMMU grouping code on Linux, is very aware of device types and 1581 * valid transitions between bus types. An express device on a non- 1582 * express bus is not a valid combination on bare metal systems. 1583 * 1584 * Drivers that require a PCIe capability to make the device 1585 * functional are simply going to need to have their devices placed 1586 * on a PCIe bus in the VM. 1587 */ 1588 while (!pci_bus_is_root(bus)) { 1589 bridge = pci_bridge_get_device(bus); 1590 bus = bridge->bus; 1591 } 1592 1593 if (pci_bus_is_express(bus)) { 1594 return 0; 1595 } 1596 1597 } else if (pci_bus_is_root(vdev->pdev.bus)) { 1598 /* 1599 * On a Root Complex bus Endpoints become Root Complex Integrated 1600 * Endpoints, which changes the type and clears the LNK & LNK2 fields. 1601 */ 1602 if (type == PCI_EXP_TYPE_ENDPOINT) { 1603 vfio_add_emulated_word(vdev, pos + PCI_CAP_FLAGS, 1604 PCI_EXP_TYPE_RC_END << 4, 1605 PCI_EXP_FLAGS_TYPE); 1606 1607 /* Link Capabilities, Status, and Control goes away */ 1608 if (size > PCI_EXP_LNKCTL) { 1609 vfio_add_emulated_long(vdev, pos + PCI_EXP_LNKCAP, 0, ~0); 1610 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKCTL, 0, ~0); 1611 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKSTA, 0, ~0); 1612 1613 #ifndef PCI_EXP_LNKCAP2 1614 #define PCI_EXP_LNKCAP2 44 1615 #endif 1616 #ifndef PCI_EXP_LNKSTA2 1617 #define PCI_EXP_LNKSTA2 50 1618 #endif 1619 /* Link 2 Capabilities, Status, and Control goes away */ 1620 if (size > PCI_EXP_LNKCAP2) { 1621 vfio_add_emulated_long(vdev, pos + PCI_EXP_LNKCAP2, 0, ~0); 1622 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKCTL2, 0, ~0); 1623 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKSTA2, 0, ~0); 1624 } 1625 } 1626 1627 } else if (type == PCI_EXP_TYPE_LEG_END) { 1628 /* 1629 * Legacy endpoints don't belong on the root complex. Windows 1630 * seems to be happier with devices if we skip the capability. 1631 */ 1632 return 0; 1633 } 1634 1635 } else { 1636 /* 1637 * Convert Root Complex Integrated Endpoints to regular endpoints. 1638 * These devices don't support LNK/LNK2 capabilities, so make them up. 1639 */ 1640 if (type == PCI_EXP_TYPE_RC_END) { 1641 vfio_add_emulated_word(vdev, pos + PCI_CAP_FLAGS, 1642 PCI_EXP_TYPE_ENDPOINT << 4, 1643 PCI_EXP_FLAGS_TYPE); 1644 vfio_add_emulated_long(vdev, pos + PCI_EXP_LNKCAP, 1645 PCI_EXP_LNK_MLW_1 | PCI_EXP_LNK_LS_25, ~0); 1646 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKCTL, 0, ~0); 1647 } 1648 1649 /* Mark the Link Status bits as emulated to allow virtual negotiation */ 1650 vfio_add_emulated_word(vdev, pos + PCI_EXP_LNKSTA, 1651 pci_get_word(vdev->pdev.config + pos + 1652 PCI_EXP_LNKSTA), 1653 PCI_EXP_LNKCAP_MLW | PCI_EXP_LNKCAP_SLS); 1654 } 1655 1656 pos = pci_add_capability(&vdev->pdev, PCI_CAP_ID_EXP, pos, size); 1657 if (pos >= 0) { 1658 vdev->pdev.exp.exp_cap = pos; 1659 } 1660 1661 return pos; 1662 } 1663 1664 static void vfio_check_pcie_flr(VFIOPCIDevice *vdev, uint8_t pos) 1665 { 1666 uint32_t cap = pci_get_long(vdev->pdev.config + pos + PCI_EXP_DEVCAP); 1667 1668 if (cap & PCI_EXP_DEVCAP_FLR) { 1669 trace_vfio_check_pcie_flr(vdev->vbasedev.name); 1670 vdev->has_flr = true; 1671 } 1672 } 1673 1674 static void vfio_check_pm_reset(VFIOPCIDevice *vdev, uint8_t pos) 1675 { 1676 uint16_t csr = pci_get_word(vdev->pdev.config + pos + PCI_PM_CTRL); 1677 1678 if (!(csr & PCI_PM_CTRL_NO_SOFT_RESET)) { 1679 trace_vfio_check_pm_reset(vdev->vbasedev.name); 1680 vdev->has_pm_reset = true; 1681 } 1682 } 1683 1684 static void vfio_check_af_flr(VFIOPCIDevice *vdev, uint8_t pos) 1685 { 1686 uint8_t cap = pci_get_byte(vdev->pdev.config + pos + PCI_AF_CAP); 1687 1688 if ((cap & PCI_AF_CAP_TP) && (cap & PCI_AF_CAP_FLR)) { 1689 trace_vfio_check_af_flr(vdev->vbasedev.name); 1690 vdev->has_flr = true; 1691 } 1692 } 1693 1694 static int vfio_add_std_cap(VFIOPCIDevice *vdev, uint8_t pos) 1695 { 1696 PCIDevice *pdev = &vdev->pdev; 1697 uint8_t cap_id, next, size; 1698 int ret; 1699 1700 cap_id = pdev->config[pos]; 1701 next = pdev->config[pos + PCI_CAP_LIST_NEXT]; 1702 1703 /* 1704 * If it becomes important to configure capabilities to their actual 1705 * size, use this as the default when it's something we don't recognize. 1706 * Since QEMU doesn't actually handle many of the config accesses, 1707 * exact size doesn't seem worthwhile. 1708 */ 1709 size = vfio_std_cap_max_size(pdev, pos); 1710 1711 /* 1712 * pci_add_capability always inserts the new capability at the head 1713 * of the chain. Therefore to end up with a chain that matches the 1714 * physical device, we insert from the end by making this recursive. 1715 * This is also why we pre-calculate size above as cached config space 1716 * will be changed as we unwind the stack. 1717 */ 1718 if (next) { 1719 ret = vfio_add_std_cap(vdev, next); 1720 if (ret) { 1721 return ret; 1722 } 1723 } else { 1724 /* Begin the rebuild, use QEMU emulated list bits */ 1725 pdev->config[PCI_CAPABILITY_LIST] = 0; 1726 vdev->emulated_config_bits[PCI_CAPABILITY_LIST] = 0xff; 1727 vdev->emulated_config_bits[PCI_STATUS] |= PCI_STATUS_CAP_LIST; 1728 } 1729 1730 /* Use emulated next pointer to allow dropping caps */ 1731 pci_set_byte(vdev->emulated_config_bits + pos + PCI_CAP_LIST_NEXT, 0xff); 1732 1733 switch (cap_id) { 1734 case PCI_CAP_ID_MSI: 1735 ret = vfio_msi_setup(vdev, pos); 1736 break; 1737 case PCI_CAP_ID_EXP: 1738 vfio_check_pcie_flr(vdev, pos); 1739 ret = vfio_setup_pcie_cap(vdev, pos, size); 1740 break; 1741 case PCI_CAP_ID_MSIX: 1742 ret = vfio_msix_setup(vdev, pos); 1743 break; 1744 case PCI_CAP_ID_PM: 1745 vfio_check_pm_reset(vdev, pos); 1746 vdev->pm_cap = pos; 1747 ret = pci_add_capability(pdev, cap_id, pos, size); 1748 break; 1749 case PCI_CAP_ID_AF: 1750 vfio_check_af_flr(vdev, pos); 1751 ret = pci_add_capability(pdev, cap_id, pos, size); 1752 break; 1753 default: 1754 ret = pci_add_capability(pdev, cap_id, pos, size); 1755 break; 1756 } 1757 1758 if (ret < 0) { 1759 error_report("vfio: %04x:%02x:%02x.%x Error adding PCI capability " 1760 "0x%x[0x%x]@0x%x: %d", vdev->host.domain, 1761 vdev->host.bus, vdev->host.slot, vdev->host.function, 1762 cap_id, size, pos, ret); 1763 return ret; 1764 } 1765 1766 return 0; 1767 } 1768 1769 static int vfio_add_capabilities(VFIOPCIDevice *vdev) 1770 { 1771 PCIDevice *pdev = &vdev->pdev; 1772 1773 if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST) || 1774 !pdev->config[PCI_CAPABILITY_LIST]) { 1775 return 0; /* Nothing to add */ 1776 } 1777 1778 return vfio_add_std_cap(vdev, pdev->config[PCI_CAPABILITY_LIST]); 1779 } 1780 1781 static void vfio_pci_pre_reset(VFIOPCIDevice *vdev) 1782 { 1783 PCIDevice *pdev = &vdev->pdev; 1784 uint16_t cmd; 1785 1786 vfio_disable_interrupts(vdev); 1787 1788 /* Make sure the device is in D0 */ 1789 if (vdev->pm_cap) { 1790 uint16_t pmcsr; 1791 uint8_t state; 1792 1793 pmcsr = vfio_pci_read_config(pdev, vdev->pm_cap + PCI_PM_CTRL, 2); 1794 state = pmcsr & PCI_PM_CTRL_STATE_MASK; 1795 if (state) { 1796 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 1797 vfio_pci_write_config(pdev, vdev->pm_cap + PCI_PM_CTRL, pmcsr, 2); 1798 /* vfio handles the necessary delay here */ 1799 pmcsr = vfio_pci_read_config(pdev, vdev->pm_cap + PCI_PM_CTRL, 2); 1800 state = pmcsr & PCI_PM_CTRL_STATE_MASK; 1801 if (state) { 1802 error_report("vfio: Unable to power on device, stuck in D%d", 1803 state); 1804 } 1805 } 1806 } 1807 1808 /* 1809 * Stop any ongoing DMA by disconecting I/O, MMIO, and bus master. 1810 * Also put INTx Disable in known state. 1811 */ 1812 cmd = vfio_pci_read_config(pdev, PCI_COMMAND, 2); 1813 cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | 1814 PCI_COMMAND_INTX_DISABLE); 1815 vfio_pci_write_config(pdev, PCI_COMMAND, cmd, 2); 1816 } 1817 1818 static void vfio_pci_post_reset(VFIOPCIDevice *vdev) 1819 { 1820 vfio_intx_enable(vdev); 1821 } 1822 1823 static bool vfio_pci_host_match(PCIHostDeviceAddress *host1, 1824 PCIHostDeviceAddress *host2) 1825 { 1826 return (host1->domain == host2->domain && host1->bus == host2->bus && 1827 host1->slot == host2->slot && host1->function == host2->function); 1828 } 1829 1830 static int vfio_pci_hot_reset(VFIOPCIDevice *vdev, bool single) 1831 { 1832 VFIOGroup *group; 1833 struct vfio_pci_hot_reset_info *info; 1834 struct vfio_pci_dependent_device *devices; 1835 struct vfio_pci_hot_reset *reset; 1836 int32_t *fds; 1837 int ret, i, count; 1838 bool multi = false; 1839 1840 trace_vfio_pci_hot_reset(vdev->vbasedev.name, single ? "one" : "multi"); 1841 1842 vfio_pci_pre_reset(vdev); 1843 vdev->vbasedev.needs_reset = false; 1844 1845 info = g_malloc0(sizeof(*info)); 1846 info->argsz = sizeof(*info); 1847 1848 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO, info); 1849 if (ret && errno != ENOSPC) { 1850 ret = -errno; 1851 if (!vdev->has_pm_reset) { 1852 error_report("vfio: Cannot reset device %04x:%02x:%02x.%x, " 1853 "no available reset mechanism.", vdev->host.domain, 1854 vdev->host.bus, vdev->host.slot, vdev->host.function); 1855 } 1856 goto out_single; 1857 } 1858 1859 count = info->count; 1860 info = g_realloc(info, sizeof(*info) + (count * sizeof(*devices))); 1861 info->argsz = sizeof(*info) + (count * sizeof(*devices)); 1862 devices = &info->devices[0]; 1863 1864 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_PCI_HOT_RESET_INFO, info); 1865 if (ret) { 1866 ret = -errno; 1867 error_report("vfio: hot reset info failed: %m"); 1868 goto out_single; 1869 } 1870 1871 trace_vfio_pci_hot_reset_has_dep_devices(vdev->vbasedev.name); 1872 1873 /* Verify that we have all the groups required */ 1874 for (i = 0; i < info->count; i++) { 1875 PCIHostDeviceAddress host; 1876 VFIOPCIDevice *tmp; 1877 VFIODevice *vbasedev_iter; 1878 1879 host.domain = devices[i].segment; 1880 host.bus = devices[i].bus; 1881 host.slot = PCI_SLOT(devices[i].devfn); 1882 host.function = PCI_FUNC(devices[i].devfn); 1883 1884 trace_vfio_pci_hot_reset_dep_devices(host.domain, 1885 host.bus, host.slot, host.function, devices[i].group_id); 1886 1887 if (vfio_pci_host_match(&host, &vdev->host)) { 1888 continue; 1889 } 1890 1891 QLIST_FOREACH(group, &vfio_group_list, next) { 1892 if (group->groupid == devices[i].group_id) { 1893 break; 1894 } 1895 } 1896 1897 if (!group) { 1898 if (!vdev->has_pm_reset) { 1899 error_report("vfio: Cannot reset device %s, " 1900 "depends on group %d which is not owned.", 1901 vdev->vbasedev.name, devices[i].group_id); 1902 } 1903 ret = -EPERM; 1904 goto out; 1905 } 1906 1907 /* Prep dependent devices for reset and clear our marker. */ 1908 QLIST_FOREACH(vbasedev_iter, &group->device_list, next) { 1909 if (vbasedev_iter->type != VFIO_DEVICE_TYPE_PCI) { 1910 continue; 1911 } 1912 tmp = container_of(vbasedev_iter, VFIOPCIDevice, vbasedev); 1913 if (vfio_pci_host_match(&host, &tmp->host)) { 1914 if (single) { 1915 ret = -EINVAL; 1916 goto out_single; 1917 } 1918 vfio_pci_pre_reset(tmp); 1919 tmp->vbasedev.needs_reset = false; 1920 multi = true; 1921 break; 1922 } 1923 } 1924 } 1925 1926 if (!single && !multi) { 1927 ret = -EINVAL; 1928 goto out_single; 1929 } 1930 1931 /* Determine how many group fds need to be passed */ 1932 count = 0; 1933 QLIST_FOREACH(group, &vfio_group_list, next) { 1934 for (i = 0; i < info->count; i++) { 1935 if (group->groupid == devices[i].group_id) { 1936 count++; 1937 break; 1938 } 1939 } 1940 } 1941 1942 reset = g_malloc0(sizeof(*reset) + (count * sizeof(*fds))); 1943 reset->argsz = sizeof(*reset) + (count * sizeof(*fds)); 1944 fds = &reset->group_fds[0]; 1945 1946 /* Fill in group fds */ 1947 QLIST_FOREACH(group, &vfio_group_list, next) { 1948 for (i = 0; i < info->count; i++) { 1949 if (group->groupid == devices[i].group_id) { 1950 fds[reset->count++] = group->fd; 1951 break; 1952 } 1953 } 1954 } 1955 1956 /* Bus reset! */ 1957 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_PCI_HOT_RESET, reset); 1958 g_free(reset); 1959 1960 trace_vfio_pci_hot_reset_result(vdev->vbasedev.name, 1961 ret ? "%m" : "Success"); 1962 1963 out: 1964 /* Re-enable INTx on affected devices */ 1965 for (i = 0; i < info->count; i++) { 1966 PCIHostDeviceAddress host; 1967 VFIOPCIDevice *tmp; 1968 VFIODevice *vbasedev_iter; 1969 1970 host.domain = devices[i].segment; 1971 host.bus = devices[i].bus; 1972 host.slot = PCI_SLOT(devices[i].devfn); 1973 host.function = PCI_FUNC(devices[i].devfn); 1974 1975 if (vfio_pci_host_match(&host, &vdev->host)) { 1976 continue; 1977 } 1978 1979 QLIST_FOREACH(group, &vfio_group_list, next) { 1980 if (group->groupid == devices[i].group_id) { 1981 break; 1982 } 1983 } 1984 1985 if (!group) { 1986 break; 1987 } 1988 1989 QLIST_FOREACH(vbasedev_iter, &group->device_list, next) { 1990 if (vbasedev_iter->type != VFIO_DEVICE_TYPE_PCI) { 1991 continue; 1992 } 1993 tmp = container_of(vbasedev_iter, VFIOPCIDevice, vbasedev); 1994 if (vfio_pci_host_match(&host, &tmp->host)) { 1995 vfio_pci_post_reset(tmp); 1996 break; 1997 } 1998 } 1999 } 2000 out_single: 2001 vfio_pci_post_reset(vdev); 2002 g_free(info); 2003 2004 return ret; 2005 } 2006 2007 /* 2008 * We want to differentiate hot reset of mulitple in-use devices vs hot reset 2009 * of a single in-use device. VFIO_DEVICE_RESET will already handle the case 2010 * of doing hot resets when there is only a single device per bus. The in-use 2011 * here refers to how many VFIODevices are affected. A hot reset that affects 2012 * multiple devices, but only a single in-use device, means that we can call 2013 * it from our bus ->reset() callback since the extent is effectively a single 2014 * device. This allows us to make use of it in the hotplug path. When there 2015 * are multiple in-use devices, we can only trigger the hot reset during a 2016 * system reset and thus from our reset handler. We separate _one vs _multi 2017 * here so that we don't overlap and do a double reset on the system reset 2018 * path where both our reset handler and ->reset() callback are used. Calling 2019 * _one() will only do a hot reset for the one in-use devices case, calling 2020 * _multi() will do nothing if a _one() would have been sufficient. 2021 */ 2022 static int vfio_pci_hot_reset_one(VFIOPCIDevice *vdev) 2023 { 2024 return vfio_pci_hot_reset(vdev, true); 2025 } 2026 2027 static int vfio_pci_hot_reset_multi(VFIODevice *vbasedev) 2028 { 2029 VFIOPCIDevice *vdev = container_of(vbasedev, VFIOPCIDevice, vbasedev); 2030 return vfio_pci_hot_reset(vdev, false); 2031 } 2032 2033 static void vfio_pci_compute_needs_reset(VFIODevice *vbasedev) 2034 { 2035 VFIOPCIDevice *vdev = container_of(vbasedev, VFIOPCIDevice, vbasedev); 2036 if (!vbasedev->reset_works || (!vdev->has_flr && vdev->has_pm_reset)) { 2037 vbasedev->needs_reset = true; 2038 } 2039 } 2040 2041 static VFIODeviceOps vfio_pci_ops = { 2042 .vfio_compute_needs_reset = vfio_pci_compute_needs_reset, 2043 .vfio_hot_reset_multi = vfio_pci_hot_reset_multi, 2044 .vfio_eoi = vfio_intx_eoi, 2045 }; 2046 2047 static int vfio_populate_device(VFIOPCIDevice *vdev) 2048 { 2049 VFIODevice *vbasedev = &vdev->vbasedev; 2050 struct vfio_region_info reg_info = { .argsz = sizeof(reg_info) }; 2051 struct vfio_irq_info irq_info = { .argsz = sizeof(irq_info) }; 2052 int i, ret = -1; 2053 2054 /* Sanity check device */ 2055 if (!(vbasedev->flags & VFIO_DEVICE_FLAGS_PCI)) { 2056 error_report("vfio: Um, this isn't a PCI device"); 2057 goto error; 2058 } 2059 2060 if (vbasedev->num_regions < VFIO_PCI_CONFIG_REGION_INDEX + 1) { 2061 error_report("vfio: unexpected number of io regions %u", 2062 vbasedev->num_regions); 2063 goto error; 2064 } 2065 2066 if (vbasedev->num_irqs < VFIO_PCI_MSIX_IRQ_INDEX + 1) { 2067 error_report("vfio: unexpected number of irqs %u", vbasedev->num_irqs); 2068 goto error; 2069 } 2070 2071 for (i = VFIO_PCI_BAR0_REGION_INDEX; i < VFIO_PCI_ROM_REGION_INDEX; i++) { 2072 reg_info.index = i; 2073 2074 ret = ioctl(vbasedev->fd, VFIO_DEVICE_GET_REGION_INFO, ®_info); 2075 if (ret) { 2076 error_report("vfio: Error getting region %d info: %m", i); 2077 goto error; 2078 } 2079 2080 trace_vfio_populate_device_region(vbasedev->name, i, 2081 (unsigned long)reg_info.size, 2082 (unsigned long)reg_info.offset, 2083 (unsigned long)reg_info.flags); 2084 2085 vdev->bars[i].region.vbasedev = vbasedev; 2086 vdev->bars[i].region.flags = reg_info.flags; 2087 vdev->bars[i].region.size = reg_info.size; 2088 vdev->bars[i].region.fd_offset = reg_info.offset; 2089 vdev->bars[i].region.nr = i; 2090 QLIST_INIT(&vdev->bars[i].quirks); 2091 } 2092 2093 reg_info.index = VFIO_PCI_CONFIG_REGION_INDEX; 2094 2095 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_REGION_INFO, ®_info); 2096 if (ret) { 2097 error_report("vfio: Error getting config info: %m"); 2098 goto error; 2099 } 2100 2101 trace_vfio_populate_device_config(vdev->vbasedev.name, 2102 (unsigned long)reg_info.size, 2103 (unsigned long)reg_info.offset, 2104 (unsigned long)reg_info.flags); 2105 2106 vdev->config_size = reg_info.size; 2107 if (vdev->config_size == PCI_CONFIG_SPACE_SIZE) { 2108 vdev->pdev.cap_present &= ~QEMU_PCI_CAP_EXPRESS; 2109 } 2110 vdev->config_offset = reg_info.offset; 2111 2112 if ((vdev->features & VFIO_FEATURE_ENABLE_VGA) && 2113 vbasedev->num_regions > VFIO_PCI_VGA_REGION_INDEX) { 2114 struct vfio_region_info vga_info = { 2115 .argsz = sizeof(vga_info), 2116 .index = VFIO_PCI_VGA_REGION_INDEX, 2117 }; 2118 2119 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_REGION_INFO, &vga_info); 2120 if (ret) { 2121 error_report( 2122 "vfio: Device does not support requested feature x-vga"); 2123 goto error; 2124 } 2125 2126 if (!(vga_info.flags & VFIO_REGION_INFO_FLAG_READ) || 2127 !(vga_info.flags & VFIO_REGION_INFO_FLAG_WRITE) || 2128 vga_info.size < 0xbffff + 1) { 2129 error_report("vfio: Unexpected VGA info, flags 0x%lx, size 0x%lx", 2130 (unsigned long)vga_info.flags, 2131 (unsigned long)vga_info.size); 2132 goto error; 2133 } 2134 2135 vdev->vga.fd_offset = vga_info.offset; 2136 vdev->vga.fd = vdev->vbasedev.fd; 2137 2138 vdev->vga.region[QEMU_PCI_VGA_MEM].offset = QEMU_PCI_VGA_MEM_BASE; 2139 vdev->vga.region[QEMU_PCI_VGA_MEM].nr = QEMU_PCI_VGA_MEM; 2140 QLIST_INIT(&vdev->vga.region[QEMU_PCI_VGA_MEM].quirks); 2141 2142 vdev->vga.region[QEMU_PCI_VGA_IO_LO].offset = QEMU_PCI_VGA_IO_LO_BASE; 2143 vdev->vga.region[QEMU_PCI_VGA_IO_LO].nr = QEMU_PCI_VGA_IO_LO; 2144 QLIST_INIT(&vdev->vga.region[QEMU_PCI_VGA_IO_LO].quirks); 2145 2146 vdev->vga.region[QEMU_PCI_VGA_IO_HI].offset = QEMU_PCI_VGA_IO_HI_BASE; 2147 vdev->vga.region[QEMU_PCI_VGA_IO_HI].nr = QEMU_PCI_VGA_IO_HI; 2148 QLIST_INIT(&vdev->vga.region[QEMU_PCI_VGA_IO_HI].quirks); 2149 2150 vdev->has_vga = true; 2151 } 2152 2153 irq_info.index = VFIO_PCI_ERR_IRQ_INDEX; 2154 2155 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_IRQ_INFO, &irq_info); 2156 if (ret) { 2157 /* This can fail for an old kernel or legacy PCI dev */ 2158 trace_vfio_populate_device_get_irq_info_failure(); 2159 ret = 0; 2160 } else if (irq_info.count == 1) { 2161 vdev->pci_aer = true; 2162 } else { 2163 error_report("vfio: %s " 2164 "Could not enable error recovery for the device", 2165 vbasedev->name); 2166 } 2167 2168 error: 2169 return ret; 2170 } 2171 2172 static void vfio_put_device(VFIOPCIDevice *vdev) 2173 { 2174 g_free(vdev->vbasedev.name); 2175 if (vdev->msix) { 2176 object_unparent(OBJECT(&vdev->msix->mmap_mem)); 2177 g_free(vdev->msix); 2178 vdev->msix = NULL; 2179 } 2180 vfio_put_base_device(&vdev->vbasedev); 2181 } 2182 2183 static void vfio_err_notifier_handler(void *opaque) 2184 { 2185 VFIOPCIDevice *vdev = opaque; 2186 2187 if (!event_notifier_test_and_clear(&vdev->err_notifier)) { 2188 return; 2189 } 2190 2191 /* 2192 * TBD. Retrieve the error details and decide what action 2193 * needs to be taken. One of the actions could be to pass 2194 * the error to the guest and have the guest driver recover 2195 * from the error. This requires that PCIe capabilities be 2196 * exposed to the guest. For now, we just terminate the 2197 * guest to contain the error. 2198 */ 2199 2200 error_report("%s(%04x:%02x:%02x.%x) Unrecoverable error detected. " 2201 "Please collect any data possible and then kill the guest", 2202 __func__, vdev->host.domain, vdev->host.bus, 2203 vdev->host.slot, vdev->host.function); 2204 2205 vm_stop(RUN_STATE_INTERNAL_ERROR); 2206 } 2207 2208 /* 2209 * Registers error notifier for devices supporting error recovery. 2210 * If we encounter a failure in this function, we report an error 2211 * and continue after disabling error recovery support for the 2212 * device. 2213 */ 2214 static void vfio_register_err_notifier(VFIOPCIDevice *vdev) 2215 { 2216 int ret; 2217 int argsz; 2218 struct vfio_irq_set *irq_set; 2219 int32_t *pfd; 2220 2221 if (!vdev->pci_aer) { 2222 return; 2223 } 2224 2225 if (event_notifier_init(&vdev->err_notifier, 0)) { 2226 error_report("vfio: Unable to init event notifier for error detection"); 2227 vdev->pci_aer = false; 2228 return; 2229 } 2230 2231 argsz = sizeof(*irq_set) + sizeof(*pfd); 2232 2233 irq_set = g_malloc0(argsz); 2234 irq_set->argsz = argsz; 2235 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | 2236 VFIO_IRQ_SET_ACTION_TRIGGER; 2237 irq_set->index = VFIO_PCI_ERR_IRQ_INDEX; 2238 irq_set->start = 0; 2239 irq_set->count = 1; 2240 pfd = (int32_t *)&irq_set->data; 2241 2242 *pfd = event_notifier_get_fd(&vdev->err_notifier); 2243 qemu_set_fd_handler(*pfd, vfio_err_notifier_handler, NULL, vdev); 2244 2245 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set); 2246 if (ret) { 2247 error_report("vfio: Failed to set up error notification"); 2248 qemu_set_fd_handler(*pfd, NULL, NULL, vdev); 2249 event_notifier_cleanup(&vdev->err_notifier); 2250 vdev->pci_aer = false; 2251 } 2252 g_free(irq_set); 2253 } 2254 2255 static void vfio_unregister_err_notifier(VFIOPCIDevice *vdev) 2256 { 2257 int argsz; 2258 struct vfio_irq_set *irq_set; 2259 int32_t *pfd; 2260 int ret; 2261 2262 if (!vdev->pci_aer) { 2263 return; 2264 } 2265 2266 argsz = sizeof(*irq_set) + sizeof(*pfd); 2267 2268 irq_set = g_malloc0(argsz); 2269 irq_set->argsz = argsz; 2270 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | 2271 VFIO_IRQ_SET_ACTION_TRIGGER; 2272 irq_set->index = VFIO_PCI_ERR_IRQ_INDEX; 2273 irq_set->start = 0; 2274 irq_set->count = 1; 2275 pfd = (int32_t *)&irq_set->data; 2276 *pfd = -1; 2277 2278 ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set); 2279 if (ret) { 2280 error_report("vfio: Failed to de-assign error fd: %m"); 2281 } 2282 g_free(irq_set); 2283 qemu_set_fd_handler(event_notifier_get_fd(&vdev->err_notifier), 2284 NULL, NULL, vdev); 2285 event_notifier_cleanup(&vdev->err_notifier); 2286 } 2287 2288 static void vfio_req_notifier_handler(void *opaque) 2289 { 2290 VFIOPCIDevice *vdev = opaque; 2291 2292 if (!event_notifier_test_and_clear(&vdev->req_notifier)) { 2293 return; 2294 } 2295 2296 qdev_unplug(&vdev->pdev.qdev, NULL); 2297 } 2298 2299 static void vfio_register_req_notifier(VFIOPCIDevice *vdev) 2300 { 2301 struct vfio_irq_info irq_info = { .argsz = sizeof(irq_info), 2302 .index = VFIO_PCI_REQ_IRQ_INDEX }; 2303 int argsz; 2304 struct vfio_irq_set *irq_set; 2305 int32_t *pfd; 2306 2307 if (!(vdev->features & VFIO_FEATURE_ENABLE_REQ)) { 2308 return; 2309 } 2310 2311 if (ioctl(vdev->vbasedev.fd, 2312 VFIO_DEVICE_GET_IRQ_INFO, &irq_info) < 0 || irq_info.count < 1) { 2313 return; 2314 } 2315 2316 if (event_notifier_init(&vdev->req_notifier, 0)) { 2317 error_report("vfio: Unable to init event notifier for device request"); 2318 return; 2319 } 2320 2321 argsz = sizeof(*irq_set) + sizeof(*pfd); 2322 2323 irq_set = g_malloc0(argsz); 2324 irq_set->argsz = argsz; 2325 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | 2326 VFIO_IRQ_SET_ACTION_TRIGGER; 2327 irq_set->index = VFIO_PCI_REQ_IRQ_INDEX; 2328 irq_set->start = 0; 2329 irq_set->count = 1; 2330 pfd = (int32_t *)&irq_set->data; 2331 2332 *pfd = event_notifier_get_fd(&vdev->req_notifier); 2333 qemu_set_fd_handler(*pfd, vfio_req_notifier_handler, NULL, vdev); 2334 2335 if (ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set)) { 2336 error_report("vfio: Failed to set up device request notification"); 2337 qemu_set_fd_handler(*pfd, NULL, NULL, vdev); 2338 event_notifier_cleanup(&vdev->req_notifier); 2339 } else { 2340 vdev->req_enabled = true; 2341 } 2342 2343 g_free(irq_set); 2344 } 2345 2346 static void vfio_unregister_req_notifier(VFIOPCIDevice *vdev) 2347 { 2348 int argsz; 2349 struct vfio_irq_set *irq_set; 2350 int32_t *pfd; 2351 2352 if (!vdev->req_enabled) { 2353 return; 2354 } 2355 2356 argsz = sizeof(*irq_set) + sizeof(*pfd); 2357 2358 irq_set = g_malloc0(argsz); 2359 irq_set->argsz = argsz; 2360 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | 2361 VFIO_IRQ_SET_ACTION_TRIGGER; 2362 irq_set->index = VFIO_PCI_REQ_IRQ_INDEX; 2363 irq_set->start = 0; 2364 irq_set->count = 1; 2365 pfd = (int32_t *)&irq_set->data; 2366 *pfd = -1; 2367 2368 if (ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set)) { 2369 error_report("vfio: Failed to de-assign device request fd: %m"); 2370 } 2371 g_free(irq_set); 2372 qemu_set_fd_handler(event_notifier_get_fd(&vdev->req_notifier), 2373 NULL, NULL, vdev); 2374 event_notifier_cleanup(&vdev->req_notifier); 2375 2376 vdev->req_enabled = false; 2377 } 2378 2379 static int vfio_initfn(PCIDevice *pdev) 2380 { 2381 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev); 2382 VFIODevice *vbasedev_iter; 2383 VFIOGroup *group; 2384 char path[PATH_MAX], iommu_group_path[PATH_MAX], *group_name; 2385 ssize_t len; 2386 struct stat st; 2387 int groupid; 2388 int ret; 2389 2390 /* Check that the host device exists */ 2391 snprintf(path, sizeof(path), 2392 "/sys/bus/pci/devices/%04x:%02x:%02x.%01x/", 2393 vdev->host.domain, vdev->host.bus, vdev->host.slot, 2394 vdev->host.function); 2395 if (stat(path, &st) < 0) { 2396 error_report("vfio: error: no such host device: %s", path); 2397 return -errno; 2398 } 2399 2400 vdev->vbasedev.ops = &vfio_pci_ops; 2401 2402 vdev->vbasedev.type = VFIO_DEVICE_TYPE_PCI; 2403 vdev->vbasedev.name = g_strdup_printf("%04x:%02x:%02x.%01x", 2404 vdev->host.domain, vdev->host.bus, 2405 vdev->host.slot, vdev->host.function); 2406 2407 strncat(path, "iommu_group", sizeof(path) - strlen(path) - 1); 2408 2409 len = readlink(path, iommu_group_path, sizeof(path)); 2410 if (len <= 0 || len >= sizeof(path)) { 2411 error_report("vfio: error no iommu_group for device"); 2412 return len < 0 ? -errno : -ENAMETOOLONG; 2413 } 2414 2415 iommu_group_path[len] = 0; 2416 group_name = basename(iommu_group_path); 2417 2418 if (sscanf(group_name, "%d", &groupid) != 1) { 2419 error_report("vfio: error reading %s: %m", path); 2420 return -errno; 2421 } 2422 2423 trace_vfio_initfn(vdev->vbasedev.name, groupid); 2424 2425 group = vfio_get_group(groupid, pci_device_iommu_address_space(pdev)); 2426 if (!group) { 2427 error_report("vfio: failed to get group %d", groupid); 2428 return -ENOENT; 2429 } 2430 2431 snprintf(path, sizeof(path), "%04x:%02x:%02x.%01x", 2432 vdev->host.domain, vdev->host.bus, vdev->host.slot, 2433 vdev->host.function); 2434 2435 QLIST_FOREACH(vbasedev_iter, &group->device_list, next) { 2436 if (strcmp(vbasedev_iter->name, vdev->vbasedev.name) == 0) { 2437 error_report("vfio: error: device %s is already attached", path); 2438 vfio_put_group(group); 2439 return -EBUSY; 2440 } 2441 } 2442 2443 ret = vfio_get_device(group, path, &vdev->vbasedev); 2444 if (ret) { 2445 error_report("vfio: failed to get device %s", path); 2446 vfio_put_group(group); 2447 return ret; 2448 } 2449 2450 ret = vfio_populate_device(vdev); 2451 if (ret) { 2452 return ret; 2453 } 2454 2455 /* Get a copy of config space */ 2456 ret = pread(vdev->vbasedev.fd, vdev->pdev.config, 2457 MIN(pci_config_size(&vdev->pdev), vdev->config_size), 2458 vdev->config_offset); 2459 if (ret < (int)MIN(pci_config_size(&vdev->pdev), vdev->config_size)) { 2460 ret = ret < 0 ? -errno : -EFAULT; 2461 error_report("vfio: Failed to read device config space"); 2462 return ret; 2463 } 2464 2465 /* vfio emulates a lot for us, but some bits need extra love */ 2466 vdev->emulated_config_bits = g_malloc0(vdev->config_size); 2467 2468 /* QEMU can choose to expose the ROM or not */ 2469 memset(vdev->emulated_config_bits + PCI_ROM_ADDRESS, 0xff, 4); 2470 2471 /* 2472 * The PCI spec reserves vendor ID 0xffff as an invalid value. The 2473 * device ID is managed by the vendor and need only be a 16-bit value. 2474 * Allow any 16-bit value for subsystem so they can be hidden or changed. 2475 */ 2476 if (vdev->vendor_id != PCI_ANY_ID) { 2477 if (vdev->vendor_id >= 0xffff) { 2478 error_report("vfio: Invalid PCI vendor ID provided"); 2479 return -EINVAL; 2480 } 2481 vfio_add_emulated_word(vdev, PCI_VENDOR_ID, vdev->vendor_id, ~0); 2482 trace_vfio_pci_emulated_vendor_id(vdev->vbasedev.name, vdev->vendor_id); 2483 } else { 2484 vdev->vendor_id = pci_get_word(pdev->config + PCI_VENDOR_ID); 2485 } 2486 2487 if (vdev->device_id != PCI_ANY_ID) { 2488 if (vdev->device_id > 0xffff) { 2489 error_report("vfio: Invalid PCI device ID provided"); 2490 return -EINVAL; 2491 } 2492 vfio_add_emulated_word(vdev, PCI_DEVICE_ID, vdev->device_id, ~0); 2493 trace_vfio_pci_emulated_device_id(vdev->vbasedev.name, vdev->device_id); 2494 } else { 2495 vdev->device_id = pci_get_word(pdev->config + PCI_DEVICE_ID); 2496 } 2497 2498 if (vdev->sub_vendor_id != PCI_ANY_ID) { 2499 if (vdev->sub_vendor_id > 0xffff) { 2500 error_report("vfio: Invalid PCI subsystem vendor ID provided"); 2501 return -EINVAL; 2502 } 2503 vfio_add_emulated_word(vdev, PCI_SUBSYSTEM_VENDOR_ID, 2504 vdev->sub_vendor_id, ~0); 2505 trace_vfio_pci_emulated_sub_vendor_id(vdev->vbasedev.name, 2506 vdev->sub_vendor_id); 2507 } 2508 2509 if (vdev->sub_device_id != PCI_ANY_ID) { 2510 if (vdev->sub_device_id > 0xffff) { 2511 error_report("vfio: Invalid PCI subsystem device ID provided"); 2512 return -EINVAL; 2513 } 2514 vfio_add_emulated_word(vdev, PCI_SUBSYSTEM_ID, vdev->sub_device_id, ~0); 2515 trace_vfio_pci_emulated_sub_device_id(vdev->vbasedev.name, 2516 vdev->sub_device_id); 2517 } 2518 2519 /* QEMU can change multi-function devices to single function, or reverse */ 2520 vdev->emulated_config_bits[PCI_HEADER_TYPE] = 2521 PCI_HEADER_TYPE_MULTI_FUNCTION; 2522 2523 /* Restore or clear multifunction, this is always controlled by QEMU */ 2524 if (vdev->pdev.cap_present & QEMU_PCI_CAP_MULTIFUNCTION) { 2525 vdev->pdev.config[PCI_HEADER_TYPE] |= PCI_HEADER_TYPE_MULTI_FUNCTION; 2526 } else { 2527 vdev->pdev.config[PCI_HEADER_TYPE] &= ~PCI_HEADER_TYPE_MULTI_FUNCTION; 2528 } 2529 2530 /* 2531 * Clear host resource mapping info. If we choose not to register a 2532 * BAR, such as might be the case with the option ROM, we can get 2533 * confusing, unwritable, residual addresses from the host here. 2534 */ 2535 memset(&vdev->pdev.config[PCI_BASE_ADDRESS_0], 0, 24); 2536 memset(&vdev->pdev.config[PCI_ROM_ADDRESS], 0, 4); 2537 2538 vfio_pci_size_rom(vdev); 2539 2540 ret = vfio_msix_early_setup(vdev); 2541 if (ret) { 2542 return ret; 2543 } 2544 2545 vfio_map_bars(vdev); 2546 2547 ret = vfio_add_capabilities(vdev); 2548 if (ret) { 2549 goto out_teardown; 2550 } 2551 2552 /* QEMU emulates all of MSI & MSIX */ 2553 if (pdev->cap_present & QEMU_PCI_CAP_MSIX) { 2554 memset(vdev->emulated_config_bits + pdev->msix_cap, 0xff, 2555 MSIX_CAP_LENGTH); 2556 } 2557 2558 if (pdev->cap_present & QEMU_PCI_CAP_MSI) { 2559 memset(vdev->emulated_config_bits + pdev->msi_cap, 0xff, 2560 vdev->msi_cap_size); 2561 } 2562 2563 if (vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1)) { 2564 vdev->intx.mmap_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL, 2565 vfio_intx_mmap_enable, vdev); 2566 pci_device_set_intx_routing_notifier(&vdev->pdev, vfio_intx_update); 2567 ret = vfio_intx_enable(vdev); 2568 if (ret) { 2569 goto out_teardown; 2570 } 2571 } 2572 2573 vfio_register_err_notifier(vdev); 2574 vfio_register_req_notifier(vdev); 2575 vfio_setup_resetfn_quirk(vdev); 2576 2577 return 0; 2578 2579 out_teardown: 2580 pci_device_set_intx_routing_notifier(&vdev->pdev, NULL); 2581 vfio_teardown_msi(vdev); 2582 vfio_unregister_bars(vdev); 2583 return ret; 2584 } 2585 2586 static void vfio_instance_finalize(Object *obj) 2587 { 2588 PCIDevice *pci_dev = PCI_DEVICE(obj); 2589 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pci_dev); 2590 VFIOGroup *group = vdev->vbasedev.group; 2591 2592 vfio_unmap_bars(vdev); 2593 g_free(vdev->emulated_config_bits); 2594 g_free(vdev->rom); 2595 vfio_put_device(vdev); 2596 vfio_put_group(group); 2597 } 2598 2599 static void vfio_exitfn(PCIDevice *pdev) 2600 { 2601 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev); 2602 2603 vfio_unregister_req_notifier(vdev); 2604 vfio_unregister_err_notifier(vdev); 2605 pci_device_set_intx_routing_notifier(&vdev->pdev, NULL); 2606 vfio_disable_interrupts(vdev); 2607 if (vdev->intx.mmap_timer) { 2608 timer_free(vdev->intx.mmap_timer); 2609 } 2610 vfio_teardown_msi(vdev); 2611 vfio_unregister_bars(vdev); 2612 } 2613 2614 static void vfio_pci_reset(DeviceState *dev) 2615 { 2616 PCIDevice *pdev = DO_UPCAST(PCIDevice, qdev, dev); 2617 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, pdev); 2618 2619 trace_vfio_pci_reset(vdev->vbasedev.name); 2620 2621 vfio_pci_pre_reset(vdev); 2622 2623 if (vdev->resetfn && !vdev->resetfn(vdev)) { 2624 goto post_reset; 2625 } 2626 2627 if (vdev->vbasedev.reset_works && 2628 (vdev->has_flr || !vdev->has_pm_reset) && 2629 !ioctl(vdev->vbasedev.fd, VFIO_DEVICE_RESET)) { 2630 trace_vfio_pci_reset_flr(vdev->vbasedev.name); 2631 goto post_reset; 2632 } 2633 2634 /* See if we can do our own bus reset */ 2635 if (!vfio_pci_hot_reset_one(vdev)) { 2636 goto post_reset; 2637 } 2638 2639 /* If nothing else works and the device supports PM reset, use it */ 2640 if (vdev->vbasedev.reset_works && vdev->has_pm_reset && 2641 !ioctl(vdev->vbasedev.fd, VFIO_DEVICE_RESET)) { 2642 trace_vfio_pci_reset_pm(vdev->vbasedev.name); 2643 goto post_reset; 2644 } 2645 2646 post_reset: 2647 vfio_pci_post_reset(vdev); 2648 } 2649 2650 static void vfio_instance_init(Object *obj) 2651 { 2652 PCIDevice *pci_dev = PCI_DEVICE(obj); 2653 VFIOPCIDevice *vdev = DO_UPCAST(VFIOPCIDevice, pdev, PCI_DEVICE(obj)); 2654 2655 device_add_bootindex_property(obj, &vdev->bootindex, 2656 "bootindex", NULL, 2657 &pci_dev->qdev, NULL); 2658 } 2659 2660 static Property vfio_pci_dev_properties[] = { 2661 DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIOPCIDevice, host), 2662 DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIOPCIDevice, 2663 intx.mmap_timeout, 1100), 2664 DEFINE_PROP_BIT("x-vga", VFIOPCIDevice, features, 2665 VFIO_FEATURE_ENABLE_VGA_BIT, false), 2666 DEFINE_PROP_BIT("x-req", VFIOPCIDevice, features, 2667 VFIO_FEATURE_ENABLE_REQ_BIT, true), 2668 DEFINE_PROP_BOOL("x-no-mmap", VFIOPCIDevice, vbasedev.no_mmap, false), 2669 DEFINE_PROP_BOOL("x-no-kvm-intx", VFIOPCIDevice, no_kvm_intx, false), 2670 DEFINE_PROP_BOOL("x-no-kvm-msi", VFIOPCIDevice, no_kvm_msi, false), 2671 DEFINE_PROP_BOOL("x-no-kvm-msix", VFIOPCIDevice, no_kvm_msix, false), 2672 DEFINE_PROP_UINT32("x-pci-vendor-id", VFIOPCIDevice, vendor_id, PCI_ANY_ID), 2673 DEFINE_PROP_UINT32("x-pci-device-id", VFIOPCIDevice, device_id, PCI_ANY_ID), 2674 DEFINE_PROP_UINT32("x-pci-sub-vendor-id", VFIOPCIDevice, 2675 sub_vendor_id, PCI_ANY_ID), 2676 DEFINE_PROP_UINT32("x-pci-sub-device-id", VFIOPCIDevice, 2677 sub_device_id, PCI_ANY_ID), 2678 /* 2679 * TODO - support passed fds... is this necessary? 2680 * DEFINE_PROP_STRING("vfiofd", VFIOPCIDevice, vfiofd_name), 2681 * DEFINE_PROP_STRING("vfiogroupfd, VFIOPCIDevice, vfiogroupfd_name), 2682 */ 2683 DEFINE_PROP_END_OF_LIST(), 2684 }; 2685 2686 static const VMStateDescription vfio_pci_vmstate = { 2687 .name = "vfio-pci", 2688 .unmigratable = 1, 2689 }; 2690 2691 static void vfio_pci_dev_class_init(ObjectClass *klass, void *data) 2692 { 2693 DeviceClass *dc = DEVICE_CLASS(klass); 2694 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass); 2695 2696 dc->reset = vfio_pci_reset; 2697 dc->props = vfio_pci_dev_properties; 2698 dc->vmsd = &vfio_pci_vmstate; 2699 dc->desc = "VFIO-based PCI device assignment"; 2700 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 2701 pdc->init = vfio_initfn; 2702 pdc->exit = vfio_exitfn; 2703 pdc->config_read = vfio_pci_read_config; 2704 pdc->config_write = vfio_pci_write_config; 2705 pdc->is_express = 1; /* We might be */ 2706 } 2707 2708 static const TypeInfo vfio_pci_dev_info = { 2709 .name = "vfio-pci", 2710 .parent = TYPE_PCI_DEVICE, 2711 .instance_size = sizeof(VFIOPCIDevice), 2712 .class_init = vfio_pci_dev_class_init, 2713 .instance_init = vfio_instance_init, 2714 .instance_finalize = vfio_instance_finalize, 2715 }; 2716 2717 static void register_vfio_pci_dev_type(void) 2718 { 2719 type_register_static(&vfio_pci_dev_info); 2720 } 2721 2722 type_init(register_vfio_pci_dev_type) 2723